1 /* Definitions of target machine for GNU compiler, for DEC Alpha.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2004 Free Software Foundation, Inc.
4 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
23 /* Target CPU builtins. */
24 #define TARGET_CPU_CPP_BUILTINS() \
27 builtin_define ("__alpha"); \
28 builtin_define ("__alpha__"); \
29 builtin_assert ("cpu=alpha"); \
30 builtin_assert ("machine=alpha"); \
33 builtin_define ("__alpha_cix__"); \
34 builtin_assert ("cpu=cix"); \
38 builtin_define ("__alpha_fix__"); \
39 builtin_assert ("cpu=fix"); \
43 builtin_define ("__alpha_bwx__"); \
44 builtin_assert ("cpu=bwx"); \
48 builtin_define ("__alpha_max__"); \
49 builtin_assert ("cpu=max"); \
53 builtin_define ("__alpha_ev6__"); \
54 builtin_assert ("cpu=ev6"); \
56 else if (TARGET_CPU_EV5) \
58 builtin_define ("__alpha_ev5__"); \
59 builtin_assert ("cpu=ev5"); \
61 else /* Presumably ev4. */ \
63 builtin_define ("__alpha_ev4__"); \
64 builtin_assert ("cpu=ev4"); \
66 if (TARGET_IEEE || TARGET_IEEE_WITH_INEXACT) \
67 builtin_define ("_IEEE_FP"); \
68 if (TARGET_IEEE_WITH_INEXACT) \
69 builtin_define ("_IEEE_FP_INEXACT"); \
70 if (TARGET_LONG_DOUBLE_128) \
71 builtin_define ("__LONG_DOUBLE_128__"); \
73 /* Macros dependent on the C dialect. */ \
74 SUBTARGET_LANGUAGE_CPP_BUILTINS(); \
77 #ifndef SUBTARGET_LANGUAGE_CPP_BUILTINS
78 #define SUBTARGET_LANGUAGE_CPP_BUILTINS() \
81 if (preprocessing_asm_p ()) \
82 builtin_define_std ("LANGUAGE_ASSEMBLY"); \
83 else if (c_dialect_cxx ()) \
85 builtin_define ("__LANGUAGE_C_PLUS_PLUS"); \
86 builtin_define ("__LANGUAGE_C_PLUS_PLUS__"); \
89 builtin_define_std ("LANGUAGE_C"); \
90 if (c_dialect_objc ()) \
92 builtin_define ("__LANGUAGE_OBJECTIVE_C"); \
93 builtin_define ("__LANGUAGE_OBJECTIVE_C__"); \
99 #define CPP_SPEC "%(cpp_subtarget)"
101 #ifndef CPP_SUBTARGET_SPEC
102 #define CPP_SUBTARGET_SPEC ""
105 #define WORD_SWITCH_TAKES_ARG(STR) \
106 (!strcmp (STR, "rpath") || DEFAULT_WORD_SWITCH_TAKES_ARG(STR))
108 /* Print subsidiary information on the compiler version in use. */
109 #define TARGET_VERSION
111 /* Run-time compilation parameters selecting different hardware subsets. */
113 /* Which processor to schedule for. The cpu attribute defines a list that
114 mirrors this list, so changes to alpha.md must be made at the same time. */
118 PROCESSOR_EV4, /* 2106[46]{a,} */
119 PROCESSOR_EV5, /* 21164{a,pc,} */
120 PROCESSOR_EV6, /* 21264 */
124 extern enum processor_type alpha_cpu;
126 enum alpha_trap_precision
128 ALPHA_TP_PROG, /* No precision (default). */
129 ALPHA_TP_FUNC, /* Trap contained within originating function. */
130 ALPHA_TP_INSN /* Instruction accuracy and code is resumption safe. */
133 enum alpha_fp_rounding_mode
135 ALPHA_FPRM_NORM, /* Normal rounding mode. */
136 ALPHA_FPRM_MINF, /* Round towards minus-infinity. */
137 ALPHA_FPRM_CHOP, /* Chopped rounding mode (towards 0). */
138 ALPHA_FPRM_DYN /* Dynamic rounding mode. */
141 enum alpha_fp_trap_mode
143 ALPHA_FPTM_N, /* Normal trap mode. */
144 ALPHA_FPTM_U, /* Underflow traps enabled. */
145 ALPHA_FPTM_SU, /* Software completion, w/underflow traps */
146 ALPHA_FPTM_SUI /* Software completion, w/underflow & inexact traps */
149 extern int target_flags;
151 extern enum alpha_trap_precision alpha_tp;
152 extern enum alpha_fp_rounding_mode alpha_fprm;
153 extern enum alpha_fp_trap_mode alpha_fptm;
154 extern int alpha_tls_size;
156 /* This means that floating-point support exists in the target implementation
157 of the Alpha architecture. This is usually the default. */
158 #define MASK_FP (1 << 0)
159 #define TARGET_FP (target_flags & MASK_FP)
161 /* This means that floating-point registers are allowed to be used. Note
162 that Alpha implementations without FP operations are required to
163 provide the FP registers. */
165 #define MASK_FPREGS (1 << 1)
166 #define TARGET_FPREGS (target_flags & MASK_FPREGS)
168 /* This means that gas is used to process the assembler file. */
170 #define MASK_GAS (1 << 2)
171 #define TARGET_GAS (target_flags & MASK_GAS)
173 /* This means that we should mark procedures as IEEE conformant. */
175 #define MASK_IEEE_CONFORMANT (1 << 3)
176 #define TARGET_IEEE_CONFORMANT (target_flags & MASK_IEEE_CONFORMANT)
178 /* This means we should be IEEE-compliant except for inexact. */
180 #define MASK_IEEE (1 << 4)
181 #define TARGET_IEEE (target_flags & MASK_IEEE)
183 /* This means we should be fully IEEE-compliant. */
185 #define MASK_IEEE_WITH_INEXACT (1 << 5)
186 #define TARGET_IEEE_WITH_INEXACT (target_flags & MASK_IEEE_WITH_INEXACT)
188 /* This means we must construct all constants rather than emitting
189 them as literal data. */
191 #define MASK_BUILD_CONSTANTS (1 << 6)
192 #define TARGET_BUILD_CONSTANTS (target_flags & MASK_BUILD_CONSTANTS)
194 /* This means we handle floating points in VAX F- (float)
195 or G- (double) Format. */
197 #define MASK_FLOAT_VAX (1 << 7)
198 #define TARGET_FLOAT_VAX (target_flags & MASK_FLOAT_VAX)
200 /* This means that the processor has byte and half word loads and stores
201 (the BWX extension). */
203 #define MASK_BWX (1 << 8)
204 #define TARGET_BWX (target_flags & MASK_BWX)
206 /* This means that the processor has the MAX extension. */
207 #define MASK_MAX (1 << 9)
208 #define TARGET_MAX (target_flags & MASK_MAX)
210 /* This means that the processor has the FIX extension. */
211 #define MASK_FIX (1 << 10)
212 #define TARGET_FIX (target_flags & MASK_FIX)
214 /* This means that the processor has the CIX extension. */
215 #define MASK_CIX (1 << 11)
216 #define TARGET_CIX (target_flags & MASK_CIX)
218 /* This means use !literal style explicit relocations. */
219 #define MASK_EXPLICIT_RELOCS (1 << 12)
220 #define TARGET_EXPLICIT_RELOCS (target_flags & MASK_EXPLICIT_RELOCS)
222 /* This means use 16-bit relocations to .sdata/.sbss. */
223 #define MASK_SMALL_DATA (1 << 13)
224 #define TARGET_SMALL_DATA (target_flags & MASK_SMALL_DATA)
226 /* This means emit thread pointer loads for kernel not user. */
227 #define MASK_TLS_KERNEL (1 << 14)
228 #define TARGET_TLS_KERNEL (target_flags & MASK_TLS_KERNEL)
230 /* This means use direct branches to local functions. */
231 #define MASK_SMALL_TEXT (1 << 15)
232 #define TARGET_SMALL_TEXT (target_flags & MASK_SMALL_TEXT)
234 /* This means use IEEE quad-format for long double. Assumes the
235 presence of the GEM support library routines. */
236 #define MASK_LONG_DOUBLE_128 (1 << 16)
237 #define TARGET_LONG_DOUBLE_128 (target_flags & MASK_LONG_DOUBLE_128)
239 /* This means that the processor is an EV5, EV56, or PCA56.
240 Unlike alpha_cpu this is not affected by -mtune= setting. */
241 #define MASK_CPU_EV5 (1 << 28)
242 #define TARGET_CPU_EV5 (target_flags & MASK_CPU_EV5)
244 /* Likewise for EV6. */
245 #define MASK_CPU_EV6 (1 << 29)
246 #define TARGET_CPU_EV6 (target_flags & MASK_CPU_EV6)
248 /* This means we support the .arch directive in the assembler. Only
249 defined in TARGET_CPU_DEFAULT. */
250 #define MASK_SUPPORT_ARCH (1 << 30)
251 #define TARGET_SUPPORT_ARCH (target_flags & MASK_SUPPORT_ARCH)
253 /* These are for target os support and cannot be changed at runtime. */
254 #define TARGET_ABI_WINDOWS_NT 0
255 #define TARGET_ABI_OPEN_VMS 0
256 #define TARGET_ABI_UNICOSMK 0
257 #define TARGET_ABI_OSF (!TARGET_ABI_WINDOWS_NT \
258 && !TARGET_ABI_OPEN_VMS \
259 && !TARGET_ABI_UNICOSMK)
261 #ifndef TARGET_AS_CAN_SUBTRACT_LABELS
262 #define TARGET_AS_CAN_SUBTRACT_LABELS TARGET_GAS
264 #ifndef TARGET_AS_SLASH_BEFORE_SUFFIX
265 #define TARGET_AS_SLASH_BEFORE_SUFFIX TARGET_GAS
267 #ifndef TARGET_CAN_FAULT_IN_PROLOGUE
268 #define TARGET_CAN_FAULT_IN_PROLOGUE 0
270 #ifndef TARGET_HAS_XFLOATING_LIBS
271 #define TARGET_HAS_XFLOATING_LIBS TARGET_LONG_DOUBLE_128
273 #ifndef TARGET_PROFILING_NEEDS_GP
274 #define TARGET_PROFILING_NEEDS_GP 0
276 #ifndef TARGET_LD_BUGGY_LDGP
277 #define TARGET_LD_BUGGY_LDGP 0
279 #ifndef TARGET_FIXUP_EV5_PREFETCH
280 #define TARGET_FIXUP_EV5_PREFETCH 0
283 #define HAVE_AS_TLS 0
286 /* Macro to define tables used to set the flags.
287 This is a list in braces of pairs in braces,
288 each pair being { "NAME", VALUE }
289 where VALUE is the bits to set or minus the bits to clear.
290 An empty string NAME is used to identify the default VALUE. */
292 #define TARGET_SWITCHES \
293 { {"no-soft-float", MASK_FP, N_("Use hardware fp")}, \
294 {"soft-float", - MASK_FP, N_("Do not use hardware fp")}, \
295 {"fp-regs", MASK_FPREGS, N_("Use fp registers")}, \
296 {"no-fp-regs", - (MASK_FP|MASK_FPREGS), \
297 N_("Do not use fp registers")}, \
298 {"alpha-as", -MASK_GAS, N_("Do not assume GAS")}, \
299 {"gas", MASK_GAS, N_("Assume GAS")}, \
300 {"ieee-conformant", MASK_IEEE_CONFORMANT, \
301 N_("Request IEEE-conformant math library routines (OSF/1)")}, \
302 {"ieee", MASK_IEEE|MASK_IEEE_CONFORMANT, \
303 N_("Emit IEEE-conformant code, without inexact exceptions")}, \
304 {"ieee-with-inexact", MASK_IEEE_WITH_INEXACT|MASK_IEEE_CONFORMANT, \
305 N_("Emit IEEE-conformant code, with inexact exceptions")}, \
306 {"build-constants", MASK_BUILD_CONSTANTS, \
307 N_("Do not emit complex integer constants to read-only memory")}, \
308 {"float-vax", MASK_FLOAT_VAX, N_("Use VAX fp")}, \
309 {"float-ieee", -MASK_FLOAT_VAX, N_("Do not use VAX fp")}, \
310 {"bwx", MASK_BWX, N_("Emit code for the byte/word ISA extension")}, \
311 {"no-bwx", -MASK_BWX, ""}, \
313 N_("Emit code for the motion video ISA extension")}, \
314 {"no-max", -MASK_MAX, ""}, \
316 N_("Emit code for the fp move and sqrt ISA extension")}, \
317 {"no-fix", -MASK_FIX, ""}, \
318 {"cix", MASK_CIX, N_("Emit code for the counting ISA extension")}, \
319 {"no-cix", -MASK_CIX, ""}, \
320 {"explicit-relocs", MASK_EXPLICIT_RELOCS, \
321 N_("Emit code using explicit relocation directives")}, \
322 {"no-explicit-relocs", -MASK_EXPLICIT_RELOCS, ""}, \
323 {"small-data", MASK_SMALL_DATA, \
324 N_("Emit 16-bit relocations to the small data areas")}, \
325 {"large-data", -MASK_SMALL_DATA, \
326 N_("Emit 32-bit relocations to the small data areas")}, \
327 {"small-text", MASK_SMALL_TEXT, \
328 N_("Emit direct branches to local functions")}, \
329 {"large-text", -MASK_SMALL_TEXT, ""}, \
330 {"tls-kernel", MASK_TLS_KERNEL, \
331 N_("Emit rdval instead of rduniq for thread pointer")}, \
332 {"long-double-128", MASK_LONG_DOUBLE_128, \
333 N_("Use 128-bit long double")}, \
334 {"long-double-64", -MASK_LONG_DOUBLE_128, \
335 N_("Use 64-bit long double")}, \
336 {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT \
337 | TARGET_DEFAULT_EXPLICIT_RELOCS, ""} }
339 #define TARGET_DEFAULT MASK_FP|MASK_FPREGS
341 #ifndef TARGET_CPU_DEFAULT
342 #define TARGET_CPU_DEFAULT 0
345 #ifndef TARGET_DEFAULT_EXPLICIT_RELOCS
346 #ifdef HAVE_AS_EXPLICIT_RELOCS
347 #define TARGET_DEFAULT_EXPLICIT_RELOCS MASK_EXPLICIT_RELOCS
349 #define TARGET_DEFAULT_EXPLICIT_RELOCS 0
353 extern const char *alpha_cpu_string; /* For -mcpu= */
354 extern const char *alpha_tune_string; /* For -mtune= */
355 extern const char *alpha_fprm_string; /* For -mfp-rounding-mode=[n|m|c|d] */
356 extern const char *alpha_fptm_string; /* For -mfp-trap-mode=[n|u|su|sui] */
357 extern const char *alpha_tp_string; /* For -mtrap-precision=[p|f|i] */
358 extern const char *alpha_mlat_string; /* For -mmemory-latency= */
359 extern const char *alpha_tls_size_string; /* For -mtls-size= */
361 #define TARGET_OPTIONS \
363 {"cpu=", &alpha_cpu_string, \
364 N_("Use features of and schedule given CPU"), 0}, \
365 {"tune=", &alpha_tune_string, \
366 N_("Schedule given CPU"), 0}, \
367 {"fp-rounding-mode=", &alpha_fprm_string, \
368 N_("Control the generated fp rounding mode"), 0}, \
369 {"fp-trap-mode=", &alpha_fptm_string, \
370 N_("Control the IEEE trap mode"), 0}, \
371 {"trap-precision=", &alpha_tp_string, \
372 N_("Control the precision given to fp exceptions"), 0}, \
373 {"memory-latency=", &alpha_mlat_string, \
374 N_("Tune expected memory latency"), 0}, \
375 {"tls-size=", &alpha_tls_size_string, \
376 N_("Specify bit size of immediate TLS offsets"), 0}, \
379 /* Support for a compile-time default CPU, et cetera. The rules are:
380 --with-cpu is ignored if -mcpu is specified.
381 --with-tune is ignored if -mtune is specified. */
382 #define OPTION_DEFAULT_SPECS \
383 {"cpu", "%{!mcpu=*:-mcpu=%(VALUE)}" }, \
384 {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }
386 /* This macro defines names of additional specifications to put in the
387 specs that can be used in various specifications like CC1_SPEC. Its
388 definition is an initializer with a subgrouping for each command option.
390 Each subgrouping contains a string constant, that defines the
391 specification name, and a string constant that used by the GCC driver
394 Do not define this macro if it does not need to do anything. */
396 #ifndef SUBTARGET_EXTRA_SPECS
397 #define SUBTARGET_EXTRA_SPECS
400 #define EXTRA_SPECS \
401 { "cpp_subtarget", CPP_SUBTARGET_SPEC }, \
402 SUBTARGET_EXTRA_SPECS
405 /* Sometimes certain combinations of command options do not make sense
406 on a particular target machine. You can define a macro
407 `OVERRIDE_OPTIONS' to take account of this. This macro, if
408 defined, is executed once just after all the command options have
411 On the Alpha, it is used to translate target-option strings into
414 #define OVERRIDE_OPTIONS override_options ()
417 /* Define this macro to change register usage conditional on target flags.
419 On the Alpha, we use this to disable the floating-point registers when
422 #define CONDITIONAL_REGISTER_USAGE \
425 if (! TARGET_FPREGS) \
426 for (i = 32; i < 63; i++) \
427 fixed_regs[i] = call_used_regs[i] = 1; \
431 /* Show we can debug even without a frame pointer. */
432 #define CAN_DEBUG_WITHOUT_FP
434 /* target machine storage layout */
436 /* Define the size of `int'. The default is the same as the word size. */
437 #define INT_TYPE_SIZE 32
439 /* Define the size of `long long'. The default is the twice the word size. */
440 #define LONG_LONG_TYPE_SIZE 64
442 /* We're IEEE unless someone says to use VAX. */
443 #define TARGET_FLOAT_FORMAT \
444 (TARGET_FLOAT_VAX ? VAX_FLOAT_FORMAT : IEEE_FLOAT_FORMAT)
446 /* The two floating-point formats we support are S-floating, which is
447 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double'
448 and `long double' are T. */
450 #define FLOAT_TYPE_SIZE 32
451 #define DOUBLE_TYPE_SIZE 64
452 #define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64)
454 /* Define this to set long double type size to use in libgcc2.c, which can
455 not depend on target_flags. */
456 #ifdef __LONG_DOUBLE_128__
457 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128
459 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
462 /* Work around target_flags dependency in ada/targtyps.c. */
463 #define WIDEST_HARDWARE_FP_SIZE 64
465 #define WCHAR_TYPE "unsigned int"
466 #define WCHAR_TYPE_SIZE 32
468 /* Define this macro if it is advisable to hold scalars in registers
469 in a wider mode than that declared by the program. In such cases,
470 the value is constrained to be within the bounds of the declared
471 type, but kept valid in the wider mode. The signedness of the
472 extension may differ from that of the type.
474 For Alpha, we always store objects in a full register. 32-bit objects
475 are always sign-extended, but smaller objects retain their signedness. */
477 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
478 if (GET_MODE_CLASS (MODE) == MODE_INT \
479 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
481 if ((MODE) == SImode) \
486 /* Define this if most significant bit is lowest numbered
487 in instructions that operate on numbered bit-fields.
489 There are no such instructions on the Alpha, but the documentation
491 #define BITS_BIG_ENDIAN 0
493 /* Define this if most significant byte of a word is the lowest numbered.
494 This is false on the Alpha. */
495 #define BYTES_BIG_ENDIAN 0
497 /* Define this if most significant word of a multiword number is lowest
500 For Alpha we can decide arbitrarily since there are no machine instructions
501 for them. Might as well be consistent with bytes. */
502 #define WORDS_BIG_ENDIAN 0
504 /* Width of a word, in units (bytes). */
505 #define UNITS_PER_WORD 8
507 /* Width in bits of a pointer.
508 See also the macro `Pmode' defined below. */
509 #define POINTER_SIZE 64
511 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
512 #define PARM_BOUNDARY 64
514 /* Boundary (in *bits*) on which stack pointer should be aligned. */
515 #define STACK_BOUNDARY 128
517 /* Allocation boundary (in *bits*) for the code of a function. */
518 #define FUNCTION_BOUNDARY 32
520 /* Alignment of field after `int : 0' in a structure. */
521 #define EMPTY_FIELD_BOUNDARY 64
523 /* Every structure's size must be a multiple of this. */
524 #define STRUCTURE_SIZE_BOUNDARY 8
526 /* A bit-field declared as `int' forces `int' alignment for the struct. */
527 #define PCC_BITFIELD_TYPE_MATTERS 1
529 /* No data type wants to be aligned rounder than this. */
530 #define BIGGEST_ALIGNMENT 128
532 /* For atomic access to objects, must have at least 32-bit alignment
533 unless the machine has byte operations. */
534 #define MINIMUM_ATOMIC_ALIGNMENT ((unsigned int) (TARGET_BWX ? 8 : 32))
536 /* Align all constants and variables to at least a word boundary so
537 we can pick up pieces of them faster. */
538 /* ??? Only if block-move stuff knows about different source/destination
541 #define CONSTANT_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
542 #define DATA_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
545 /* Set this nonzero if move instructions will actually fail to work
546 when given unaligned data.
548 Since we get an error message when we do one, call them invalid. */
550 #define STRICT_ALIGNMENT 1
552 /* Set this nonzero if unaligned move instructions are extremely slow.
554 On the Alpha, they trap. */
556 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1
558 /* Standard register usage. */
560 /* Number of actual hardware registers.
561 The hardware registers are assigned numbers for the compiler
562 from 0 to just below FIRST_PSEUDO_REGISTER.
563 All registers that the compiler knows about must be given numbers,
564 even those that are not normally considered general registers.
566 We define all 32 integer registers, even though $31 is always zero,
567 and all 32 floating-point registers, even though $f31 is also
568 always zero. We do not bother defining the FP status register and
569 there are no other registers.
571 Since $31 is always zero, we will use register number 31 as the
572 argument pointer. It will never appear in the generated code
573 because we will always be eliminating it in favor of the stack
574 pointer or hardware frame pointer.
576 Likewise, we use $f31 for the frame pointer, which will always
577 be eliminated in favor of the hardware frame pointer or the
580 #define FIRST_PSEUDO_REGISTER 64
582 /* 1 for registers that have pervasive standard uses
583 and are not available for the register allocator. */
585 #define FIXED_REGISTERS \
586 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
587 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
588 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
589 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
591 /* 1 for registers not available across function calls.
592 These must include the FIXED_REGISTERS and also any
593 registers that can be used without being saved.
594 The latter must include the registers where values are returned
595 and the register where structure-value addresses are passed.
596 Aside from that, you can include as many other registers as you like. */
597 #define CALL_USED_REGISTERS \
598 {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
599 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
600 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
601 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
603 /* List the order in which to allocate registers. Each register must be
604 listed once, even those in FIXED_REGISTERS. */
606 #define REG_ALLOC_ORDER { \
607 1, 2, 3, 4, 5, 6, 7, 8, /* nonsaved integer registers */ \
608 22, 23, 24, 25, 28, /* likewise */ \
609 0, /* likewise, but return value */ \
610 21, 20, 19, 18, 17, 16, /* likewise, but input args */ \
611 27, /* likewise, but OSF procedure value */ \
613 42, 43, 44, 45, 46, 47, /* nonsaved floating-point registers */ \
614 54, 55, 56, 57, 58, 59, /* likewise */ \
615 60, 61, 62, /* likewise */ \
616 32, 33, /* likewise, but return values */ \
617 53, 52, 51, 50, 49, 48, /* likewise, but input args */ \
619 9, 10, 11, 12, 13, 14, /* saved integer registers */ \
620 26, /* return address */ \
621 15, /* hard frame pointer */ \
623 34, 35, 36, 37, 38, 39, /* saved floating-point registers */ \
624 40, 41, /* likewise */ \
626 29, 30, 31, 63 /* gp, sp, ap, sfp */ \
629 /* Return number of consecutive hard regs needed starting at reg REGNO
630 to hold something of mode MODE.
631 This is ordinarily the length in words of a value of mode MODE
632 but can be less for certain modes in special long registers. */
634 #define HARD_REGNO_NREGS(REGNO, MODE) \
635 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
637 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
638 On Alpha, the integer registers can hold any mode. The floating-point
639 registers can hold 64-bit integers as well, but not smaller values. */
641 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
642 ((REGNO) >= 32 && (REGNO) <= 62 \
643 ? (MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode \
646 /* Value is 1 if MODE is a supported vector mode. */
648 #define VECTOR_MODE_SUPPORTED_P(MODE) \
650 && ((MODE) == V8QImode || (MODE) == V4HImode || (MODE) == V2SImode))
652 /* A C expression that is nonzero if a value of mode
653 MODE1 is accessible in mode MODE2 without copying.
655 This asymmetric test is true when MODE1 could be put
656 in an FP register but MODE2 could not. */
658 #define MODES_TIEABLE_P(MODE1, MODE2) \
659 (HARD_REGNO_MODE_OK (32, (MODE1)) \
660 ? HARD_REGNO_MODE_OK (32, (MODE2)) \
663 /* Specify the registers used for certain standard purposes.
664 The values of these macros are register numbers. */
666 /* Alpha pc isn't overloaded on a register that the compiler knows about. */
667 /* #define PC_REGNUM */
669 /* Register to use for pushing function arguments. */
670 #define STACK_POINTER_REGNUM 30
672 /* Base register for access to local variables of the function. */
673 #define HARD_FRAME_POINTER_REGNUM 15
675 /* Value should be nonzero if functions must have frame pointers.
676 Zero means the frame pointer need not be set up (and parms
677 may be accessed via the stack pointer) in functions that seem suitable.
678 This is computed in `reload', in reload1.c. */
679 #define FRAME_POINTER_REQUIRED 0
681 /* Base register for access to arguments of the function. */
682 #define ARG_POINTER_REGNUM 31
684 /* Base register for access to local variables of function. */
685 #define FRAME_POINTER_REGNUM 63
687 /* Register in which static-chain is passed to a function.
689 For the Alpha, this is based on an example; the calling sequence
690 doesn't seem to specify this. */
691 #define STATIC_CHAIN_REGNUM 1
693 /* The register number of the register used to address a table of
694 static data addresses in memory. */
695 #define PIC_OFFSET_TABLE_REGNUM 29
697 /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM'
698 is clobbered by calls. */
699 /* ??? It is and it isn't. It's required to be valid for a given
700 function when the function returns. It isn't clobbered by
701 current_file functions. Moreover, we do not expose the ldgp
702 until after reload, so we're probably safe. */
703 /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */
705 /* Define the classes of registers for register constraints in the
706 machine description. Also define ranges of constants.
708 One of the classes must always be named ALL_REGS and include all hard regs.
709 If there is more than one class, another class must be named NO_REGS
710 and contain no registers.
712 The name GENERAL_REGS must be the name of a class (or an alias for
713 another name such as ALL_REGS). This is the class of registers
714 that is allowed by "g" or "r" in a register constraint.
715 Also, registers outside this class are allocated only when
716 instructions express preferences for them.
718 The classes must be numbered in nondecreasing order; that is,
719 a larger-numbered class must never be contained completely
720 in a smaller-numbered class.
722 For any two classes, it is very desirable that there be another
723 class that represents their union. */
726 NO_REGS, R0_REG, R24_REG, R25_REG, R27_REG,
727 GENERAL_REGS, FLOAT_REGS, ALL_REGS,
731 #define N_REG_CLASSES (int) LIM_REG_CLASSES
733 /* Give names of register classes as strings for dump file. */
735 #define REG_CLASS_NAMES \
736 {"NO_REGS", "R0_REG", "R24_REG", "R25_REG", "R27_REG", \
737 "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
739 /* Define which registers fit in which classes.
740 This is an initializer for a vector of HARD_REG_SET
741 of length N_REG_CLASSES. */
743 #define REG_CLASS_CONTENTS \
744 { {0x00000000, 0x00000000}, /* NO_REGS */ \
745 {0x00000001, 0x00000000}, /* R0_REG */ \
746 {0x01000000, 0x00000000}, /* R24_REG */ \
747 {0x02000000, 0x00000000}, /* R25_REG */ \
748 {0x08000000, 0x00000000}, /* R27_REG */ \
749 {0xffffffff, 0x80000000}, /* GENERAL_REGS */ \
750 {0x00000000, 0x7fffffff}, /* FLOAT_REGS */ \
751 {0xffffffff, 0xffffffff} }
753 /* The same information, inverted:
754 Return the class number of the smallest class containing
755 reg number REGNO. This could be a conditional expression
756 or could index an array. */
758 #define REGNO_REG_CLASS(REGNO) \
759 ((REGNO) == 0 ? R0_REG \
760 : (REGNO) == 24 ? R24_REG \
761 : (REGNO) == 25 ? R25_REG \
762 : (REGNO) == 27 ? R27_REG \
763 : (REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS \
766 /* The class value for index registers, and the one for base regs. */
767 #define INDEX_REG_CLASS NO_REGS
768 #define BASE_REG_CLASS GENERAL_REGS
770 /* Get reg_class from a letter such as appears in the machine description. */
772 #define REG_CLASS_FROM_LETTER(C) \
773 ((C) == 'a' ? R24_REG \
774 : (C) == 'b' ? R25_REG \
775 : (C) == 'c' ? R27_REG \
776 : (C) == 'f' ? FLOAT_REGS \
777 : (C) == 'v' ? R0_REG \
780 /* Define this macro to change register usage conditional on target flags. */
781 /* #define CONDITIONAL_REGISTER_USAGE */
783 /* The letters I, J, K, L, M, N, O, and P in a register constraint string
784 can be used to stand for particular ranges of immediate operands.
785 This macro defines what the ranges are.
786 C is the letter, and VALUE is a constant value.
787 Return 1 if VALUE is in the range specified by C.
790 `I' is used for the range of constants most insns can contain.
791 `J' is the constant zero.
792 `K' is used for the constant in an LDA insn.
793 `L' is used for the constant in a LDAH insn.
794 `M' is used for the constants that can be AND'ed with using a ZAP insn.
795 `N' is used for complemented 8-bit constants.
796 `O' is used for negated 8-bit constants.
797 `P' is used for the constants 1, 2 and 3. */
799 #define CONST_OK_FOR_LETTER_P alpha_const_ok_for_letter_p
801 /* Similar, but for floating or large integer constants, and defining letters
802 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
804 For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE
805 that is the operand of a ZAP insn. */
807 #define CONST_DOUBLE_OK_FOR_LETTER_P alpha_const_double_ok_for_letter_p
809 /* Optional extra constraints for this machine.
811 For the Alpha, `Q' means that this is a memory operand but not a
812 reference to an unaligned location.
814 `R' is a SYMBOL_REF that has SYMBOL_REF_FLAG set or is the current
817 'S' is a 6-bit constant (valid for a shift insn).
821 'U' is a symbolic operand.
823 'W' is a vector zero. */
825 #define EXTRA_CONSTRAINT alpha_extra_constraint
827 /* Given an rtx X being reloaded into a reg required to be
828 in class CLASS, return the class of reg to actually use.
829 In general this is just CLASS; but on some machines
830 in some cases it is preferable to use a more restrictive class. */
832 #define PREFERRED_RELOAD_CLASS alpha_preferred_reload_class
834 /* Loading and storing HImode or QImode values to and from memory
835 usually requires a scratch register. The exceptions are loading
836 QImode and HImode from an aligned address to a general register
837 unless byte instructions are permitted.
838 We also cannot load an unaligned address or a paradoxical SUBREG into an
841 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \
842 secondary_reload_class((CLASS), (MODE), (IN), 1)
844 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \
845 secondary_reload_class((CLASS), (MODE), (OUT), 0)
847 /* If we are copying between general and FP registers, we need a memory
848 location unless the FIX extension is available. */
850 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
851 (! TARGET_FIX && (((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \
852 || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS)))
854 /* Specify the mode to be used for memory when a secondary memory
855 location is needed. If MODE is floating-point, use it. Otherwise,
856 widen to a word like the default. This is needed because we always
857 store integers in FP registers in quadword format. This whole
858 area is very tricky! */
859 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
860 (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \
861 : GET_MODE_SIZE (MODE) >= 4 ? (MODE) \
862 : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0))
864 /* Return the maximum number of consecutive registers
865 needed to represent mode MODE in a register of class CLASS. */
867 #define CLASS_MAX_NREGS(CLASS, MODE) \
868 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
870 /* Return the class of registers that cannot change mode from FROM to TO. */
872 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
873 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
874 ? reg_classes_intersect_p (FLOAT_REGS, CLASS) : 0)
876 /* Define the cost of moving between registers of various classes. Moving
877 between FLOAT_REGS and anything else except float regs is expensive.
878 In fact, we make it quite expensive because we really don't want to
879 do these moves unless it is clearly worth it. Optimizations may
880 reduce the impact of not being able to allocate a pseudo to a
883 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
884 (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) \
886 : TARGET_FIX ? 3 : 4+2*alpha_memory_latency)
888 /* A C expressions returning the cost of moving data of MODE from a register to
891 On the Alpha, bump this up a bit. */
893 extern int alpha_memory_latency;
894 #define MEMORY_MOVE_COST(MODE,CLASS,IN) (2*alpha_memory_latency)
896 /* Provide the cost of a branch. Exact meaning under development. */
897 #define BRANCH_COST 5
899 /* Stack layout; function entry, exit and calling. */
901 /* Define this if pushing a word on the stack
902 makes the stack pointer a smaller address. */
903 #define STACK_GROWS_DOWNWARD
905 /* Define this if the nominal address of the stack frame
906 is at the high-address end of the local variables;
907 that is, each additional local variable allocated
908 goes at a more negative offset in the frame. */
909 /* #define FRAME_GROWS_DOWNWARD */
911 /* Offset within stack frame to start allocating local variables at.
912 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
913 first local allocated. Otherwise, it is the offset to the BEGINNING
914 of the first local allocated. */
916 #define STARTING_FRAME_OFFSET 0
918 /* If we generate an insn to push BYTES bytes,
919 this says how many the stack pointer really advances by.
920 On Alpha, don't define this because there are no push insns. */
921 /* #define PUSH_ROUNDING(BYTES) */
923 /* Define this to be nonzero if stack checking is built into the ABI. */
924 #define STACK_CHECK_BUILTIN 1
926 /* Define this if the maximum size of all the outgoing args is to be
927 accumulated and pushed during the prologue. The amount can be
928 found in the variable current_function_outgoing_args_size. */
929 #define ACCUMULATE_OUTGOING_ARGS 1
931 /* Offset of first parameter from the argument pointer register value. */
933 #define FIRST_PARM_OFFSET(FNDECL) 0
935 /* Definitions for register eliminations.
937 We have two registers that can be eliminated on the Alpha. First, the
938 frame pointer register can often be eliminated in favor of the stack
939 pointer register. Secondly, the argument pointer register can always be
940 eliminated; it is replaced with either the stack or frame pointer. */
942 /* This is an array of structures. Each structure initializes one pair
943 of eliminable registers. The "from" register number is given first,
944 followed by "to". Eliminations of the same "from" register are listed
945 in order of preference. */
947 #define ELIMINABLE_REGS \
948 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
949 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
950 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
951 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
953 /* Given FROM and TO register numbers, say whether this elimination is allowed.
954 Frame pointer elimination is automatically handled.
956 All eliminations are valid since the cases where FP can't be
957 eliminated are already handled. */
959 #define CAN_ELIMINATE(FROM, TO) 1
961 /* Round up to a multiple of 16 bytes. */
962 #define ALPHA_ROUND(X) (((X) + 15) & ~ 15)
964 /* Define the offset between two registers, one to be eliminated, and the other
965 its replacement, at the start of a routine. */
966 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
967 ((OFFSET) = alpha_initial_elimination_offset(FROM, TO))
969 /* Define this if stack space is still allocated for a parameter passed
971 /* #define REG_PARM_STACK_SPACE */
973 /* Value is the number of bytes of arguments automatically
974 popped when returning from a subroutine call.
975 FUNDECL is the declaration node of the function (as a tree),
976 FUNTYPE is the data type of the function (as a tree),
977 or for a library call it is an identifier node for the subroutine name.
978 SIZE is the number of bytes of arguments passed on the stack. */
980 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
982 /* Define how to find the value returned by a function.
983 VALTYPE is the data type of the value (as a tree).
984 If the precise function being called is known, FUNC is its FUNCTION_DECL;
985 otherwise, FUNC is 0.
987 On Alpha the value is found in $0 for integer functions and
988 $f0 for floating-point functions. */
990 #define FUNCTION_VALUE(VALTYPE, FUNC) \
991 function_value (VALTYPE, FUNC, VOIDmode)
993 /* Define how to find the value returned by a library function
994 assuming the value has mode MODE. */
996 #define LIBCALL_VALUE(MODE) \
997 function_value (NULL, NULL, MODE)
999 /* 1 if N is a possible register number for a function value
1000 as seen by the caller. */
1002 #define FUNCTION_VALUE_REGNO_P(N) \
1003 ((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33)
1005 /* 1 if N is a possible register number for function argument passing.
1006 On Alpha, these are $16-$21 and $f16-$f21. */
1008 #define FUNCTION_ARG_REGNO_P(N) \
1009 (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
1011 /* Define a data type for recording info about an argument list
1012 during the scan of that argument list. This data type should
1013 hold all necessary information about the function itself
1014 and about the args processed so far, enough to enable macros
1015 such as FUNCTION_ARG to determine where the next arg should go.
1017 On Alpha, this is a single integer, which is a number of words
1018 of arguments scanned so far.
1019 Thus 6 or more means all following args should go on the stack. */
1021 #define CUMULATIVE_ARGS int
1023 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1024 for a call to a function whose data type is FNTYPE.
1025 For a library call, FNTYPE is 0. */
1027 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
1030 /* Define intermediate macro to compute the size (in registers) of an argument
1033 #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \
1034 ((MODE) == TFmode || (MODE) == TCmode ? 1 \
1035 : (((MODE) == BLKmode ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \
1036 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
1038 /* Update the data in CUM to advance over an argument
1039 of mode MODE and data type TYPE.
1040 (TYPE is null for libcalls where that information may not be available.) */
1042 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1044 (targetm.calls.must_pass_in_stack (MODE, TYPE)) \
1045 ? 6 : ALPHA_ARG_SIZE (MODE, TYPE, NAMED))
1047 /* Determine where to put an argument to a function.
1048 Value is zero to push the argument on the stack,
1049 or a hard register in which to store the argument.
1051 MODE is the argument's machine mode.
1052 TYPE is the data type of the argument (as a tree).
1053 This is null for libcalls where that information may
1055 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1056 the preceding args and about the function being called.
1057 NAMED is nonzero if this argument is a named parameter
1058 (otherwise it is an extra parameter matching an ellipsis).
1060 On Alpha the first 6 words of args are normally in registers
1061 and the rest are pushed. */
1063 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1064 function_arg((CUM), (MODE), (TYPE), (NAMED))
1066 /* A C expression that indicates when an argument must be passed by
1067 reference. If nonzero for an argument, a copy of that argument is
1068 made in memory and a pointer to the argument is passed instead of
1069 the argument itself. The pointer is passed in whatever way is
1070 appropriate for passing a pointer to that type. */
1072 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
1073 ((MODE) == TFmode || (MODE) == TCmode)
1075 /* For an arg passed partly in registers and partly in memory,
1076 this is the number of registers used.
1077 For args passed entirely in registers or entirely in memory, zero. */
1079 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1080 ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \
1083 /* Try to output insns to set TARGET equal to the constant C if it can be
1084 done in less than N insns. Do all computations in MODE. Returns the place
1085 where the output has been placed if it can be done and the insns have been
1086 emitted. If it would take more than N insns, zero is returned and no
1087 insns and emitted. */
1089 /* Define the information needed to generate branch and scc insns. This is
1090 stored from the compare operation. Note that we can't use "rtx" here
1091 since it hasn't been defined! */
1093 struct alpha_compare
1095 struct rtx_def *op0, *op1;
1099 extern struct alpha_compare alpha_compare;
1101 /* Make (or fake) .linkage entry for function call.
1102 IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */
1104 /* This macro defines the start of an assembly comment. */
1106 #define ASM_COMMENT_START " #"
1108 /* This macro produces the initial definition of a function. */
1110 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
1111 alpha_start_function(FILE,NAME,DECL);
1113 /* This macro closes up a function definition for the assembler. */
1115 #define ASM_DECLARE_FUNCTION_SIZE(FILE,NAME,DECL) \
1116 alpha_end_function(FILE,NAME,DECL)
1118 /* Output any profiling code before the prologue. */
1120 #define PROFILE_BEFORE_PROLOGUE 1
1122 /* Never use profile counters. */
1124 #define NO_PROFILE_COUNTERS 1
1126 /* Output assembler code to FILE to increment profiler label # LABELNO
1127 for profiling a function entry. Under OSF/1, profiling is enabled
1128 by simply passing -pg to the assembler and linker. */
1130 #define FUNCTION_PROFILER(FILE, LABELNO)
1132 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1133 the stack pointer does not matter. The value is tested only in
1134 functions that have frame pointers.
1135 No definition is equivalent to always zero. */
1137 #define EXIT_IGNORE_STACK 1
1139 /* Define registers used by the epilogue and return instruction. */
1141 #define EPILOGUE_USES(REGNO) ((REGNO) == 26)
1143 /* Output assembler code for a block containing the constant parts
1144 of a trampoline, leaving space for the variable parts.
1146 The trampoline should set the static chain pointer to value placed
1147 into the trampoline and should branch to the specified routine.
1148 Note that $27 has been set to the address of the trampoline, so we can
1149 use it for addressability of the two data items. */
1151 #define TRAMPOLINE_TEMPLATE(FILE) \
1153 fprintf (FILE, "\tldq $1,24($27)\n"); \
1154 fprintf (FILE, "\tldq $27,16($27)\n"); \
1155 fprintf (FILE, "\tjmp $31,($27),0\n"); \
1156 fprintf (FILE, "\tnop\n"); \
1157 fprintf (FILE, "\t.quad 0,0\n"); \
1160 /* Section in which to place the trampoline. On Alpha, instructions
1161 may only be placed in a text segment. */
1163 #define TRAMPOLINE_SECTION text_section
1165 /* Length in units of the trampoline for entering a nested function. */
1167 #define TRAMPOLINE_SIZE 32
1169 /* The alignment of a trampoline, in bits. */
1171 #define TRAMPOLINE_ALIGNMENT 64
1173 /* Emit RTL insns to initialize the variable parts of a trampoline.
1174 FNADDR is an RTX for the address of the function's pure code.
1175 CXT is an RTX for the static chain value for the function. */
1177 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1178 alpha_initialize_trampoline (TRAMP, FNADDR, CXT, 16, 24, 8)
1180 /* A C expression whose value is RTL representing the value of the return
1181 address for the frame COUNT steps up from the current frame.
1182 FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of
1183 the COUNT-1 frame if RETURN_ADDR_IN_PREVIOUS_FRAME is defined. */
1185 #define RETURN_ADDR_RTX alpha_return_addr
1187 /* Before the prologue, RA lives in $26. */
1188 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 26)
1189 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26)
1190 #define DWARF_ALT_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (64)
1192 /* Describe how we implement __builtin_eh_return. */
1193 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 16 : INVALID_REGNUM)
1194 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 28)
1195 #define EH_RETURN_HANDLER_RTX \
1196 gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \
1197 current_function_outgoing_args_size))
1199 /* Addressing modes, and classification of registers for them. */
1201 /* Macros to check register numbers against specific register classes. */
1203 /* These assume that REGNO is a hard or pseudo reg number.
1204 They give nonzero only if REGNO is a hard reg of the suitable class
1205 or a pseudo reg currently allocated to a suitable hard reg.
1206 Since they use reg_renumber, they are safe only once reg_renumber
1207 has been allocated, which happens in local-alloc.c. */
1209 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
1210 #define REGNO_OK_FOR_BASE_P(REGNO) \
1211 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \
1212 || (REGNO) == 63 || reg_renumber[REGNO] == 63)
1214 /* Maximum number of registers that can appear in a valid memory address. */
1215 #define MAX_REGS_PER_ADDRESS 1
1217 /* Recognize any constant value that is a valid address. For the Alpha,
1218 there are only constants none since we want to use LDA to load any
1219 symbolic addresses into registers. */
1221 #define CONSTANT_ADDRESS_P(X) \
1222 (GET_CODE (X) == CONST_INT \
1223 && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
1225 /* Include all constant integers and constant doubles, but not
1226 floating-point, except for floating-point zero. */
1228 #define LEGITIMATE_CONSTANT_P(X) \
1229 (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1230 || (X) == CONST0_RTX (GET_MODE (X)))
1232 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1233 and check its validity for a certain class.
1234 We have two alternate definitions for each of them.
1235 The usual definition accepts all pseudo regs; the other rejects
1236 them unless they have been allocated suitable hard regs.
1237 The symbol REG_OK_STRICT causes the latter definition to be used.
1239 Most source files want to accept pseudo regs in the hope that
1240 they will get allocated to the class that the insn wants them to be in.
1241 Source files for reload pass need to be strict.
1242 After reload, it makes no difference, since pseudo regs have
1243 been eliminated by then. */
1245 /* Nonzero if X is a hard reg that can be used as an index
1246 or if it is a pseudo reg. */
1247 #define REG_OK_FOR_INDEX_P(X) 0
1249 /* Nonzero if X is a hard reg that can be used as a base reg
1250 or if it is a pseudo reg. */
1251 #define NONSTRICT_REG_OK_FOR_BASE_P(X) \
1252 (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1254 /* ??? Nonzero if X is the frame pointer, or some virtual register
1255 that may eliminate to the frame pointer. These will be allowed to
1256 have offsets greater than 32K. This is done because register
1257 elimination offsets will change the hi/lo split, and if we split
1258 before reload, we will require additional instructions. */
1259 #define NONSTRICT_REG_OK_FP_BASE_P(X) \
1260 (REGNO (X) == 31 || REGNO (X) == 63 \
1261 || (REGNO (X) >= FIRST_PSEUDO_REGISTER \
1262 && REGNO (X) < LAST_VIRTUAL_REGISTER))
1264 /* Nonzero if X is a hard reg that can be used as a base reg. */
1265 #define STRICT_REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1267 #ifdef REG_OK_STRICT
1268 #define REG_OK_FOR_BASE_P(X) STRICT_REG_OK_FOR_BASE_P (X)
1270 #define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P (X)
1273 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
1274 valid memory address for an instruction. */
1276 #ifdef REG_OK_STRICT
1277 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
1279 if (alpha_legitimate_address_p (MODE, X, 1)) \
1283 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
1285 if (alpha_legitimate_address_p (MODE, X, 0)) \
1290 /* Try machine-dependent ways of modifying an illegitimate address
1291 to be legitimate. If we find one, return the new, valid address.
1292 This macro is used in only one place: `memory_address' in explow.c. */
1294 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1296 rtx new_x = alpha_legitimize_address (X, NULL_RTX, MODE); \
1304 /* Try a machine-dependent way of reloading an illegitimate address
1305 operand. If we find one, push the reload and jump to WIN. This
1306 macro is used in only one place: `find_reloads_address' in reload.c. */
1308 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \
1310 rtx new_x = alpha_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \
1318 /* Go to LABEL if ADDR (a legitimate address expression)
1319 has an effect that depends on the machine mode it is used for.
1320 On the Alpha this is true only for the unaligned modes. We can
1321 simplify this test since we know that the address must be valid. */
1323 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1324 { if (GET_CODE (ADDR) == AND) goto LABEL; }
1326 /* Specify the machine mode that this machine uses
1327 for the index in the tablejump instruction. */
1328 #define CASE_VECTOR_MODE SImode
1330 /* Define as C expression which evaluates to nonzero if the tablejump
1331 instruction expects the table to contain offsets from the address of the
1334 Do not define this if the table should contain absolute addresses.
1335 On the Alpha, the table is really GP-relative, not relative to the PC
1336 of the table, but we pretend that it is PC-relative; this should be OK,
1337 but we should try to find some better way sometime. */
1338 #define CASE_VECTOR_PC_RELATIVE 1
1340 /* Define this as 1 if `char' should by default be signed; else as 0. */
1341 #define DEFAULT_SIGNED_CHAR 1
1343 /* Max number of bytes we can move to or from memory
1344 in one reasonably fast instruction. */
1348 /* If a memory-to-memory move would take MOVE_RATIO or more simple
1349 move-instruction pairs, we will do a movmem or libcall instead.
1351 Without byte/word accesses, we want no more than four instructions;
1352 with, several single byte accesses are better. */
1354 #define MOVE_RATIO (TARGET_BWX ? 7 : 2)
1356 /* Largest number of bytes of an object that can be placed in a register.
1357 On the Alpha we have plenty of registers, so use TImode. */
1358 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1360 /* Nonzero if access to memory by bytes is no faster than for words.
1361 Also nonzero if doing byte operations (specifically shifts) in registers
1364 On the Alpha, we want to not use the byte operation and instead use
1365 masking operations to access fields; these will save instructions. */
1367 #define SLOW_BYTE_ACCESS 1
1369 /* Define if operations between registers always perform the operation
1370 on the full register even if a narrower mode is specified. */
1371 #define WORD_REGISTER_OPERATIONS
1373 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1374 will either zero-extend or sign-extend. The value of this macro should
1375 be the code that says which one of the two operations is implicitly
1376 done, NIL if none. */
1377 #define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND)
1379 /* Define if loading short immediate values into registers sign extends. */
1380 #define SHORT_IMMEDIATES_SIGN_EXTEND
1382 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1383 is done just by pretending it is already truncated. */
1384 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1386 /* The CIX ctlz and cttz instructions return 64 for zero. */
1387 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX)
1388 #define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, TARGET_CIX)
1390 /* Define the value returned by a floating-point comparison instruction. */
1392 #define FLOAT_STORE_FLAG_VALUE(MODE) \
1393 REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE))
1395 /* Canonicalize a comparison from one we don't have to one we do have. */
1397 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
1399 if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \
1400 && (GET_CODE (OP1) == REG || (OP1) == const0_rtx)) \
1405 (CODE) = swap_condition (CODE); \
1407 if (((CODE) == LT || (CODE) == LTU) \
1408 && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256) \
1410 (CODE) = (CODE) == LT ? LE : LEU; \
1411 (OP1) = GEN_INT (255); \
1415 /* Specify the machine mode that pointers have.
1416 After generation of rtl, the compiler makes no further distinction
1417 between pointers and any other objects of this machine mode. */
1418 #define Pmode DImode
1420 /* Mode of a function address in a call instruction (for indexing purposes). */
1422 #define FUNCTION_MODE Pmode
1424 /* Define this if addresses of constant functions
1425 shouldn't be put through pseudo regs where they can be cse'd.
1426 Desirable on machines where ordinary constants are expensive
1427 but a CALL with constant address is cheap.
1429 We define this on the Alpha so that gen_call and gen_call_value
1430 get to see the SYMBOL_REF (for the hint field of the jsr). It will
1431 then copy it into a register, thus actually letting the address be
1434 #define NO_FUNCTION_CSE
1436 /* Define this to be nonzero if shift instructions ignore all but the low-order
1438 #define SHIFT_COUNT_TRUNCATED 1
1440 /* Control the assembler format that we output. */
1442 /* Output to assembler file text saying following lines
1443 may contain character constants, extra white space, comments, etc. */
1444 #define ASM_APP_ON (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "")
1446 /* Output to assembler file text saying following lines
1447 no longer contain unusual constructs. */
1448 #define ASM_APP_OFF (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "")
1450 #define TEXT_SECTION_ASM_OP "\t.text"
1452 /* Output before read-only data. */
1454 #define READONLY_DATA_SECTION_ASM_OP "\t.rdata"
1456 /* Output before writable data. */
1458 #define DATA_SECTION_ASM_OP "\t.data"
1460 /* How to refer to registers in assembler output.
1461 This sequence is indexed by compiler's hard-register-number (see above). */
1463 #define REGISTER_NAMES \
1464 {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
1465 "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
1466 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \
1467 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \
1468 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
1469 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
1470 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
1471 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"}
1473 /* Strip name encoding when emitting labels. */
1475 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
1477 const char *name_ = NAME; \
1478 if (*name_ == '@' || *name_ == '%') \
1480 if (*name_ == '*') \
1483 fputs (user_label_prefix, STREAM); \
1484 fputs (name_, STREAM); \
1487 /* Globalizing directive for a label. */
1488 #define GLOBAL_ASM_OP "\t.globl "
1490 /* The prefix to add to user-visible assembler symbols. */
1492 #define USER_LABEL_PREFIX ""
1494 /* This is how to output a label for a jump table. Arguments are the same as
1495 for (*targetm.asm_out.internal_label), except the insn for the jump table is
1498 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1499 { ASM_OUTPUT_ALIGN (FILE, 2); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); }
1501 /* This is how to store into the string LABEL
1502 the symbol_ref name of an internal numbered label where
1503 PREFIX is the class of label and NUM is the number within the class.
1504 This is suitable for output with `assemble_name'. */
1506 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1507 sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM))
1509 /* We use the default ASCII-output routine, except that we don't write more
1510 than 50 characters since the assembler doesn't support very long lines. */
1512 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1514 FILE *_hide_asm_out_file = (MYFILE); \
1515 const unsigned char *_hide_p = (const unsigned char *) (MYSTRING); \
1516 int _hide_thissize = (MYLENGTH); \
1517 int _size_so_far = 0; \
1519 FILE *asm_out_file = _hide_asm_out_file; \
1520 const unsigned char *p = _hide_p; \
1521 int thissize = _hide_thissize; \
1523 fprintf (asm_out_file, "\t.ascii \""); \
1525 for (i = 0; i < thissize; i++) \
1527 register int c = p[i]; \
1529 if (_size_so_far ++ > 50 && i < thissize - 4) \
1530 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1532 if (c == '\"' || c == '\\') \
1533 putc ('\\', asm_out_file); \
1534 if (c >= ' ' && c < 0177) \
1535 putc (c, asm_out_file); \
1538 fprintf (asm_out_file, "\\%o", c); \
1539 /* After an octal-escape, if a digit follows, \
1540 terminate one string constant and start another. \
1541 The VAX assembler fails to stop reading the escape \
1542 after three digits, so this is the only way we \
1543 can get it to parse the data properly. */ \
1544 if (i < thissize - 1 && ISDIGIT (p[i + 1])) \
1545 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1548 fprintf (asm_out_file, "\"\n"); \
1553 /* This is how to output an element of a case-vector that is absolute.
1554 (Alpha does not use such vectors, but we must define this macro anyway.) */
1556 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) abort ()
1558 /* This is how to output an element of a case-vector that is relative. */
1560 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1561 fprintf (FILE, "\t.%s $L%d\n", TARGET_ABI_WINDOWS_NT ? "long" : "gprel32", \
1564 /* This is how to output an assembler line
1565 that says to advance the location counter
1566 to a multiple of 2**LOG bytes. */
1568 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1570 fprintf (FILE, "\t.align %d\n", LOG);
1572 /* This is how to advance the location counter by SIZE bytes. */
1574 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1575 fprintf (FILE, "\t.space "HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
1577 /* This says how to output an assembler line
1578 to define a global common symbol. */
1580 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1581 ( fputs ("\t.comm ", (FILE)), \
1582 assemble_name ((FILE), (NAME)), \
1583 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)))
1585 /* This says how to output an assembler line
1586 to define a local common symbol. */
1588 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1589 ( fputs ("\t.lcomm ", (FILE)), \
1590 assemble_name ((FILE), (NAME)), \
1591 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE)))
1594 /* Print operand X (an rtx) in assembler syntax to file FILE.
1595 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1596 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1598 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1600 /* Determine which codes are valid without a following integer. These must
1603 ~ Generates the name of the current function.
1605 / Generates the instruction suffix. The TRAP_SUFFIX and ROUND_SUFFIX
1606 attributes are examined to determine what is appropriate.
1608 , Generates single precision suffix for floating point
1609 instructions (s for IEEE, f for VAX)
1611 - Generates double precision suffix for floating point
1612 instructions (t for IEEE, g for VAX)
1614 + Generates a nop instruction after a noreturn call at the very end
1618 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1619 ((CODE) == '/' || (CODE) == ',' || (CODE) == '-' || (CODE) == '~' \
1620 || (CODE) == '#' || (CODE) == '*' || (CODE) == '&' || (CODE) == '+')
1622 /* Print a memory address as an operand to reference that memory location. */
1624 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1625 print_operand_address((FILE), (ADDR))
1627 /* Define the codes that are matched by predicates in alpha.c. */
1629 #define PREDICATE_CODES \
1630 {"reg_or_0_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE, \
1632 {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \
1633 {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \
1634 {"reg_or_const_int_operand", {SUBREG, REG, CONST_INT}}, \
1635 {"cint8_operand", {CONST_INT}}, \
1636 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1637 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1638 {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \
1639 {"const48_operand", {CONST_INT}}, \
1640 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1641 {"or_operand", {SUBREG, REG, CONST_INT}}, \
1642 {"mode_mask_operand", {CONST_INT}}, \
1643 {"mul8_operand", {CONST_INT}}, \
1644 {"mode_width_operand", {CONST_INT}}, \
1645 {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \
1646 {"alpha_zero_comparison_operator", {EQ, NE, LE, LT, LEU, LTU}}, \
1647 {"alpha_swapped_comparison_operator", {EQ, GE, GT, GEU, GTU}}, \
1648 {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \
1649 {"alpha_fp_comparison_operator", {EQ, LE, LT, UNORDERED}}, \
1650 {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \
1651 {"fix_operator", {FIX, UNSIGNED_FIX}}, \
1652 {"const0_operand", {CONST_INT, CONST_DOUBLE, CONST_VECTOR}}, \
1653 {"samegp_function_operand", {SYMBOL_REF}}, \
1654 {"direct_call_operand", {SYMBOL_REF}}, \
1655 {"local_symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
1656 {"small_symbolic_operand", {SYMBOL_REF, CONST}}, \
1657 {"global_symbolic_operand", {SYMBOL_REF, CONST}}, \
1658 {"dtp16_symbolic_operand", {CONST}}, \
1659 {"dtp32_symbolic_operand", {CONST}}, \
1660 {"gotdtp_symbolic_operand", {CONST}}, \
1661 {"tp16_symbolic_operand", {CONST}}, \
1662 {"tp32_symbolic_operand", {CONST}}, \
1663 {"gottp_symbolic_operand", {CONST}}, \
1664 {"call_operand", {REG, SYMBOL_REF}}, \
1665 {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
1666 CONST_VECTOR, SYMBOL_REF, CONST, LABEL_REF, HIGH}},\
1667 {"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
1668 CONST_VECTOR, SYMBOL_REF, CONST, LABEL_REF, HIGH}}, \
1669 {"some_ni_operand", {SUBREG, REG, MEM}}, \
1670 {"aligned_memory_operand", {MEM}}, \
1671 {"unaligned_memory_operand", {MEM}}, \
1672 {"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}}, \
1673 {"any_memory_operand", {MEM}}, \
1674 {"normal_memory_operand", {MEM}}, \
1675 {"hard_fp_register_operand", {SUBREG, REG}}, \
1676 {"hard_int_register_operand", {SUBREG, REG}}, \
1677 {"reg_not_elim_operand", {SUBREG, REG}}, \
1678 {"reg_no_subreg_operand", {REG}}, \
1679 {"addition_operation", {PLUS}}, \
1680 {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
1681 {"some_small_symbolic_operand", {SET, PARALLEL, PREFETCH, UNSPEC, \
1684 /* Implement `va_start' for varargs and stdarg. */
1685 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
1686 alpha_va_start (valist, nextarg)
1688 /* Implement `va_arg'. */
1689 #define EXPAND_BUILTIN_VA_ARG(valist, type) (abort (), NULL_RTX)
1691 /* Tell collect that the object format is ECOFF. */
1692 #define OBJECT_FORMAT_COFF
1693 #define EXTENDED_COFF
1695 /* If we use NM, pass -g to it so it only lists globals. */
1696 #define NM_FLAGS "-pg"
1698 /* Definitions for debugging. */
1700 #define SDB_DEBUGGING_INFO 1 /* generate info for mips-tfile */
1701 #define DBX_DEBUGGING_INFO 1 /* generate embedded stabs */
1702 #define MIPS_DEBUGGING_INFO 1 /* MIPS specific debugging info */
1704 #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
1705 #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
1709 /* Correct the offset of automatic variables and arguments. Note that
1710 the Alpha debug format wants all automatic variables and arguments
1711 to be in terms of two different offsets from the virtual frame pointer,
1712 which is the stack pointer before any adjustment in the function.
1713 The offset for the argument pointer is fixed for the native compiler,
1714 it is either zero (for the no arguments case) or large enough to hold
1715 all argument registers.
1716 The offset for the auto pointer is the fourth argument to the .frame
1717 directive (local_offset).
1718 To stay compatible with the native tools we use the same offsets
1719 from the virtual frame pointer and adjust the debugger arg/auto offsets
1720 accordingly. These debugger offsets are set up in output_prolog. */
1722 extern long alpha_arg_offset;
1723 extern long alpha_auto_offset;
1724 #define DEBUGGER_AUTO_OFFSET(X) \
1725 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)
1726 #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset)
1729 #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE, COUNTER) \
1730 alpha_output_lineno (STREAM, LINE)
1732 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
1733 alpha_output_filename (STREAM, NAME)
1735 /* mips-tfile.c limits us to strings of one page. We must underestimate this
1736 number, because the real length runs past this up to the next
1737 continuation point. This is really a dbxout.c bug. */
1738 #define DBX_CONTIN_LENGTH 3000
1740 /* By default, turn on GDB extensions. */
1741 #define DEFAULT_GDB_EXTENSIONS 1
1743 /* Stabs-in-ECOFF can't handle dbxout_function_end(). */
1744 #define NO_DBX_FUNCTION_END 1
1746 /* If we are smuggling stabs through the ALPHA ECOFF object
1747 format, put a comment in front of the .stab<x> operation so
1748 that the ALPHA assembler does not choke. The mips-tfile program
1749 will correctly put the stab into the object file. */
1751 #define ASM_STABS_OP ((TARGET_GAS) ? "\t.stabs\t" : " #.stabs\t")
1752 #define ASM_STABN_OP ((TARGET_GAS) ? "\t.stabn\t" : " #.stabn\t")
1753 #define ASM_STABD_OP ((TARGET_GAS) ? "\t.stabd\t" : " #.stabd\t")
1755 /* Forward references to tags are allowed. */
1756 #define SDB_ALLOW_FORWARD_REFERENCES
1758 /* Unknown tags are also allowed. */
1759 #define SDB_ALLOW_UNKNOWN_REFERENCES
1761 #define PUT_SDB_DEF(a) \
1763 fprintf (asm_out_file, "\t%s.def\t", \
1764 (TARGET_GAS) ? "" : "#"); \
1765 ASM_OUTPUT_LABELREF (asm_out_file, a); \
1766 fputc (';', asm_out_file); \
1769 #define PUT_SDB_PLAIN_DEF(a) \
1771 fprintf (asm_out_file, "\t%s.def\t.%s;", \
1772 (TARGET_GAS) ? "" : "#", (a)); \
1775 #define PUT_SDB_TYPE(a) \
1777 fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \
1780 /* For block start and end, we create labels, so that
1781 later we can figure out where the correct offset is.
1782 The normal .ent/.end serve well enough for functions,
1783 so those are just commented out. */
1785 extern int sdb_label_count; /* block start/end next label # */
1787 #define PUT_SDB_BLOCK_START(LINE) \
1789 fprintf (asm_out_file, \
1790 "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \
1792 (TARGET_GAS) ? "" : "#", \
1795 sdb_label_count++; \
1798 #define PUT_SDB_BLOCK_END(LINE) \
1800 fprintf (asm_out_file, \
1801 "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \
1803 (TARGET_GAS) ? "" : "#", \
1806 sdb_label_count++; \
1809 #define PUT_SDB_FUNCTION_START(LINE)
1811 #define PUT_SDB_FUNCTION_END(LINE)
1813 #define PUT_SDB_EPILOGUE_END(NAME) ((void)(NAME))
1815 /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
1816 mips-tdump.c to print them out.
1818 These must match the corresponding definitions in gdb/mipsread.c.
1819 Unfortunately, gcc and gdb do not currently share any directories. */
1821 #define CODE_MASK 0x8F300
1822 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
1823 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
1824 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
1826 /* Override some mips-tfile definitions. */
1828 #define SHASH_SIZE 511
1829 #define THASH_SIZE 55
1831 /* Align ecoff symbol tables to avoid OSF1/1.3 nm complaints. */
1833 #define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7)
1835 /* The system headers under Alpha systems are generally C++-aware. */
1836 #define NO_IMPLICIT_EXTERN_C
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