1 /* Definitions of target machine for GNU compiler, for DEC Alpha.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002 Free Software Foundation, Inc.
4 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 /* For C++ we need to ensure that __LANGUAGE_C_PLUS_PLUS is defined independent
25 of the source file extension. */
26 #define CPLUSPLUS_CPP_SPEC "\
27 -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus \
31 /* Write out the correct language type definition for the header files.
32 Unless we have assembler language, write out the symbols for C. */
35 %{.S:-D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY }}\
36 %{.m:-D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C }\
37 %{!.S:%{!.cc:%{!.cxx:%{!.cpp:%{!.cp:%{!.c++:%{!.C:%{!.m:-D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C }}}}}}}}}\
39 %{mieee-with-inexact:-D_IEEE_FP -D_IEEE_FP_INEXACT }}\
40 %(cpp_cpu) %(cpp_subtarget)"
42 #ifndef CPP_SUBTARGET_SPEC
43 #define CPP_SUBTARGET_SPEC ""
46 /* Set the spec to use for signed char. The default tests the above macro
47 but DEC's compiler can't handle the conditional in a "constant"
50 #define SIGNED_CHAR_SPEC "%{funsigned-char:-D__CHAR_UNSIGNED__}"
52 #define WORD_SWITCH_TAKES_ARG(STR) \
53 (!strcmp (STR, "rpath") || DEFAULT_WORD_SWITCH_TAKES_ARG(STR))
55 /* Print subsidiary information on the compiler version in use. */
56 #define TARGET_VERSION
58 /* Run-time compilation parameters selecting different hardware subsets. */
60 /* Which processor to schedule for. The cpu attribute defines a list that
61 mirrors this list, so changes to alpha.md must be made at the same time. */
64 {PROCESSOR_EV4, /* 2106[46]{a,} */
65 PROCESSOR_EV5, /* 21164{a,pc,} */
66 PROCESSOR_EV6}; /* 21264 */
68 extern enum processor_type alpha_cpu;
70 enum alpha_trap_precision
72 ALPHA_TP_PROG, /* No precision (default). */
73 ALPHA_TP_FUNC, /* Trap contained within originating function. */
74 ALPHA_TP_INSN /* Instruction accuracy and code is resumption safe. */
77 enum alpha_fp_rounding_mode
79 ALPHA_FPRM_NORM, /* Normal rounding mode. */
80 ALPHA_FPRM_MINF, /* Round towards minus-infinity. */
81 ALPHA_FPRM_CHOP, /* Chopped rounding mode (towards 0). */
82 ALPHA_FPRM_DYN /* Dynamic rounding mode. */
85 enum alpha_fp_trap_mode
87 ALPHA_FPTM_N, /* Normal trap mode. */
88 ALPHA_FPTM_U, /* Underflow traps enabled. */
89 ALPHA_FPTM_SU, /* Software completion, w/underflow traps */
90 ALPHA_FPTM_SUI /* Software completion, w/underflow & inexact traps */
93 extern int target_flags;
95 extern enum alpha_trap_precision alpha_tp;
96 extern enum alpha_fp_rounding_mode alpha_fprm;
97 extern enum alpha_fp_trap_mode alpha_fptm;
99 /* This means that floating-point support exists in the target implementation
100 of the Alpha architecture. This is usually the default. */
101 #define MASK_FP (1 << 0)
102 #define TARGET_FP (target_flags & MASK_FP)
104 /* This means that floating-point registers are allowed to be used. Note
105 that Alpha implementations without FP operations are required to
106 provide the FP registers. */
108 #define MASK_FPREGS (1 << 1)
109 #define TARGET_FPREGS (target_flags & MASK_FPREGS)
111 /* This means that gas is used to process the assembler file. */
113 #define MASK_GAS (1 << 2)
114 #define TARGET_GAS (target_flags & MASK_GAS)
116 /* This means that we should mark procedures as IEEE conformant. */
118 #define MASK_IEEE_CONFORMANT (1 << 3)
119 #define TARGET_IEEE_CONFORMANT (target_flags & MASK_IEEE_CONFORMANT)
121 /* This means we should be IEEE-compliant except for inexact. */
123 #define MASK_IEEE (1 << 4)
124 #define TARGET_IEEE (target_flags & MASK_IEEE)
126 /* This means we should be fully IEEE-compliant. */
128 #define MASK_IEEE_WITH_INEXACT (1 << 5)
129 #define TARGET_IEEE_WITH_INEXACT (target_flags & MASK_IEEE_WITH_INEXACT)
131 /* This means we must construct all constants rather than emitting
132 them as literal data. */
134 #define MASK_BUILD_CONSTANTS (1 << 6)
135 #define TARGET_BUILD_CONSTANTS (target_flags & MASK_BUILD_CONSTANTS)
137 /* This means we handle floating points in VAX F- (float)
138 or G- (double) Format. */
140 #define MASK_FLOAT_VAX (1 << 7)
141 #define TARGET_FLOAT_VAX (target_flags & MASK_FLOAT_VAX)
143 /* This means that the processor has byte and half word loads and stores
144 (the BWX extension). */
146 #define MASK_BWX (1 << 8)
147 #define TARGET_BWX (target_flags & MASK_BWX)
149 /* This means that the processor has the MAX extension. */
150 #define MASK_MAX (1 << 9)
151 #define TARGET_MAX (target_flags & MASK_MAX)
153 /* This means that the processor has the FIX extension. */
154 #define MASK_FIX (1 << 10)
155 #define TARGET_FIX (target_flags & MASK_FIX)
157 /* This means that the processor has the CIX extension. */
158 #define MASK_CIX (1 << 11)
159 #define TARGET_CIX (target_flags & MASK_CIX)
161 /* This means use !literal style explicit relocations. */
162 #define MASK_EXPLICIT_RELOCS (1 << 12)
163 #define TARGET_EXPLICIT_RELOCS (target_flags & MASK_EXPLICIT_RELOCS)
165 /* This means use 16-bit relocations to .sdata/.sbss. */
166 #define MASK_SMALL_DATA (1 << 13)
167 #define TARGET_SMALL_DATA (target_flags & MASK_SMALL_DATA)
169 /* This means that the processor is an EV5, EV56, or PCA56.
170 Unlike alpha_cpu this is not affected by -mtune= setting. */
171 #define MASK_CPU_EV5 (1 << 28)
172 #define TARGET_CPU_EV5 (target_flags & MASK_CPU_EV5)
174 /* Likewise for EV6. */
175 #define MASK_CPU_EV6 (1 << 29)
176 #define TARGET_CPU_EV6 (target_flags & MASK_CPU_EV6)
178 /* This means we support the .arch directive in the assembler. Only
179 defined in TARGET_CPU_DEFAULT. */
180 #define MASK_SUPPORT_ARCH (1 << 30)
181 #define TARGET_SUPPORT_ARCH (target_flags & MASK_SUPPORT_ARCH)
183 /* These are for target os support and cannot be changed at runtime. */
184 #define TARGET_ABI_WINDOWS_NT 0
185 #define TARGET_ABI_OPEN_VMS 0
186 #define TARGET_ABI_UNICOSMK 0
187 #define TARGET_ABI_OSF (!TARGET_ABI_WINDOWS_NT \
188 && !TARGET_ABI_OPEN_VMS \
189 && !TARGET_ABI_UNICOSMK)
191 #ifndef TARGET_AS_CAN_SUBTRACT_LABELS
192 #define TARGET_AS_CAN_SUBTRACT_LABELS TARGET_GAS
194 #ifndef TARGET_AS_SLASH_BEFORE_SUFFIX
195 #define TARGET_AS_SLASH_BEFORE_SUFFIX TARGET_GAS
197 #ifndef TARGET_CAN_FAULT_IN_PROLOGUE
198 #define TARGET_CAN_FAULT_IN_PROLOGUE 0
200 #ifndef TARGET_HAS_XFLOATING_LIBS
201 #define TARGET_HAS_XFLOATING_LIBS 0
203 #ifndef TARGET_PROFILING_NEEDS_GP
204 #define TARGET_PROFILING_NEEDS_GP 0
206 #ifndef TARGET_LD_BUGGY_LDGP
207 #define TARGET_LD_BUGGY_LDGP 0
209 #ifndef TARGET_FIXUP_EV5_PREFETCH
210 #define TARGET_FIXUP_EV5_PREFETCH 0
213 /* Macro to define tables used to set the flags.
214 This is a list in braces of pairs in braces,
215 each pair being { "NAME", VALUE }
216 where VALUE is the bits to set or minus the bits to clear.
217 An empty string NAME is used to identify the default VALUE. */
219 #define TARGET_SWITCHES \
220 { {"no-soft-float", MASK_FP, N_("Use hardware fp")}, \
221 {"soft-float", - MASK_FP, N_("Do not use hardware fp")}, \
222 {"fp-regs", MASK_FPREGS, N_("Use fp registers")}, \
223 {"no-fp-regs", - (MASK_FP|MASK_FPREGS), \
224 N_("Do not use fp registers")}, \
225 {"alpha-as", -MASK_GAS, N_("Do not assume GAS")}, \
226 {"gas", MASK_GAS, N_("Assume GAS")}, \
227 {"ieee-conformant", MASK_IEEE_CONFORMANT, \
228 N_("Request IEEE-conformant math library routines (OSF/1)")}, \
229 {"ieee", MASK_IEEE|MASK_IEEE_CONFORMANT, \
230 N_("Emit IEEE-conformant code, without inexact exceptions")}, \
231 {"ieee-with-inexact", MASK_IEEE_WITH_INEXACT|MASK_IEEE_CONFORMANT, \
232 N_("Emit IEEE-conformant code, with inexact exceptions")}, \
233 {"build-constants", MASK_BUILD_CONSTANTS, \
234 N_("Do not emit complex integer constants to read-only memory")}, \
235 {"float-vax", MASK_FLOAT_VAX, N_("Use VAX fp")}, \
236 {"float-ieee", -MASK_FLOAT_VAX, N_("Do not use VAX fp")}, \
237 {"bwx", MASK_BWX, N_("Emit code for the byte/word ISA extension")}, \
238 {"no-bwx", -MASK_BWX, ""}, \
240 N_("Emit code for the motion video ISA extension")}, \
241 {"no-max", -MASK_MAX, ""}, \
243 N_("Emit code for the fp move and sqrt ISA extension")}, \
244 {"no-fix", -MASK_FIX, ""}, \
245 {"cix", MASK_CIX, N_("Emit code for the counting ISA extension")}, \
246 {"no-cix", -MASK_CIX, ""}, \
247 {"explicit-relocs", MASK_EXPLICIT_RELOCS, \
248 N_("Emit code using explicit relocation directives")}, \
249 {"no-explicit-relocs", -MASK_EXPLICIT_RELOCS, ""}, \
250 {"small-data", MASK_SMALL_DATA, \
251 N_("Emit 16-bit relocations to the small data areas")}, \
252 {"large-data", -MASK_SMALL_DATA, \
253 N_("Emit 32-bit relocations to the small data areas")}, \
254 {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT \
255 | TARGET_DEFAULT_EXPLICIT_RELOCS, ""} }
257 #define TARGET_DEFAULT MASK_FP|MASK_FPREGS
259 #ifndef TARGET_CPU_DEFAULT
260 #define TARGET_CPU_DEFAULT 0
263 #ifndef TARGET_DEFAULT_EXPLICIT_RELOCS
264 #ifdef HAVE_AS_EXPLICIT_RELOCS
265 #define TARGET_DEFAULT_EXPLICIT_RELOCS MASK_EXPLICIT_RELOCS
267 #define TARGET_DEFAULT_EXPLICIT_RELOCS 0
271 /* This macro is similar to `TARGET_SWITCHES' but defines names of
272 command options that have values. Its definition is an initializer
273 with a subgrouping for each command option.
275 Each subgrouping contains a string constant, that defines the fixed
276 part of the option name, and the address of a variable. The
277 variable, type `char *', is set to the variable part of the given
278 option if the fixed part matches. The actual option name is made
279 by appending `-m' to the specified name.
281 Here is an example which defines `-mshort-data-NUMBER'. If the
282 given option is `-mshort-data-512', the variable `m88k_short_data'
283 will be set to the string `"512"'.
285 extern char *m88k_short_data;
286 #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
288 extern const char *alpha_cpu_string; /* For -mcpu= */
289 extern const char *alpha_tune_string; /* For -mtune= */
290 extern const char *alpha_fprm_string; /* For -mfp-rounding-mode=[n|m|c|d] */
291 extern const char *alpha_fptm_string; /* For -mfp-trap-mode=[n|u|su|sui] */
292 extern const char *alpha_tp_string; /* For -mtrap-precision=[p|f|i] */
293 extern const char *alpha_mlat_string; /* For -mmemory-latency= */
295 #define TARGET_OPTIONS \
297 {"cpu=", &alpha_cpu_string, \
298 N_("Use features of and schedule given CPU")}, \
299 {"tune=", &alpha_tune_string, \
300 N_("Schedule given CPU")}, \
301 {"fp-rounding-mode=", &alpha_fprm_string, \
302 N_("Control the generated fp rounding mode")}, \
303 {"fp-trap-mode=", &alpha_fptm_string, \
304 N_("Control the IEEE trap mode")}, \
305 {"trap-precision=", &alpha_tp_string, \
306 N_("Control the precision given to fp exceptions")}, \
307 {"memory-latency=", &alpha_mlat_string, \
308 N_("Tune expected memory latency")}, \
311 /* Attempt to describe CPU characteristics to the preprocessor. */
313 /* Corresponding to amask... */
314 #define CPP_AM_BWX_SPEC "-D__alpha_bwx__ -Acpu=bwx"
315 #define CPP_AM_MAX_SPEC "-D__alpha_max__ -Acpu=max"
316 #define CPP_AM_FIX_SPEC "-D__alpha_fix__ -Acpu=fix"
317 #define CPP_AM_CIX_SPEC "-D__alpha_cix__ -Acpu=cix"
319 /* Corresponding to implver... */
320 #define CPP_IM_EV4_SPEC "-D__alpha_ev4__ -Acpu=ev4"
321 #define CPP_IM_EV5_SPEC "-D__alpha_ev5__ -Acpu=ev5"
322 #define CPP_IM_EV6_SPEC "-D__alpha_ev6__ -Acpu=ev6"
324 /* Common combinations. */
325 #define CPP_CPU_EV4_SPEC "%(cpp_im_ev4)"
326 #define CPP_CPU_EV5_SPEC "%(cpp_im_ev5)"
327 #define CPP_CPU_EV56_SPEC "%(cpp_im_ev5) %(cpp_am_bwx)"
328 #define CPP_CPU_PCA56_SPEC "%(cpp_im_ev5) %(cpp_am_bwx) %(cpp_am_max)"
329 #define CPP_CPU_EV6_SPEC \
330 "%(cpp_im_ev6) %(cpp_am_bwx) %(cpp_am_max) %(cpp_am_fix)"
331 #define CPP_CPU_EV67_SPEC \
332 "%(cpp_im_ev6) %(cpp_am_bwx) %(cpp_am_max) %(cpp_am_fix) %(cpp_am_cix)"
334 #ifndef CPP_CPU_DEFAULT_SPEC
335 # if TARGET_CPU_DEFAULT & MASK_CPU_EV6
336 # if TARGET_CPU_DEFAULT & MASK_CIX
337 # define CPP_CPU_DEFAULT_SPEC CPP_CPU_EV67_SPEC
339 # define CPP_CPU_DEFAULT_SPEC CPP_CPU_EV6_SPEC
342 # if TARGET_CPU_DEFAULT & MASK_CPU_EV5
343 # if TARGET_CPU_DEFAULT & MASK_MAX
344 # define CPP_CPU_DEFAULT_SPEC CPP_CPU_PCA56_SPEC
346 # if TARGET_CPU_DEFAULT & MASK_BWX
347 # define CPP_CPU_DEFAULT_SPEC CPP_CPU_EV56_SPEC
349 # define CPP_CPU_DEFAULT_SPEC CPP_CPU_EV5_SPEC
353 # define CPP_CPU_DEFAULT_SPEC CPP_CPU_EV4_SPEC
356 #endif /* CPP_CPU_DEFAULT_SPEC */
359 #define CPP_CPU_SPEC "\
360 %{!undef:-Acpu=alpha -Amachine=alpha -D__alpha -D__alpha__ \
361 %{mcpu=ev4|mcpu=21064:%(cpp_cpu_ev4) }\
362 %{mcpu=ev5|mcpu=21164:%(cpp_cpu_ev5) }\
363 %{mcpu=ev56|mcpu=21164a:%(cpp_cpu_ev56) }\
364 %{mcpu=pca56|mcpu=21164pc|mcpu=21164PC:%(cpp_cpu_pca56) }\
365 %{mcpu=ev6|mcpu=21264:%(cpp_cpu_ev6) }\
366 %{mcpu=ev67|mcpu=21264a:%(cpp_cpu_ev67) }\
367 %{!mcpu*:%(cpp_cpu_default) }}"
370 /* This macro defines names of additional specifications to put in the
371 specs that can be used in various specifications like CC1_SPEC. Its
372 definition is an initializer with a subgrouping for each command option.
374 Each subgrouping contains a string constant, that defines the
375 specification name, and a string constant that used by the GNU CC driver
378 Do not define this macro if it does not need to do anything. */
380 #ifndef SUBTARGET_EXTRA_SPECS
381 #define SUBTARGET_EXTRA_SPECS
384 #define EXTRA_SPECS \
385 { "cpp_am_bwx", CPP_AM_BWX_SPEC }, \
386 { "cpp_am_max", CPP_AM_MAX_SPEC }, \
387 { "cpp_am_fix", CPP_AM_FIX_SPEC }, \
388 { "cpp_am_cix", CPP_AM_CIX_SPEC }, \
389 { "cpp_im_ev4", CPP_IM_EV4_SPEC }, \
390 { "cpp_im_ev5", CPP_IM_EV5_SPEC }, \
391 { "cpp_im_ev6", CPP_IM_EV6_SPEC }, \
392 { "cpp_cpu_ev4", CPP_CPU_EV4_SPEC }, \
393 { "cpp_cpu_ev5", CPP_CPU_EV5_SPEC }, \
394 { "cpp_cpu_ev56", CPP_CPU_EV56_SPEC }, \
395 { "cpp_cpu_pca56", CPP_CPU_PCA56_SPEC }, \
396 { "cpp_cpu_ev6", CPP_CPU_EV6_SPEC }, \
397 { "cpp_cpu_ev67", CPP_CPU_EV67_SPEC }, \
398 { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \
399 { "cpp_cpu", CPP_CPU_SPEC }, \
400 { "cpp_subtarget", CPP_SUBTARGET_SPEC }, \
401 SUBTARGET_EXTRA_SPECS
404 /* Sometimes certain combinations of command options do not make sense
405 on a particular target machine. You can define a macro
406 `OVERRIDE_OPTIONS' to take account of this. This macro, if
407 defined, is executed once just after all the command options have
410 On the Alpha, it is used to translate target-option strings into
413 #define OVERRIDE_OPTIONS override_options ()
416 /* Define this macro to change register usage conditional on target flags.
418 On the Alpha, we use this to disable the floating-point registers when
421 #define CONDITIONAL_REGISTER_USAGE \
424 if (! TARGET_FPREGS) \
425 for (i = 32; i < 63; i++) \
426 fixed_regs[i] = call_used_regs[i] = 1; \
430 /* Show we can debug even without a frame pointer. */
431 #define CAN_DEBUG_WITHOUT_FP
433 /* target machine storage layout */
435 /* Define to enable software floating point emulation. */
436 #define REAL_ARITHMETIC
438 /* Define the size of `int'. The default is the same as the word size. */
439 #define INT_TYPE_SIZE 32
441 /* Define the size of `long long'. The default is the twice the word size. */
442 #define LONG_LONG_TYPE_SIZE 64
444 /* The two floating-point formats we support are S-floating, which is
445 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double'
446 and `long double' are T. */
448 #define FLOAT_TYPE_SIZE 32
449 #define DOUBLE_TYPE_SIZE 64
450 #define LONG_DOUBLE_TYPE_SIZE 64
452 #define WCHAR_TYPE "unsigned int"
453 #define WCHAR_TYPE_SIZE 32
455 /* Define this macro if it is advisable to hold scalars in registers
456 in a wider mode than that declared by the program. In such cases,
457 the value is constrained to be within the bounds of the declared
458 type, but kept valid in the wider mode. The signedness of the
459 extension may differ from that of the type.
461 For Alpha, we always store objects in a full register. 32-bit objects
462 are always sign-extended, but smaller objects retain their signedness. */
464 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
465 if (GET_MODE_CLASS (MODE) == MODE_INT \
466 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
468 if ((MODE) == SImode) \
473 /* Define this if function arguments should also be promoted using the above
476 #define PROMOTE_FUNCTION_ARGS
478 /* Likewise, if the function return value is promoted. */
480 #define PROMOTE_FUNCTION_RETURN
482 /* Define this if most significant bit is lowest numbered
483 in instructions that operate on numbered bit-fields.
485 There are no such instructions on the Alpha, but the documentation
487 #define BITS_BIG_ENDIAN 0
489 /* Define this if most significant byte of a word is the lowest numbered.
490 This is false on the Alpha. */
491 #define BYTES_BIG_ENDIAN 0
493 /* Define this if most significant word of a multiword number is lowest
496 For Alpha we can decide arbitrarily since there are no machine instructions
497 for them. Might as well be consistent with bytes. */
498 #define WORDS_BIG_ENDIAN 0
500 /* number of bits in an addressable storage unit */
501 #define BITS_PER_UNIT 8
503 /* Width in bits of a "word", which is the contents of a machine register.
504 Note that this is not necessarily the width of data type `int';
505 if using 16-bit ints on a 68000, this would still be 32.
506 But on a machine with 16-bit registers, this would be 16. */
507 #define BITS_PER_WORD 64
509 /* Width of a word, in units (bytes). */
510 #define UNITS_PER_WORD 8
512 /* Width in bits of a pointer.
513 See also the macro `Pmode' defined below. */
514 #define POINTER_SIZE 64
516 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
517 #define PARM_BOUNDARY 64
519 /* Boundary (in *bits*) on which stack pointer should be aligned. */
520 #define STACK_BOUNDARY 64
522 /* Allocation boundary (in *bits*) for the code of a function. */
523 #define FUNCTION_BOUNDARY 32
525 /* Alignment of field after `int : 0' in a structure. */
526 #define EMPTY_FIELD_BOUNDARY 64
528 /* Every structure's size must be a multiple of this. */
529 #define STRUCTURE_SIZE_BOUNDARY 8
531 /* A bitfield declared as `int' forces `int' alignment for the struct. */
532 #define PCC_BITFIELD_TYPE_MATTERS 1
534 /* No data type wants to be aligned rounder than this. */
535 #define BIGGEST_ALIGNMENT 128
537 /* For atomic access to objects, must have at least 32-bit alignment
538 unless the machine has byte operations. */
539 #define MINIMUM_ATOMIC_ALIGNMENT ((unsigned int) (TARGET_BWX ? 8 : 32))
541 /* Align all constants and variables to at least a word boundary so
542 we can pick up pieces of them faster. */
543 /* ??? Only if block-move stuff knows about different source/destination
546 #define CONSTANT_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
547 #define DATA_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
550 /* Set this non-zero if move instructions will actually fail to work
551 when given unaligned data.
553 Since we get an error message when we do one, call them invalid. */
555 #define STRICT_ALIGNMENT 1
557 /* Set this non-zero if unaligned move instructions are extremely slow.
559 On the Alpha, they trap. */
561 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1
563 /* Standard register usage. */
565 /* Number of actual hardware registers.
566 The hardware registers are assigned numbers for the compiler
567 from 0 to just below FIRST_PSEUDO_REGISTER.
568 All registers that the compiler knows about must be given numbers,
569 even those that are not normally considered general registers.
571 We define all 32 integer registers, even though $31 is always zero,
572 and all 32 floating-point registers, even though $f31 is also
573 always zero. We do not bother defining the FP status register and
574 there are no other registers.
576 Since $31 is always zero, we will use register number 31 as the
577 argument pointer. It will never appear in the generated code
578 because we will always be eliminating it in favor of the stack
579 pointer or hardware frame pointer.
581 Likewise, we use $f31 for the frame pointer, which will always
582 be eliminated in favor of the hardware frame pointer or the
585 #define FIRST_PSEUDO_REGISTER 64
587 /* 1 for registers that have pervasive standard uses
588 and are not available for the register allocator. */
590 #define FIXED_REGISTERS \
591 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
592 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
593 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
594 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
596 /* 1 for registers not available across function calls.
597 These must include the FIXED_REGISTERS and also any
598 registers that can be used without being saved.
599 The latter must include the registers where values are returned
600 and the register where structure-value addresses are passed.
601 Aside from that, you can include as many other registers as you like. */
602 #define CALL_USED_REGISTERS \
603 {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
604 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
605 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
606 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
608 /* List the order in which to allocate registers. Each register must be
609 listed once, even those in FIXED_REGISTERS.
611 We allocate in the following order:
612 $f10-$f15 (nonsaved floating-point register)
614 $f21-$f16 (likewise, but input args)
615 $f0 (nonsaved, but return value)
616 $f1 (nonsaved, but immediate before saved)
617 $f2-$f9 (saved floating-point registers)
618 $1-$8 (nonsaved integer registers)
621 $0 (likewise, but return value)
622 $21-$16 (likewise, but input args)
623 $27 (procedure value in OSF, nonsaved in NT)
624 $9-$14 (saved integer registers)
628 $30, $31, $f31 (stack pointer and always zero/ap & fp) */
630 #define REG_ALLOC_ORDER \
631 {42, 43, 44, 45, 46, 47, \
632 54, 55, 56, 57, 58, 59, 60, 61, 62, \
633 53, 52, 51, 50, 49, 48, \
635 34, 35, 36, 37, 38, 39, 40, 41, \
636 1, 2, 3, 4, 5, 6, 7, 8, \
640 21, 20, 19, 18, 17, 16, \
642 9, 10, 11, 12, 13, 14, \
648 /* Return number of consecutive hard regs needed starting at reg REGNO
649 to hold something of mode MODE.
650 This is ordinarily the length in words of a value of mode MODE
651 but can be less for certain modes in special long registers. */
653 #define HARD_REGNO_NREGS(REGNO, MODE) \
654 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
656 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
657 On Alpha, the integer registers can hold any mode. The floating-point
658 registers can hold 32-bit and 64-bit integers as well, but not 16-bit
661 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
662 ((REGNO) >= 32 && (REGNO) <= 62 \
663 ? GET_MODE_UNIT_SIZE (MODE) == 8 || GET_MODE_UNIT_SIZE (MODE) == 4 \
666 /* A C expression that is nonzero if a value of mode
667 MODE1 is accessible in mode MODE2 without copying.
669 This asymmetric test is true when MODE1 could be put
670 in an FP register but MODE2 could not. */
672 #define MODES_TIEABLE_P(MODE1, MODE2) \
673 (HARD_REGNO_MODE_OK (32, (MODE1)) \
674 ? HARD_REGNO_MODE_OK (32, (MODE2)) \
677 /* Specify the registers used for certain standard purposes.
678 The values of these macros are register numbers. */
680 /* Alpha pc isn't overloaded on a register that the compiler knows about. */
681 /* #define PC_REGNUM */
683 /* Register to use for pushing function arguments. */
684 #define STACK_POINTER_REGNUM 30
686 /* Base register for access to local variables of the function. */
687 #define HARD_FRAME_POINTER_REGNUM 15
689 /* Value should be nonzero if functions must have frame pointers.
690 Zero means the frame pointer need not be set up (and parms
691 may be accessed via the stack pointer) in functions that seem suitable.
692 This is computed in `reload', in reload1.c. */
693 #define FRAME_POINTER_REQUIRED 0
695 /* Base register for access to arguments of the function. */
696 #define ARG_POINTER_REGNUM 31
698 /* Base register for access to local variables of function. */
699 #define FRAME_POINTER_REGNUM 63
701 /* Register in which static-chain is passed to a function.
703 For the Alpha, this is based on an example; the calling sequence
704 doesn't seem to specify this. */
705 #define STATIC_CHAIN_REGNUM 1
707 /* The register number of the register used to address a table of
708 static data addresses in memory. */
709 #define PIC_OFFSET_TABLE_REGNUM 29
711 /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM'
712 is clobbered by calls. */
713 /* ??? It is and it isn't. It's required to be valid for a given
714 function when the function returns. It isn't clobbered by
715 current_file functions. Moreover, we do not expose the ldgp
716 until after reload, so we're probably safe. */
717 /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */
719 /* Register in which address to store a structure value
720 arrives in the function. On the Alpha, the address is passed
721 as a hidden argument. */
722 #define STRUCT_VALUE 0
724 /* Define the classes of registers for register constraints in the
725 machine description. Also define ranges of constants.
727 One of the classes must always be named ALL_REGS and include all hard regs.
728 If there is more than one class, another class must be named NO_REGS
729 and contain no registers.
731 The name GENERAL_REGS must be the name of a class (or an alias for
732 another name such as ALL_REGS). This is the class of registers
733 that is allowed by "g" or "r" in a register constraint.
734 Also, registers outside this class are allocated only when
735 instructions express preferences for them.
737 The classes must be numbered in nondecreasing order; that is,
738 a larger-numbered class must never be contained completely
739 in a smaller-numbered class.
741 For any two classes, it is very desirable that there be another
742 class that represents their union. */
745 NO_REGS, R24_REG, R25_REG, R27_REG,
746 GENERAL_REGS, FLOAT_REGS, ALL_REGS,
750 #define N_REG_CLASSES (int) LIM_REG_CLASSES
752 /* Give names of register classes as strings for dump file. */
754 #define REG_CLASS_NAMES \
755 {"NO_REGS", "R24_REG", "R25_REG", "R27_REG", \
756 "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
758 /* Define which registers fit in which classes.
759 This is an initializer for a vector of HARD_REG_SET
760 of length N_REG_CLASSES. */
762 #define REG_CLASS_CONTENTS \
763 { {0x00000000, 0x00000000}, /* NO_REGS */ \
764 {0x01000000, 0x00000000}, /* R24_REG */ \
765 {0x02000000, 0x00000000}, /* R25_REG */ \
766 {0x08000000, 0x00000000}, /* R27_REG */ \
767 {0xffffffff, 0x80000000}, /* GENERAL_REGS */ \
768 {0x00000000, 0x7fffffff}, /* FLOAT_REGS */ \
769 {0xffffffff, 0xffffffff} }
771 /* The same information, inverted:
772 Return the class number of the smallest class containing
773 reg number REGNO. This could be a conditional expression
774 or could index an array. */
776 #define REGNO_REG_CLASS(REGNO) \
777 ((REGNO) == 24 ? R24_REG \
778 : (REGNO) == 25 ? R25_REG \
779 : (REGNO) == 27 ? R27_REG \
780 : (REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS \
783 /* The class value for index registers, and the one for base regs. */
784 #define INDEX_REG_CLASS NO_REGS
785 #define BASE_REG_CLASS GENERAL_REGS
787 /* Get reg_class from a letter such as appears in the machine description. */
789 #define REG_CLASS_FROM_LETTER(C) \
790 ((C) == 'a' ? R24_REG \
791 : (C) == 'b' ? R25_REG \
792 : (C) == 'c' ? R27_REG \
793 : (C) == 'f' ? FLOAT_REGS \
796 /* Define this macro to change register usage conditional on target flags. */
797 /* #define CONDITIONAL_REGISTER_USAGE */
799 /* The letters I, J, K, L, M, N, O, and P in a register constraint string
800 can be used to stand for particular ranges of immediate operands.
801 This macro defines what the ranges are.
802 C is the letter, and VALUE is a constant value.
803 Return 1 if VALUE is in the range specified by C.
806 `I' is used for the range of constants most insns can contain.
807 `J' is the constant zero.
808 `K' is used for the constant in an LDA insn.
809 `L' is used for the constant in a LDAH insn.
810 `M' is used for the constants that can be AND'ed with using a ZAP insn.
811 `N' is used for complemented 8-bit constants.
812 `O' is used for negated 8-bit constants.
813 `P' is used for the constants 1, 2 and 3. */
815 #define CONST_OK_FOR_LETTER_P alpha_const_ok_for_letter_p
817 /* Similar, but for floating or large integer constants, and defining letters
818 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
820 For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE
821 that is the operand of a ZAP insn. */
823 #define CONST_DOUBLE_OK_FOR_LETTER_P alpha_const_double_ok_for_letter_p
825 /* Optional extra constraints for this machine.
827 For the Alpha, `Q' means that this is a memory operand but not a
828 reference to an unaligned location.
830 `R' is a SYMBOL_REF that has SYMBOL_REF_FLAG set or is the current
833 'S' is a 6-bit constant (valid for a shift insn).
837 'U' is a symbolic operand. */
839 #define EXTRA_CONSTRAINT alpha_extra_constraint
841 /* Given an rtx X being reloaded into a reg required to be
842 in class CLASS, return the class of reg to actually use.
843 In general this is just CLASS; but on some machines
844 in some cases it is preferable to use a more restrictive class. */
846 #define PREFERRED_RELOAD_CLASS alpha_preferred_reload_class
848 /* Loading and storing HImode or QImode values to and from memory
849 usually requires a scratch register. The exceptions are loading
850 QImode and HImode from an aligned address to a general register
851 unless byte instructions are permitted.
852 We also cannot load an unaligned address or a paradoxical SUBREG into an
855 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \
856 secondary_reload_class((CLASS), (MODE), (IN), 1)
858 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \
859 secondary_reload_class((CLASS), (MODE), (OUT), 0)
861 /* If we are copying between general and FP registers, we need a memory
862 location unless the FIX extension is available. */
864 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
865 (! TARGET_FIX && (((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \
866 || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS)))
868 /* Specify the mode to be used for memory when a secondary memory
869 location is needed. If MODE is floating-point, use it. Otherwise,
870 widen to a word like the default. This is needed because we always
871 store integers in FP registers in quadword format. This whole
872 area is very tricky! */
873 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
874 (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \
875 : GET_MODE_SIZE (MODE) >= 4 ? (MODE) \
876 : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0))
878 /* Return the maximum number of consecutive registers
879 needed to represent mode MODE in a register of class CLASS. */
881 #define CLASS_MAX_NREGS(CLASS, MODE) \
882 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
884 /* If defined, gives a class of registers that cannot be used as the
885 operand of a SUBREG that changes the mode of the object illegally. */
887 #define CLASS_CANNOT_CHANGE_MODE FLOAT_REGS
889 /* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE. */
891 #define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) \
892 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
894 /* Define the cost of moving between registers of various classes. Moving
895 between FLOAT_REGS and anything else except float regs is expensive.
896 In fact, we make it quite expensive because we really don't want to
897 do these moves unless it is clearly worth it. Optimizations may
898 reduce the impact of not being able to allocate a pseudo to a
901 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
902 (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) \
904 : TARGET_FIX ? 3 : 4+2*alpha_memory_latency)
906 /* A C expressions returning the cost of moving data of MODE from a register to
909 On the Alpha, bump this up a bit. */
911 extern int alpha_memory_latency;
912 #define MEMORY_MOVE_COST(MODE,CLASS,IN) (2*alpha_memory_latency)
914 /* Provide the cost of a branch. Exact meaning under development. */
915 #define BRANCH_COST 5
917 /* Stack layout; function entry, exit and calling. */
919 /* Define this if pushing a word on the stack
920 makes the stack pointer a smaller address. */
921 #define STACK_GROWS_DOWNWARD
923 /* Define this if the nominal address of the stack frame
924 is at the high-address end of the local variables;
925 that is, each additional local variable allocated
926 goes at a more negative offset in the frame. */
927 /* #define FRAME_GROWS_DOWNWARD */
929 /* Offset within stack frame to start allocating local variables at.
930 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
931 first local allocated. Otherwise, it is the offset to the BEGINNING
932 of the first local allocated. */
934 #define STARTING_FRAME_OFFSET 0
936 /* If we generate an insn to push BYTES bytes,
937 this says how many the stack pointer really advances by.
938 On Alpha, don't define this because there are no push insns. */
939 /* #define PUSH_ROUNDING(BYTES) */
941 /* Define this to be nonzero if stack checking is built into the ABI. */
942 #define STACK_CHECK_BUILTIN 1
944 /* Define this if the maximum size of all the outgoing args is to be
945 accumulated and pushed during the prologue. The amount can be
946 found in the variable current_function_outgoing_args_size. */
947 #define ACCUMULATE_OUTGOING_ARGS 1
949 /* Offset of first parameter from the argument pointer register value. */
951 #define FIRST_PARM_OFFSET(FNDECL) 0
953 /* Definitions for register eliminations.
955 We have two registers that can be eliminated on the Alpha. First, the
956 frame pointer register can often be eliminated in favor of the stack
957 pointer register. Secondly, the argument pointer register can always be
958 eliminated; it is replaced with either the stack or frame pointer. */
960 /* This is an array of structures. Each structure initializes one pair
961 of eliminable registers. The "from" register number is given first,
962 followed by "to". Eliminations of the same "from" register are listed
963 in order of preference. */
965 #define ELIMINABLE_REGS \
966 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
967 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
968 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
969 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
971 /* Given FROM and TO register numbers, say whether this elimination is allowed.
972 Frame pointer elimination is automatically handled.
974 All eliminations are valid since the cases where FP can't be
975 eliminated are already handled. */
977 #define CAN_ELIMINATE(FROM, TO) 1
979 /* Round up to a multiple of 16 bytes. */
980 #define ALPHA_ROUND(X) (((X) + 15) & ~ 15)
982 /* Define the offset between two registers, one to be eliminated, and the other
983 its replacement, at the start of a routine. */
984 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
985 { if ((FROM) == FRAME_POINTER_REGNUM) \
986 (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \
987 + alpha_sa_size ()); \
988 else if ((FROM) == ARG_POINTER_REGNUM) \
989 (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \
991 + (ALPHA_ROUND (get_frame_size () \
992 + current_function_pretend_args_size) \
993 - current_function_pretend_args_size)); \
998 /* Define this if stack space is still allocated for a parameter passed
1000 /* #define REG_PARM_STACK_SPACE */
1002 /* Value is the number of bytes of arguments automatically
1003 popped when returning from a subroutine call.
1004 FUNDECL is the declaration node of the function (as a tree),
1005 FUNTYPE is the data type of the function (as a tree),
1006 or for a library call it is an identifier node for the subroutine name.
1007 SIZE is the number of bytes of arguments passed on the stack. */
1009 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
1011 /* Define how to find the value returned by a function.
1012 VALTYPE is the data type of the value (as a tree).
1013 If the precise function being called is known, FUNC is its FUNCTION_DECL;
1014 otherwise, FUNC is 0.
1016 On Alpha the value is found in $0 for integer functions and
1017 $f0 for floating-point functions. */
1019 #define FUNCTION_VALUE(VALTYPE, FUNC) \
1020 gen_rtx_REG (((INTEGRAL_TYPE_P (VALTYPE) \
1021 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
1022 || POINTER_TYPE_P (VALTYPE)) \
1023 ? word_mode : TYPE_MODE (VALTYPE), \
1025 && (TREE_CODE (VALTYPE) == REAL_TYPE \
1026 || TREE_CODE (VALTYPE) == COMPLEX_TYPE)) \
1029 /* Define how to find the value returned by a library function
1030 assuming the value has mode MODE. */
1032 #define LIBCALL_VALUE(MODE) \
1033 gen_rtx_REG (MODE, \
1035 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
1036 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
1039 /* The definition of this macro implies that there are cases where
1040 a scalar value cannot be returned in registers.
1042 For the Alpha, any structure or union type is returned in memory, as
1043 are integers whose size is larger than 64 bits. */
1045 #define RETURN_IN_MEMORY(TYPE) \
1046 (TYPE_MODE (TYPE) == BLKmode \
1047 || TYPE_MODE (TYPE) == TFmode \
1048 || TYPE_MODE (TYPE) == TCmode \
1049 || (TREE_CODE (TYPE) == INTEGER_TYPE && TYPE_PRECISION (TYPE) > 64))
1051 /* 1 if N is a possible register number for a function value
1052 as seen by the caller. */
1054 #define FUNCTION_VALUE_REGNO_P(N) \
1055 ((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33)
1057 /* 1 if N is a possible register number for function argument passing.
1058 On Alpha, these are $16-$21 and $f16-$f21. */
1060 #define FUNCTION_ARG_REGNO_P(N) \
1061 (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
1063 /* Define a data type for recording info about an argument list
1064 during the scan of that argument list. This data type should
1065 hold all necessary information about the function itself
1066 and about the args processed so far, enough to enable macros
1067 such as FUNCTION_ARG to determine where the next arg should go.
1069 On Alpha, this is a single integer, which is a number of words
1070 of arguments scanned so far.
1071 Thus 6 or more means all following args should go on the stack. */
1073 #define CUMULATIVE_ARGS int
1075 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1076 for a call to a function whose data type is FNTYPE.
1077 For a library call, FNTYPE is 0. */
1079 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) (CUM) = 0
1081 /* Define intermediate macro to compute the size (in registers) of an argument
1084 #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \
1085 ((MODE) == TFmode || (MODE) == TCmode ? 1 \
1086 : (((MODE) == BLKmode ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \
1087 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
1089 /* Update the data in CUM to advance over an argument
1090 of mode MODE and data type TYPE.
1091 (TYPE is null for libcalls where that information may not be available.) */
1093 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1094 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
1097 (CUM) += ALPHA_ARG_SIZE (MODE, TYPE, NAMED)
1099 /* Determine where to put an argument to a function.
1100 Value is zero to push the argument on the stack,
1101 or a hard register in which to store the argument.
1103 MODE is the argument's machine mode.
1104 TYPE is the data type of the argument (as a tree).
1105 This is null for libcalls where that information may
1107 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1108 the preceding args and about the function being called.
1109 NAMED is nonzero if this argument is a named parameter
1110 (otherwise it is an extra parameter matching an ellipsis).
1112 On Alpha the first 6 words of args are normally in registers
1113 and the rest are pushed. */
1115 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1116 function_arg((CUM), (MODE), (TYPE), (NAMED))
1118 /* A C expression that indicates when an argument must be passed by
1119 reference. If nonzero for an argument, a copy of that argument is
1120 made in memory and a pointer to the argument is passed instead of
1121 the argument itself. The pointer is passed in whatever way is
1122 appropriate for passing a pointer to that type. */
1124 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
1125 ((MODE) == TFmode || (MODE) == TCmode)
1127 /* Specify the padding direction of arguments.
1129 On the Alpha, we must pad upwards in order to be able to pass args in
1132 #define FUNCTION_ARG_PADDING(MODE, TYPE) upward
1134 /* For an arg passed partly in registers and partly in memory,
1135 this is the number of registers used.
1136 For args passed entirely in registers or entirely in memory, zero. */
1138 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1139 ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \
1142 /* Perform any needed actions needed for a function that is receiving a
1143 variable number of arguments.
1147 MODE and TYPE are the mode and type of the current parameter.
1149 PRETEND_SIZE is a variable that should be set to the amount of stack
1150 that must be pushed by the prolog to pretend that our caller pushed
1153 Normally, this macro will push all remaining incoming registers on the
1154 stack and set PRETEND_SIZE to the length of the registers pushed.
1156 On the Alpha, we allocate space for all 12 arg registers, but only
1157 push those that are remaining.
1159 However, if NO registers need to be saved, don't allocate any space.
1160 This is not only because we won't need the space, but because AP includes
1161 the current_pretend_args_size and we don't want to mess up any
1162 ap-relative addresses already made.
1164 If we are not to use the floating-point registers, save the integer
1165 registers where we would put the floating-point registers. This is
1166 not the most efficient way to implement varargs with just one register
1167 class, but it isn't worth doing anything more efficient in this rare
1170 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
1175 rtx tmp; int set = get_varargs_alias_set (); \
1176 tmp = gen_rtx_MEM (BLKmode, \
1177 plus_constant (virtual_incoming_args_rtx, \
1178 ((CUM) + 6)* UNITS_PER_WORD)); \
1179 set_mem_alias_set (tmp, set); \
1180 move_block_from_reg \
1182 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
1184 tmp = gen_rtx_MEM (BLKmode, \
1185 plus_constant (virtual_incoming_args_rtx, \
1186 (CUM) * UNITS_PER_WORD)); \
1187 set_mem_alias_set (tmp, set); \
1188 move_block_from_reg \
1189 (16 + (TARGET_FPREGS ? 32 : 0) + CUM, tmp, \
1190 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
1192 PRETEND_SIZE = 12 * UNITS_PER_WORD; \
1196 /* We do not allow indirect calls to be optimized into sibling calls, nor
1197 can we allow a call to a function in a different compilation unit to
1198 be optimized into a sibcall. Except if the function is known not to
1199 return, in which case our caller doesn't care what the gp is. */
1200 #define FUNCTION_OK_FOR_SIBCALL(DECL) \
1202 && ((TREE_ASM_WRITTEN (DECL) && !flag_pic) \
1203 || ! TREE_PUBLIC (DECL)))
1205 /* Try to output insns to set TARGET equal to the constant C if it can be
1206 done in less than N insns. Do all computations in MODE. Returns the place
1207 where the output has been placed if it can be done and the insns have been
1208 emitted. If it would take more than N insns, zero is returned and no
1209 insns and emitted. */
1211 /* Define the information needed to generate branch and scc insns. This is
1212 stored from the compare operation. Note that we can't use "rtx" here
1213 since it hasn't been defined! */
1215 struct alpha_compare
1217 struct rtx_def *op0, *op1;
1221 extern struct alpha_compare alpha_compare;
1223 /* Make (or fake) .linkage entry for function call.
1224 IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */
1226 /* This macro defines the start of an assembly comment. */
1228 #define ASM_COMMENT_START " #"
1230 /* This macro produces the initial definition of a function. */
1232 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
1233 alpha_start_function(FILE,NAME,DECL);
1235 /* This macro closes up a function definition for the assembler. */
1237 #define ASM_DECLARE_FUNCTION_SIZE(FILE,NAME,DECL) \
1238 alpha_end_function(FILE,NAME,DECL)
1240 /* Output any profiling code before the prologue. */
1242 #define PROFILE_BEFORE_PROLOGUE 1
1244 /* Output assembler code to FILE to increment profiler label # LABELNO
1245 for profiling a function entry. Under OSF/1, profiling is enabled
1246 by simply passing -pg to the assembler and linker. */
1248 #define FUNCTION_PROFILER(FILE, LABELNO)
1250 /* Output assembler code to FILE to initialize this source file's
1251 basic block profiling info, if that has not already been done.
1252 This assumes that __bb_init_func doesn't garble a1-a5. */
1254 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
1256 ASM_OUTPUT_REG_PUSH (FILE, 16); \
1257 fputs ("\tlda $16,$PBX32\n", (FILE)); \
1258 fputs ("\tldq $26,0($16)\n", (FILE)); \
1259 fputs ("\tbne $26,1f\n", (FILE)); \
1260 fputs ("\tlda $27,__bb_init_func\n", (FILE)); \
1261 fputs ("\tjsr $26,($27),__bb_init_func\n", (FILE)); \
1262 fputs ("\tldgp $29,0($26)\n", (FILE)); \
1263 fputs ("1:\n", (FILE)); \
1264 ASM_OUTPUT_REG_POP (FILE, 16); \
1267 /* Output assembler code to FILE to increment the entry-count for
1268 the BLOCKNO'th basic block in this source file. */
1270 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1272 int blockn = (BLOCKNO); \
1273 fputs ("\tsubq $30,16,$30\n", (FILE)); \
1274 fputs ("\tstq $26,0($30)\n", (FILE)); \
1275 fputs ("\tstq $27,8($30)\n", (FILE)); \
1276 fputs ("\tlda $26,$PBX34\n", (FILE)); \
1277 fprintf ((FILE), "\tldq $27,%d($26)\n", 8*blockn); \
1278 fputs ("\taddq $27,1,$27\n", (FILE)); \
1279 fprintf ((FILE), "\tstq $27,%d($26)\n", 8*blockn); \
1280 fputs ("\tldq $26,0($30)\n", (FILE)); \
1281 fputs ("\tldq $27,8($30)\n", (FILE)); \
1282 fputs ("\taddq $30,16,$30\n", (FILE)); \
1286 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1287 the stack pointer does not matter. The value is tested only in
1288 functions that have frame pointers.
1289 No definition is equivalent to always zero. */
1291 #define EXIT_IGNORE_STACK 1
1293 /* Define registers used by the epilogue and return instruction. */
1295 #define EPILOGUE_USES(REGNO) ((REGNO) == 26)
1297 /* Output assembler code for a block containing the constant parts
1298 of a trampoline, leaving space for the variable parts.
1300 The trampoline should set the static chain pointer to value placed
1301 into the trampoline and should branch to the specified routine.
1302 Note that $27 has been set to the address of the trampoline, so we can
1303 use it for addressability of the two data items. */
1305 #define TRAMPOLINE_TEMPLATE(FILE) \
1307 fprintf (FILE, "\tldq $1,24($27)\n"); \
1308 fprintf (FILE, "\tldq $27,16($27)\n"); \
1309 fprintf (FILE, "\tjmp $31,($27),0\n"); \
1310 fprintf (FILE, "\tnop\n"); \
1311 fprintf (FILE, "\t.quad 0,0\n"); \
1314 /* Section in which to place the trampoline. On Alpha, instructions
1315 may only be placed in a text segment. */
1317 #define TRAMPOLINE_SECTION text_section
1319 /* Length in units of the trampoline for entering a nested function. */
1321 #define TRAMPOLINE_SIZE 32
1323 /* The alignment of a trampoline, in bits. */
1325 #define TRAMPOLINE_ALIGNMENT 64
1327 /* Emit RTL insns to initialize the variable parts of a trampoline.
1328 FNADDR is an RTX for the address of the function's pure code.
1329 CXT is an RTX for the static chain value for the function. */
1331 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1332 alpha_initialize_trampoline (TRAMP, FNADDR, CXT, 16, 24, 8)
1334 /* A C expression whose value is RTL representing the value of the return
1335 address for the frame COUNT steps up from the current frame.
1336 FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of
1337 the COUNT-1 frame if RETURN_ADDR_IN_PREVIOUS_FRAME is defined. */
1339 #define RETURN_ADDR_RTX alpha_return_addr
1341 /* Before the prologue, RA lives in $26. */
1342 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 26)
1343 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26)
1345 /* Describe how we implement __builtin_eh_return. */
1346 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 16 : INVALID_REGNUM)
1347 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 28)
1348 #define EH_RETURN_HANDLER_RTX \
1349 gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \
1350 current_function_outgoing_args_size))
1352 /* Addressing modes, and classification of registers for them. */
1354 /* #define HAVE_POST_INCREMENT 0 */
1355 /* #define HAVE_POST_DECREMENT 0 */
1357 /* #define HAVE_PRE_DECREMENT 0 */
1358 /* #define HAVE_PRE_INCREMENT 0 */
1360 /* Macros to check register numbers against specific register classes. */
1362 /* These assume that REGNO is a hard or pseudo reg number.
1363 They give nonzero only if REGNO is a hard reg of the suitable class
1364 or a pseudo reg currently allocated to a suitable hard reg.
1365 Since they use reg_renumber, they are safe only once reg_renumber
1366 has been allocated, which happens in local-alloc.c. */
1368 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
1369 #define REGNO_OK_FOR_BASE_P(REGNO) \
1370 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \
1371 || (REGNO) == 63 || reg_renumber[REGNO] == 63)
1373 /* Maximum number of registers that can appear in a valid memory address. */
1374 #define MAX_REGS_PER_ADDRESS 1
1376 /* Recognize any constant value that is a valid address. For the Alpha,
1377 there are only constants none since we want to use LDA to load any
1378 symbolic addresses into registers. */
1380 #define CONSTANT_ADDRESS_P(X) \
1381 (GET_CODE (X) == CONST_INT \
1382 && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
1384 /* Include all constant integers and constant doubles, but not
1385 floating-point, except for floating-point zero. */
1387 #define LEGITIMATE_CONSTANT_P(X) \
1388 (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1389 || (X) == CONST0_RTX (GET_MODE (X)))
1391 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1392 and check its validity for a certain class.
1393 We have two alternate definitions for each of them.
1394 The usual definition accepts all pseudo regs; the other rejects
1395 them unless they have been allocated suitable hard regs.
1396 The symbol REG_OK_STRICT causes the latter definition to be used.
1398 Most source files want to accept pseudo regs in the hope that
1399 they will get allocated to the class that the insn wants them to be in.
1400 Source files for reload pass need to be strict.
1401 After reload, it makes no difference, since pseudo regs have
1402 been eliminated by then. */
1404 /* Nonzero if X is a hard reg that can be used as an index
1405 or if it is a pseudo reg. */
1406 #define REG_OK_FOR_INDEX_P(X) 0
1408 /* Nonzero if X is a hard reg that can be used as a base reg
1409 or if it is a pseudo reg. */
1410 #define NONSTRICT_REG_OK_FOR_BASE_P(X) \
1411 (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1413 /* ??? Nonzero if X is the frame pointer, or some virtual register
1414 that may eliminate to the frame pointer. These will be allowed to
1415 have offsets greater than 32K. This is done because register
1416 elimination offsets will change the hi/lo split, and if we split
1417 before reload, we will require additional instructions. */
1418 #define NONSTRICT_REG_OK_FP_BASE_P(X) \
1419 (REGNO (X) == 31 || REGNO (X) == 63 \
1420 || (REGNO (X) >= FIRST_PSEUDO_REGISTER \
1421 && REGNO (X) < LAST_VIRTUAL_REGISTER))
1423 /* Nonzero if X is a hard reg that can be used as a base reg. */
1424 #define STRICT_REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1426 #ifdef REG_OK_STRICT
1427 #define REG_OK_FOR_BASE_P(X) STRICT_REG_OK_FOR_BASE_P (X)
1429 #define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P (X)
1432 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
1433 valid memory address for an instruction. */
1435 #ifdef REG_OK_STRICT
1436 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
1438 if (alpha_legitimate_address_p (MODE, X, 1)) \
1442 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
1444 if (alpha_legitimate_address_p (MODE, X, 0)) \
1449 /* Try machine-dependent ways of modifying an illegitimate address
1450 to be legitimate. If we find one, return the new, valid address.
1451 This macro is used in only one place: `memory_address' in explow.c. */
1453 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1455 rtx new_x = alpha_legitimize_address (X, NULL_RTX, MODE); \
1463 /* Try a machine-dependent way of reloading an illegitimate address
1464 operand. If we find one, push the reload and jump to WIN. This
1465 macro is used in only one place: `find_reloads_address' in reload.c. */
1467 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \
1469 rtx new_x = alpha_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \
1477 /* Go to LABEL if ADDR (a legitimate address expression)
1478 has an effect that depends on the machine mode it is used for.
1479 On the Alpha this is true only for the unaligned modes. We can
1480 simplify this test since we know that the address must be valid. */
1482 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1483 { if (GET_CODE (ADDR) == AND) goto LABEL; }
1485 /* Compute the cost of an address. For the Alpha, all valid addresses are
1488 #define ADDRESS_COST(X) 0
1490 /* Machine-dependent reorg pass. */
1491 #define MACHINE_DEPENDENT_REORG(X) alpha_reorg(X)
1493 /* Specify the machine mode that this machine uses
1494 for the index in the tablejump instruction. */
1495 #define CASE_VECTOR_MODE SImode
1497 /* Define as C expression which evaluates to nonzero if the tablejump
1498 instruction expects the table to contain offsets from the address of the
1501 Do not define this if the table should contain absolute addresses.
1502 On the Alpha, the table is really GP-relative, not relative to the PC
1503 of the table, but we pretend that it is PC-relative; this should be OK,
1504 but we should try to find some better way sometime. */
1505 #define CASE_VECTOR_PC_RELATIVE 1
1507 /* Define this as 1 if `char' should by default be signed; else as 0. */
1508 #define DEFAULT_SIGNED_CHAR 1
1510 /* This flag, if defined, says the same insns that convert to a signed fixnum
1511 also convert validly to an unsigned one.
1513 We actually lie a bit here as overflow conditions are different. But
1514 they aren't being checked anyway. */
1516 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1518 /* Max number of bytes we can move to or from memory
1519 in one reasonably fast instruction. */
1523 /* If a memory-to-memory move would take MOVE_RATIO or more simple
1524 move-instruction pairs, we will do a movstr or libcall instead.
1526 Without byte/word accesses, we want no more than four instructions;
1527 with, several single byte accesses are better. */
1529 #define MOVE_RATIO (TARGET_BWX ? 7 : 2)
1531 /* Largest number of bytes of an object that can be placed in a register.
1532 On the Alpha we have plenty of registers, so use TImode. */
1533 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1535 /* Nonzero if access to memory by bytes is no faster than for words.
1536 Also non-zero if doing byte operations (specifically shifts) in registers
1539 On the Alpha, we want to not use the byte operation and instead use
1540 masking operations to access fields; these will save instructions. */
1542 #define SLOW_BYTE_ACCESS 1
1544 /* Define if operations between registers always perform the operation
1545 on the full register even if a narrower mode is specified. */
1546 #define WORD_REGISTER_OPERATIONS
1548 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1549 will either zero-extend or sign-extend. The value of this macro should
1550 be the code that says which one of the two operations is implicitly
1551 done, NIL if none. */
1552 #define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND)
1554 /* Define if loading short immediate values into registers sign extends. */
1555 #define SHORT_IMMEDIATES_SIGN_EXTEND
1557 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1558 is done just by pretending it is already truncated. */
1559 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1561 /* We assume that the store-condition-codes instructions store 0 for false
1562 and some other value for true. This is the value stored for true. */
1564 #define STORE_FLAG_VALUE 1
1566 /* Define the value returned by a floating-point comparison instruction. */
1568 #define FLOAT_STORE_FLAG_VALUE(MODE) \
1569 REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE))
1571 /* Canonicalize a comparison from one we don't have to one we do have. */
1573 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
1575 if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \
1576 && (GET_CODE (OP1) == REG || (OP1) == const0_rtx)) \
1581 (CODE) = swap_condition (CODE); \
1583 if (((CODE) == LT || (CODE) == LTU) \
1584 && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256) \
1586 (CODE) = (CODE) == LT ? LE : LEU; \
1587 (OP1) = GEN_INT (255); \
1591 /* Specify the machine mode that pointers have.
1592 After generation of rtl, the compiler makes no further distinction
1593 between pointers and any other objects of this machine mode. */
1594 #define Pmode DImode
1596 /* Mode of a function address in a call instruction (for indexing purposes). */
1598 #define FUNCTION_MODE Pmode
1600 /* Define this if addresses of constant functions
1601 shouldn't be put through pseudo regs where they can be cse'd.
1602 Desirable on machines where ordinary constants are expensive
1603 but a CALL with constant address is cheap.
1605 We define this on the Alpha so that gen_call and gen_call_value
1606 get to see the SYMBOL_REF (for the hint field of the jsr). It will
1607 then copy it into a register, thus actually letting the address be
1610 #define NO_FUNCTION_CSE
1612 /* Define this to be nonzero if shift instructions ignore all but the low-order
1614 #define SHIFT_COUNT_TRUNCATED 1
1616 /* Compute the cost of computing a constant rtl expression RTX
1617 whose rtx-code is CODE. The body of this macro is a portion
1618 of a switch statement. If the code is computed here,
1619 return it with a return statement. Otherwise, break from the switch.
1621 If this is an 8-bit constant, return zero since it can be used
1622 nearly anywhere with no cost. If it is a valid operand for an
1623 ADD or AND, likewise return 0 if we know it will be used in that
1624 context. Otherwise, return 2 since it might be used there later.
1625 All other constants take at least two insns. */
1627 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1629 if (INTVAL (RTX) >= 0 && INTVAL (RTX) < 256) \
1631 case CONST_DOUBLE: \
1632 if ((RTX) == CONST0_RTX (GET_MODE (RTX))) \
1634 else if (((OUTER_CODE) == PLUS && add_operand (RTX, VOIDmode)) \
1635 || ((OUTER_CODE) == AND && and_operand (RTX, VOIDmode))) \
1637 else if (add_operand (RTX, VOIDmode) || and_operand (RTX, VOIDmode)) \
1640 return COSTS_N_INSNS (2); \
1644 switch (alpha_cpu) \
1646 case PROCESSOR_EV4: \
1647 return COSTS_N_INSNS (3); \
1648 case PROCESSOR_EV5: \
1649 case PROCESSOR_EV6: \
1650 return COSTS_N_INSNS (2); \
1654 /* Provide the costs of a rtl expression. This is in the body of a
1657 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1658 case PLUS: case MINUS: \
1659 if (FLOAT_MODE_P (GET_MODE (X))) \
1660 switch (alpha_cpu) \
1662 case PROCESSOR_EV4: \
1663 return COSTS_N_INSNS (6); \
1664 case PROCESSOR_EV5: \
1665 case PROCESSOR_EV6: \
1666 return COSTS_N_INSNS (4); \
1669 else if (GET_CODE (XEXP (X, 0)) == MULT \
1670 && const48_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
1671 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1672 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1675 switch (alpha_cpu) \
1677 case PROCESSOR_EV4: \
1678 if (FLOAT_MODE_P (GET_MODE (X))) \
1679 return COSTS_N_INSNS (6); \
1680 return COSTS_N_INSNS (23); \
1681 case PROCESSOR_EV5: \
1682 if (FLOAT_MODE_P (GET_MODE (X))) \
1683 return COSTS_N_INSNS (4); \
1684 else if (GET_MODE (X) == DImode) \
1685 return COSTS_N_INSNS (12); \
1687 return COSTS_N_INSNS (8); \
1688 case PROCESSOR_EV6: \
1689 if (FLOAT_MODE_P (GET_MODE (X))) \
1690 return COSTS_N_INSNS (4); \
1692 return COSTS_N_INSNS (7); \
1696 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1697 && INTVAL (XEXP (X, 1)) <= 3) \
1699 /* ... fall through ... */ \
1700 case ASHIFTRT: case LSHIFTRT: \
1701 switch (alpha_cpu) \
1703 case PROCESSOR_EV4: \
1704 return COSTS_N_INSNS (2); \
1705 case PROCESSOR_EV5: \
1706 case PROCESSOR_EV6: \
1707 return COSTS_N_INSNS (1); \
1710 case IF_THEN_ELSE: \
1711 switch (alpha_cpu) \
1713 case PROCESSOR_EV4: \
1714 case PROCESSOR_EV6: \
1715 return COSTS_N_INSNS (2); \
1716 case PROCESSOR_EV5: \
1717 return COSTS_N_INSNS (1); \
1720 case DIV: case UDIV: case MOD: case UMOD: \
1721 switch (alpha_cpu) \
1723 case PROCESSOR_EV4: \
1724 if (GET_MODE (X) == SFmode) \
1725 return COSTS_N_INSNS (34); \
1726 else if (GET_MODE (X) == DFmode) \
1727 return COSTS_N_INSNS (63); \
1729 return COSTS_N_INSNS (70); \
1730 case PROCESSOR_EV5: \
1731 if (GET_MODE (X) == SFmode) \
1732 return COSTS_N_INSNS (15); \
1733 else if (GET_MODE (X) == DFmode) \
1734 return COSTS_N_INSNS (22); \
1736 return COSTS_N_INSNS (70); /* ??? */ \
1737 case PROCESSOR_EV6: \
1738 if (GET_MODE (X) == SFmode) \
1739 return COSTS_N_INSNS (12); \
1740 else if (GET_MODE (X) == DFmode) \
1741 return COSTS_N_INSNS (15); \
1743 return COSTS_N_INSNS (70); /* ??? */ \
1747 switch (alpha_cpu) \
1749 case PROCESSOR_EV4: \
1750 case PROCESSOR_EV6: \
1751 return COSTS_N_INSNS (3); \
1752 case PROCESSOR_EV5: \
1753 return COSTS_N_INSNS (2); \
1756 case NEG: case ABS: \
1757 if (! FLOAT_MODE_P (GET_MODE (X))) \
1759 /* ... fall through ... */ \
1760 case FLOAT: case UNSIGNED_FLOAT: case FIX: case UNSIGNED_FIX: \
1761 case FLOAT_EXTEND: case FLOAT_TRUNCATE: \
1762 switch (alpha_cpu) \
1764 case PROCESSOR_EV4: \
1765 return COSTS_N_INSNS (6); \
1766 case PROCESSOR_EV5: \
1767 case PROCESSOR_EV6: \
1768 return COSTS_N_INSNS (4); \
1772 /* Control the assembler format that we output. */
1774 /* Output to assembler file text saying following lines
1775 may contain character constants, extra white space, comments, etc. */
1776 #define ASM_APP_ON (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "")
1778 /* Output to assembler file text saying following lines
1779 no longer contain unusual constructs. */
1780 #define ASM_APP_OFF (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "")
1782 #define TEXT_SECTION_ASM_OP "\t.text"
1784 /* Output before read-only data. */
1786 #define READONLY_DATA_SECTION_ASM_OP "\t.rdata"
1788 /* Output before writable data. */
1790 #define DATA_SECTION_ASM_OP "\t.data"
1792 /* Define an extra section for read-only data, a routine to enter it, and
1793 indicate that it is for read-only data.
1795 The first time we enter the readonly data section for a file, we write
1796 eight bytes of zero. This works around a bug in DEC's assembler in
1797 some versions of OSF/1 V3.x. */
1799 #define EXTRA_SECTIONS readonly_data
1801 #define EXTRA_SECTION_FUNCTIONS \
1803 literal_section () \
1805 if (in_section != readonly_data) \
1807 static int firsttime = 1; \
1809 fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \
1813 assemble_aligned_integer (8, const0_rtx); \
1816 in_section = readonly_data; \
1820 #define READONLY_DATA_SECTION literal_section
1822 /* Define this macro if references to a symbol must be treated differently
1823 depending on something about the variable or function named by the symbol
1824 (such as what section it is in). */
1826 #define ENCODE_SECTION_INFO(DECL) alpha_encode_section_info (DECL)
1828 /* If a variable is weakened, made one only or moved into a different
1829 section, it may be necessary to redo the section info to move the
1830 variable out of sdata. */
1832 #define REDO_SECTION_INFO_P(DECL) \
1833 ((TREE_CODE (DECL) == VAR_DECL) \
1834 && (DECL_ONE_ONLY (DECL) || DECL_WEAK (DECL) || DECL_COMMON (DECL) \
1835 || DECL_SECTION_NAME (DECL) != 0))
1837 #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1839 (VAR) = (SYMBOL_NAME); \
1840 if ((VAR)[0] == '@') \
1842 if ((VAR)[0] == '*') \
1846 /* How to refer to registers in assembler output.
1847 This sequence is indexed by compiler's hard-register-number (see above). */
1849 #define REGISTER_NAMES \
1850 {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
1851 "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
1852 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \
1853 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \
1854 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
1855 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
1856 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
1857 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"}
1859 /* Strip name encoding when emitting labels. */
1861 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
1863 const char *name_ = NAME; \
1864 if (*name_ == '@') \
1866 if (*name_ == '*') \
1869 fputs (user_label_prefix, STREAM); \
1870 fputs (name_, STREAM); \
1873 /* This is how to output the definition of a user-level label named NAME,
1874 such as the label on a static function or variable NAME. */
1876 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1877 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1879 /* This is how to output a command to make the user-level label named NAME
1880 defined for reference from other files. */
1882 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1883 do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1885 /* The prefix to add to user-visible assembler symbols. */
1887 #define USER_LABEL_PREFIX ""
1889 /* This is how to output an internal numbered label where
1890 PREFIX is the class of label and NUM is the number within the class. */
1892 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1893 fprintf (FILE, "$%s%d:\n", PREFIX, NUM)
1895 /* This is how to output a label for a jump table. Arguments are the same as
1896 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1899 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1900 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1902 /* This is how to store into the string LABEL
1903 the symbol_ref name of an internal numbered label where
1904 PREFIX is the class of label and NUM is the number within the class.
1905 This is suitable for output with `assemble_name'. */
1907 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1908 sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM))
1910 /* Check a floating-point value for validity for a particular machine mode. */
1912 #define CHECK_FLOAT_VALUE(MODE, D, OVERFLOW) \
1913 ((OVERFLOW) = check_float_value (MODE, &D, OVERFLOW))
1915 /* We use the default ASCII-output routine, except that we don't write more
1916 than 50 characters since the assembler doesn't support very long lines. */
1918 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1920 FILE *_hide_asm_out_file = (MYFILE); \
1921 const unsigned char *_hide_p = (const unsigned char *) (MYSTRING); \
1922 int _hide_thissize = (MYLENGTH); \
1923 int _size_so_far = 0; \
1925 FILE *asm_out_file = _hide_asm_out_file; \
1926 const unsigned char *p = _hide_p; \
1927 int thissize = _hide_thissize; \
1929 fprintf (asm_out_file, "\t.ascii \""); \
1931 for (i = 0; i < thissize; i++) \
1933 register int c = p[i]; \
1935 if (_size_so_far ++ > 50 && i < thissize - 4) \
1936 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1938 if (c == '\"' || c == '\\') \
1939 putc ('\\', asm_out_file); \
1940 if (c >= ' ' && c < 0177) \
1941 putc (c, asm_out_file); \
1944 fprintf (asm_out_file, "\\%o", c); \
1945 /* After an octal-escape, if a digit follows, \
1946 terminate one string constant and start another. \
1947 The VAX assembler fails to stop reading the escape \
1948 after three digits, so this is the only way we \
1949 can get it to parse the data properly. */ \
1950 if (i < thissize - 1 && ISDIGIT (p[i + 1])) \
1951 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1954 fprintf (asm_out_file, "\"\n"); \
1959 /* This is how to output an insn to push a register on the stack.
1960 It need not be very fast code. */
1962 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1963 fprintf (FILE, "\tsubq $30,8,$30\n\tst%s $%s%d,0($30)\n", \
1964 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1967 /* This is how to output an insn to pop a register from the stack.
1968 It need not be very fast code. */
1970 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1971 fprintf (FILE, "\tld%s $%s%d,0($30)\n\taddq $30,8,$30\n", \
1972 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1975 /* This is how to output an element of a case-vector that is absolute.
1976 (Alpha does not use such vectors, but we must define this macro anyway.) */
1978 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) abort ()
1980 /* This is how to output an element of a case-vector that is relative. */
1982 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1983 fprintf (FILE, "\t.%s $L%d\n", TARGET_ABI_WINDOWS_NT ? "long" : "gprel32", \
1986 /* This is how to output an assembler line
1987 that says to advance the location counter
1988 to a multiple of 2**LOG bytes. */
1990 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1992 fprintf (FILE, "\t.align %d\n", LOG);
1994 /* This is how to advance the location counter by SIZE bytes. */
1996 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1997 fprintf (FILE, "\t.space %d\n", (SIZE))
1999 /* This says how to output an assembler line
2000 to define a global common symbol. */
2002 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
2003 ( fputs ("\t.comm ", (FILE)), \
2004 assemble_name ((FILE), (NAME)), \
2005 fprintf ((FILE), ",%d\n", (SIZE)))
2007 /* This says how to output an assembler line
2008 to define a local common symbol. */
2010 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
2011 ( fputs ("\t.lcomm ", (FILE)), \
2012 assemble_name ((FILE), (NAME)), \
2013 fprintf ((FILE), ",%d\n", (SIZE)))
2015 /* Store in OUTPUT a string (made with alloca) containing
2016 an assembler-name for a local static variable named NAME.
2017 LABELNO is an integer which is different for each call. */
2019 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2020 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2021 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2024 /* Print operand X (an rtx) in assembler syntax to file FILE.
2025 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2026 For `%' followed by punctuation, CODE is the punctuation and X is null. */
2028 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2030 /* Determine which codes are valid without a following integer. These must
2033 ~ Generates the name of the current function.
2035 / Generates the instruction suffix. The TRAP_SUFFIX and ROUND_SUFFIX
2036 attributes are examined to determine what is appropriate.
2038 , Generates single precision suffix for floating point
2039 instructions (s for IEEE, f for VAX)
2041 - Generates double precision suffix for floating point
2042 instructions (t for IEEE, g for VAX)
2045 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2046 ((CODE) == '/' || (CODE) == ',' || (CODE) == '-' || (CODE) == '~' \
2047 || (CODE) == '#' || (CODE) == '*')
2049 /* Print a memory address as an operand to reference that memory location. */
2051 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2052 print_operand_address((FILE), (ADDR))
2054 /* Define the codes that are matched by predicates in alpha.c. */
2056 #define PREDICATE_CODES \
2057 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
2058 {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \
2059 {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \
2060 {"cint8_operand", {CONST_INT}}, \
2061 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
2062 {"add_operand", {SUBREG, REG, CONST_INT}}, \
2063 {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \
2064 {"const48_operand", {CONST_INT}}, \
2065 {"and_operand", {SUBREG, REG, CONST_INT}}, \
2066 {"or_operand", {SUBREG, REG, CONST_INT}}, \
2067 {"mode_mask_operand", {CONST_INT}}, \
2068 {"mul8_operand", {CONST_INT}}, \
2069 {"mode_width_operand", {CONST_INT}}, \
2070 {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \
2071 {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \
2072 {"alpha_zero_comparison_operator", {EQ, NE, LE, LT, LEU, LTU}}, \
2073 {"alpha_swapped_comparison_operator", {EQ, GE, GT, GEU, GTU}}, \
2074 {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \
2075 {"alpha_fp_comparison_operator", {EQ, LE, LT, UNORDERED}}, \
2076 {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \
2077 {"fp0_operand", {CONST_DOUBLE}}, \
2078 {"current_file_function_operand", {SYMBOL_REF}}, \
2079 {"direct_call_operand", {SYMBOL_REF}}, \
2080 {"local_symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
2081 {"small_symbolic_operand", {SYMBOL_REF, CONST}}, \
2082 {"global_symbolic_operand", {SYMBOL_REF, CONST}}, \
2083 {"call_operand", {REG, SYMBOL_REF}}, \
2084 {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
2085 SYMBOL_REF, CONST, LABEL_REF, HIGH}}, \
2086 {"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
2087 SYMBOL_REF, CONST, LABEL_REF, HIGH}}, \
2088 {"some_ni_operand", {SUBREG, REG, MEM}}, \
2089 {"aligned_memory_operand", {MEM}}, \
2090 {"unaligned_memory_operand", {MEM}}, \
2091 {"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}}, \
2092 {"any_memory_operand", {MEM}}, \
2093 {"hard_fp_register_operand", {SUBREG, REG}}, \
2094 {"hard_int_register_operand", {SUBREG, REG}}, \
2095 {"reg_not_elim_operand", {SUBREG, REG}}, \
2096 {"reg_no_subreg_operand", {REG}}, \
2097 {"addition_operation", {PLUS}}, \
2098 {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
2099 {"some_small_symbolic_mem_operand", {MEM, SIGN_EXTEND, ZERO_EXTEND, \
2102 /* Define the `__builtin_va_list' type for the ABI. */
2103 #define BUILD_VA_LIST_TYPE(VALIST) \
2104 (VALIST) = alpha_build_va_list ()
2106 /* Implement `va_start' for varargs and stdarg. */
2107 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
2108 alpha_va_start (stdarg, valist, nextarg)
2110 /* Implement `va_arg'. */
2111 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
2112 alpha_va_arg (valist, type)
2114 /* Tell collect that the object format is ECOFF. */
2115 #define OBJECT_FORMAT_COFF
2116 #define EXTENDED_COFF
2118 /* If we use NM, pass -g to it so it only lists globals. */
2119 #define NM_FLAGS "-pg"
2121 /* Definitions for debugging. */
2123 #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */
2124 #define DBX_DEBUGGING_INFO /* generate embedded stabs */
2125 #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */
2127 #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
2128 #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
2132 /* Correct the offset of automatic variables and arguments. Note that
2133 the Alpha debug format wants all automatic variables and arguments
2134 to be in terms of two different offsets from the virtual frame pointer,
2135 which is the stack pointer before any adjustment in the function.
2136 The offset for the argument pointer is fixed for the native compiler,
2137 it is either zero (for the no arguments case) or large enough to hold
2138 all argument registers.
2139 The offset for the auto pointer is the fourth argument to the .frame
2140 directive (local_offset).
2141 To stay compatible with the native tools we use the same offsets
2142 from the virtual frame pointer and adjust the debugger arg/auto offsets
2143 accordingly. These debugger offsets are set up in output_prolog. */
2145 extern long alpha_arg_offset;
2146 extern long alpha_auto_offset;
2147 #define DEBUGGER_AUTO_OFFSET(X) \
2148 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)
2149 #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset)
2152 #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \
2153 alpha_output_lineno (STREAM, LINE)
2155 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
2156 alpha_output_filename (STREAM, NAME)
2158 /* mips-tfile.c limits us to strings of one page. We must underestimate this
2159 number, because the real length runs past this up to the next
2160 continuation point. This is really a dbxout.c bug. */
2161 #define DBX_CONTIN_LENGTH 3000
2163 /* By default, turn on GDB extensions. */
2164 #define DEFAULT_GDB_EXTENSIONS 1
2166 /* Stabs-in-ECOFF can't handle dbxout_function_end(). */
2167 #define NO_DBX_FUNCTION_END 1
2169 /* If we are smuggling stabs through the ALPHA ECOFF object
2170 format, put a comment in front of the .stab<x> operation so
2171 that the ALPHA assembler does not choke. The mips-tfile program
2172 will correctly put the stab into the object file. */
2174 #define ASM_STABS_OP ((TARGET_GAS) ? "\t.stabs\t" : " #.stabs\t")
2175 #define ASM_STABN_OP ((TARGET_GAS) ? "\t.stabn\t" : " #.stabn\t")
2176 #define ASM_STABD_OP ((TARGET_GAS) ? "\t.stabd\t" : " #.stabd\t")
2178 /* Forward references to tags are allowed. */
2179 #define SDB_ALLOW_FORWARD_REFERENCES
2181 /* Unknown tags are also allowed. */
2182 #define SDB_ALLOW_UNKNOWN_REFERENCES
2184 #define PUT_SDB_DEF(a) \
2186 fprintf (asm_out_file, "\t%s.def\t", \
2187 (TARGET_GAS) ? "" : "#"); \
2188 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2189 fputc (';', asm_out_file); \
2192 #define PUT_SDB_PLAIN_DEF(a) \
2194 fprintf (asm_out_file, "\t%s.def\t.%s;", \
2195 (TARGET_GAS) ? "" : "#", (a)); \
2198 #define PUT_SDB_TYPE(a) \
2200 fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \
2203 /* For block start and end, we create labels, so that
2204 later we can figure out where the correct offset is.
2205 The normal .ent/.end serve well enough for functions,
2206 so those are just commented out. */
2208 extern int sdb_label_count; /* block start/end next label # */
2210 #define PUT_SDB_BLOCK_START(LINE) \
2212 fprintf (asm_out_file, \
2213 "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \
2215 (TARGET_GAS) ? "" : "#", \
2218 sdb_label_count++; \
2221 #define PUT_SDB_BLOCK_END(LINE) \
2223 fprintf (asm_out_file, \
2224 "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \
2226 (TARGET_GAS) ? "" : "#", \
2229 sdb_label_count++; \
2232 #define PUT_SDB_FUNCTION_START(LINE)
2234 #define PUT_SDB_FUNCTION_END(LINE)
2236 #define PUT_SDB_EPILOGUE_END(NAME) ((void)(NAME))
2238 /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
2239 mips-tdump.c to print them out.
2241 These must match the corresponding definitions in gdb/mipsread.c.
2242 Unfortunately, gcc and gdb do not currently share any directories. */
2244 #define CODE_MASK 0x8F300
2245 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
2246 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
2247 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
2249 /* Override some mips-tfile definitions. */
2251 #define SHASH_SIZE 511
2252 #define THASH_SIZE 55
2254 /* Align ecoff symbol tables to avoid OSF1/1.3 nm complaints. */
2256 #define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7)
2258 /* The system headers under Alpha systems are generally C++-aware. */
2259 #define NO_IMPLICIT_EXTERN_C
2261 /* Generate calls to memcpy, etc., not bcopy, etc. */
2262 #define TARGET_MEM_FUNCTIONS 1
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