1 /* Definitions of target machine for GNU compiler, for DEC Alpha.
2 Copyright (C) 1992, 93, 94, 95, 96, 1997 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Names to predefine in the preprocessor for this target machine. */
25 #define CPP_PREDEFINES "\
26 -Dunix -D__osf__ -D__alpha -D__alpha__ -D_LONGLONG -DSYSTYPE_BSD \
27 -D_SYSTYPE_BSD -Asystem(unix) -Asystem(xpg4) -Acpu(alpha) -Amachine(alpha)"
29 /* Write out the correct language type definition for the header files.
30 Unless we have assembler language, write out the symbols for C. */
32 %{!.S: -D__LANGUAGE_C__ -D__LANGUAGE_C %{!ansi:-DLANGUAGE_C}} \
33 %{.S: -D__LANGUAGE_ASSEMBLY__ -D__LANGUAGE_ASSEMBLY %{!ansi:-DLANGUAGE_ASSEMBLY}} \
34 %{.cc: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
35 %{.cxx: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
36 %{.C: -D__LANGUAGE_C_PLUS_PLUS__ -D__LANGUAGE_C_PLUS_PLUS -D__cplusplus} \
37 %{.m: -D__LANGUAGE_OBJECTIVE_C__ -D__LANGUAGE_OBJECTIVE_C} \
39 %{mieee-with-inexact:-D_IEEE_FP -D_IEEE_FP_INEXACT}"
41 /* Set the spec to use for signed char. The default tests the above macro
42 but DEC's compiler can't handle the conditional in a "constant"
45 #define SIGNED_CHAR_SPEC "%{funsigned-char:-D__CHAR_UNSIGNED__}"
47 /* Under OSF4, -p and -pg require -lprof1, and -lprof1 requires -lpdf. */
49 #define LIB_SPEC "%{p:-lprof1 -lpdf} %{pg:-lprof1 -lpdf} %{a:-lprof2} -lc"
51 /* Pass "-G 8" to ld because Alpha's CC does. Pass -O3 if we are
52 optimizing, -O1 if we are not. Pass -shared, -non_shared or
53 -call_shared as appropriate. Also pass -pg. */
55 "-G 8 %{O*:-O3} %{!O*:-O1} %{static:-non_shared} \
56 %{!static:%{shared:-shared} %{!shared:-call_shared}} %{pg} %{taso} \
59 #define WORD_SWITCH_TAKES_ARG(STR) \
60 (!strcmp (STR, "rpath") || !strcmp (STR, "include") \
61 || !strcmp (STR, "imacros") || !strcmp (STR, "aux-info") \
62 || !strcmp (STR, "idirafter") || !strcmp (STR, "iprefix") \
63 || !strcmp (STR, "iwithprefix") || !strcmp (STR, "iwithprefixbefore") \
64 || !strcmp (STR, "isystem"))
66 #define STARTFILE_SPEC \
67 "%{!shared:%{pg:gcrt0.o%s}%{!pg:%{p:mcrt0.o%s}%{!p:crt0.o%s}}}"
69 /* Print subsidiary information on the compiler version in use. */
70 #define TARGET_VERSION
72 /* Define the location for the startup file on OSF/1 for Alpha. */
74 #define MD_STARTFILE_PREFIX "/usr/lib/cmplrs/cc/"
76 /* Run-time compilation parameters selecting different hardware subsets. */
78 /* Which processor to schedule for. The cpu attribute defines a list that
79 mirrors this list, so changes to alpha.md must be made at the same time. */
82 {PROCESSOR_EV4, /* 2106[46]{a,} */
83 PROCESSOR_EV5}; /* 21164{a,} */
85 extern enum processor_type alpha_cpu;
87 enum alpha_trap_precision
89 ALPHA_TP_PROG, /* No precision (default). */
90 ALPHA_TP_FUNC, /* Trap contained within originating function. */
91 ALPHA_TP_INSN /* Instruction accuracy and code is resumption safe. */
94 enum alpha_fp_rounding_mode
96 ALPHA_FPRM_NORM, /* Normal rounding mode. */
97 ALPHA_FPRM_MINF, /* Round towards minus-infinity. */
98 ALPHA_FPRM_CHOP, /* Chopped rounding mode (towards 0). */
99 ALPHA_FPRM_DYN /* Dynamic rounding mode. */
102 enum alpha_fp_trap_mode
104 ALPHA_FPTM_N, /* Normal trap mode. */
105 ALPHA_FPTM_U, /* Underflow traps enabled. */
106 ALPHA_FPTM_SU, /* Software completion, w/underflow traps */
107 ALPHA_FPTM_SUI /* Software completion, w/underflow & inexact traps */
110 extern int target_flags;
112 extern enum alpha_trap_precision alpha_tp;
113 extern enum alpha_fp_rounding_mode alpha_fprm;
114 extern enum alpha_fp_trap_mode alpha_fptm;
116 /* This means that floating-point support exists in the target implementation
117 of the Alpha architecture. This is usually the default. */
120 #define TARGET_FP (target_flags & MASK_FP)
122 /* This means that floating-point registers are allowed to be used. Note
123 that Alpha implementations without FP operations are required to
124 provide the FP registers. */
126 #define MASK_FPREGS 2
127 #define TARGET_FPREGS (target_flags & MASK_FPREGS)
129 /* This means that gas is used to process the assembler file. */
132 #define TARGET_GAS (target_flags & MASK_GAS)
134 /* This means that we should mark procedures as IEEE conformant. */
136 #define MASK_IEEE_CONFORMANT 8
137 #define TARGET_IEEE_CONFORMANT (target_flags & MASK_IEEE_CONFORMANT)
139 /* This means we should be IEEE-compliant except for inexact. */
142 #define TARGET_IEEE (target_flags & MASK_IEEE)
144 /* This means we should be fully IEEE-compliant. */
146 #define MASK_IEEE_WITH_INEXACT 32
147 #define TARGET_IEEE_WITH_INEXACT (target_flags & MASK_IEEE_WITH_INEXACT)
149 /* This means we are compiling for Windows NT. */
151 #define MASK_WINDOWS_NT 64
152 #define TARGET_WINDOWS_NT (target_flags & MASK_WINDOWS_NT)
154 /* This means we must construct all constants rather than emitting
155 them as literal data. */
157 #define MASK_BUILD_CONSTANTS 128
158 #define TARGET_BUILD_CONSTANTS (target_flags & MASK_BUILD_CONSTANTS)
160 /* This means we are compiling for openVMS. */
162 #define MASK_OPEN_VMS 256
163 #define TARGET_OPEN_VMS (target_flags & MASK_OPEN_VMS)
165 /* This means we handle floating points in VAX F- (float)
166 or G- (double) Format. */
168 #define MASK_FLOAT_VAX 512
169 #define TARGET_FLOAT_VAX (target_flags & MASK_FLOAT_VAX)
171 /* This means that the processor has byte and half word loads and stores. */
173 #define MASK_BYTE_OPS 1024
174 #define TARGET_BYTE_OPS (target_flags & MASK_BYTE_OPS)
176 /* Macro to define tables used to set the flags.
177 This is a list in braces of pairs in braces,
178 each pair being { "NAME", VALUE }
179 where VALUE is the bits to set or minus the bits to clear.
180 An empty string NAME is used to identify the default VALUE. */
182 #define TARGET_SWITCHES \
183 { {"no-soft-float", MASK_FP}, \
184 {"soft-float", - MASK_FP}, \
185 {"fp-regs", MASK_FPREGS}, \
186 {"no-fp-regs", - (MASK_FP|MASK_FPREGS)}, \
187 {"alpha-as", -MASK_GAS}, \
189 {"ieee-conformant", MASK_IEEE_CONFORMANT}, \
190 {"ieee", MASK_IEEE|MASK_IEEE_CONFORMANT}, \
191 {"ieee-with-inexact", MASK_IEEE_WITH_INEXACT|MASK_IEEE_CONFORMANT}, \
192 {"build-constants", MASK_BUILD_CONSTANTS}, \
193 {"float-vax", MASK_FLOAT_VAX}, \
194 {"float-ieee", -MASK_FLOAT_VAX}, \
195 {"byte", MASK_BYTE_OPS}, \
196 {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT} }
198 #define TARGET_DEFAULT MASK_FP|MASK_FPREGS
200 #ifndef TARGET_CPU_DEFAULT
201 #define TARGET_CPU_DEFAULT 0
204 /* This macro is similar to `TARGET_SWITCHES' but defines names of
205 command options that have values. Its definition is an initializer
206 with a subgrouping for each command option.
208 Each subgrouping contains a string constant, that defines the fixed
209 part of the option name, and the address of a variable. The
210 variable, type `char *', is set to the variable part of the given
211 option if the fixed part matches. The actual option name is made
212 by appending `-m' to the specified name.
214 Here is an example which defines `-mshort-data-NUMBER'. If the
215 given option is `-mshort-data-512', the variable `m88k_short_data'
216 will be set to the string `"512"'.
218 extern char *m88k_short_data;
219 #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
221 extern char *alpha_cpu_string; /* For -mcpu=ev[4|5] */
222 extern char *alpha_fprm_string; /* For -mfp-rounding-mode=[n|m|c|d] */
223 extern char *alpha_fptm_string; /* For -mfp-trap-mode=[n|u|su|sui] */
224 extern char *alpha_tp_string; /* For -mtrap-precision=[p|f|i] */
226 #define TARGET_OPTIONS \
228 {"cpu=", &alpha_cpu_string}, \
229 {"fp-rounding-mode=", &alpha_fprm_string}, \
230 {"fp-trap-mode=", &alpha_fptm_string}, \
231 {"trap-precision=", &alpha_tp_string}, \
234 /* Sometimes certain combinations of command options do not make sense
235 on a particular target machine. You can define a macro
236 `OVERRIDE_OPTIONS' to take account of this. This macro, if
237 defined, is executed once just after all the command options have
240 On the Alpha, it is used to translate target-option strings into
243 extern void override_options ();
244 #define OVERRIDE_OPTIONS override_options ()
247 /* Define this macro to change register usage conditional on target flags.
249 On the Alpha, we use this to disable the floating-point registers when
252 #define CONDITIONAL_REGISTER_USAGE \
253 if (! TARGET_FPREGS) \
254 for (i = 32; i < 63; i++) \
255 fixed_regs[i] = call_used_regs[i] = 1;
257 /* Show we can debug even without a frame pointer. */
258 #define CAN_DEBUG_WITHOUT_FP
260 /* target machine storage layout */
262 /* Define to enable software floating point emulation. */
263 #define REAL_ARITHMETIC
265 /* Define the size of `int'. The default is the same as the word size. */
266 #define INT_TYPE_SIZE 32
268 /* Define the size of `long long'. The default is the twice the word size. */
269 #define LONG_LONG_TYPE_SIZE 64
271 /* The two floating-point formats we support are S-floating, which is
272 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double'
273 and `long double' are T. */
275 #define FLOAT_TYPE_SIZE 32
276 #define DOUBLE_TYPE_SIZE 64
277 #define LONG_DOUBLE_TYPE_SIZE 64
279 #define WCHAR_TYPE "unsigned int"
280 #define WCHAR_TYPE_SIZE 32
282 /* Define this macro if it is advisable to hold scalars in registers
283 in a wider mode than that declared by the program. In such cases,
284 the value is constrained to be within the bounds of the declared
285 type, but kept valid in the wider mode. The signedness of the
286 extension may differ from that of the type.
288 For Alpha, we always store objects in a full register. 32-bit objects
289 are always sign-extended, but smaller objects retain their signedness. */
291 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
292 if (GET_MODE_CLASS (MODE) == MODE_INT \
293 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
295 if ((MODE) == SImode) \
300 /* Define this if function arguments should also be promoted using the above
303 #define PROMOTE_FUNCTION_ARGS
305 /* Likewise, if the function return value is promoted. */
307 #define PROMOTE_FUNCTION_RETURN
309 /* Define this if most significant bit is lowest numbered
310 in instructions that operate on numbered bit-fields.
312 There are no such instructions on the Alpha, but the documentation
314 #define BITS_BIG_ENDIAN 0
316 /* Define this if most significant byte of a word is the lowest numbered.
317 This is false on the Alpha. */
318 #define BYTES_BIG_ENDIAN 0
320 /* Define this if most significant word of a multiword number is lowest
323 For Alpha we can decide arbitrarily since there are no machine instructions
324 for them. Might as well be consistent with bytes. */
325 #define WORDS_BIG_ENDIAN 0
327 /* number of bits in an addressable storage unit */
328 #define BITS_PER_UNIT 8
330 /* Width in bits of a "word", which is the contents of a machine register.
331 Note that this is not necessarily the width of data type `int';
332 if using 16-bit ints on a 68000, this would still be 32.
333 But on a machine with 16-bit registers, this would be 16. */
334 #define BITS_PER_WORD 64
336 /* Width of a word, in units (bytes). */
337 #define UNITS_PER_WORD 8
339 /* Width in bits of a pointer.
340 See also the macro `Pmode' defined below. */
341 #define POINTER_SIZE 64
343 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
344 #define PARM_BOUNDARY 64
346 /* Boundary (in *bits*) on which stack pointer should be aligned. */
347 #define STACK_BOUNDARY 64
349 /* Allocation boundary (in *bits*) for the code of a function. */
350 #define FUNCTION_BOUNDARY 64
352 /* Alignment of field after `int : 0' in a structure. */
353 #define EMPTY_FIELD_BOUNDARY 64
355 /* Every structure's size must be a multiple of this. */
356 #define STRUCTURE_SIZE_BOUNDARY 8
358 /* A bitfield declared as `int' forces `int' alignment for the struct. */
359 #define PCC_BITFIELD_TYPE_MATTERS 1
361 /* Align loop starts for optimal branching.
363 ??? Kludge this and the next macro for the moment by not doing anything if
364 we don't optimize and also if we are writing ECOFF symbols to work around
365 a bug in DEC's assembler. */
367 #define ASM_OUTPUT_LOOP_ALIGN(FILE) \
368 if (optimize > 0 && write_symbols != SDB_DEBUG) \
369 ASM_OUTPUT_ALIGN (FILE, 5)
371 /* This is how to align an instruction for optimal branching.
372 On Alpha we'll get better performance by aligning on a quadword
375 #define ASM_OUTPUT_ALIGN_CODE(FILE) \
376 if (optimize > 0 && write_symbols != SDB_DEBUG) \
377 ASM_OUTPUT_ALIGN ((FILE), 4)
379 /* No data type wants to be aligned rounder than this. */
380 #define BIGGEST_ALIGNMENT 64
382 /* For atomic access to objects, must have at least 32-bit alignment
383 unless the machine has byte operations. */
384 #define MINIMUM_ATOMIC_ALIGNMENT (TARGET_BYTE_OPS ? 8 : 32)
386 /* Align all constants and variables to at least a word boundary so
387 we can pick up pieces of them faster. */
388 #define CONSTANT_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
389 #define DATA_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
391 /* Set this non-zero if move instructions will actually fail to work
392 when given unaligned data.
394 Since we get an error message when we do one, call them invalid. */
396 #define STRICT_ALIGNMENT 1
398 /* Set this non-zero if unaligned move instructions are extremely slow.
400 On the Alpha, they trap. */
402 #define SLOW_UNALIGNED_ACCESS 1
404 /* Standard register usage. */
406 /* Number of actual hardware registers.
407 The hardware registers are assigned numbers for the compiler
408 from 0 to just below FIRST_PSEUDO_REGISTER.
409 All registers that the compiler knows about must be given numbers,
410 even those that are not normally considered general registers.
412 We define all 32 integer registers, even though $31 is always zero,
413 and all 32 floating-point registers, even though $f31 is also
414 always zero. We do not bother defining the FP status register and
415 there are no other registers.
417 Since $31 is always zero, we will use register number 31 as the
418 argument pointer. It will never appear in the generated code
419 because we will always be eliminating it in favor of the stack
420 pointer or hardware frame pointer.
422 Likewise, we use $f31 for the frame pointer, which will always
423 be eliminated in favor of the hardware frame pointer or the
426 #define FIRST_PSEUDO_REGISTER 64
428 /* 1 for registers that have pervasive standard uses
429 and are not available for the register allocator. */
431 #define FIXED_REGISTERS \
432 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
433 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
434 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
435 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
437 /* 1 for registers not available across function calls.
438 These must include the FIXED_REGISTERS and also any
439 registers that can be used without being saved.
440 The latter must include the registers where values are returned
441 and the register where structure-value addresses are passed.
442 Aside from that, you can include as many other registers as you like. */
443 #define CALL_USED_REGISTERS \
444 {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
445 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
446 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
447 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
449 /* List the order in which to allocate registers. Each register must be
450 listed once, even those in FIXED_REGISTERS.
452 We allocate in the following order:
453 $f1 (nonsaved floating-point register)
456 $f21-$f16 (likewise, but input args)
457 $f0 (nonsaved, but return value)
458 $f2-$f9 (saved floating-point registers)
459 $1-$8 (nonsaved integer registers)
462 $0 (likewise, but return value)
463 $21-$16 (likewise, but input args)
464 $27 (procedure value in OSF, nonsaved in NT)
465 $9-$14 (saved integer registers)
469 $30, $31, $f31 (stack pointer and always zero/ap & fp) */
471 #define REG_ALLOC_ORDER \
473 42, 43, 44, 45, 46, 47, \
474 54, 55, 56, 57, 58, 59, 60, 61, 62, \
475 53, 52, 51, 50, 49, 48, \
477 34, 35, 36, 37, 38, 39, 40, 41, \
478 1, 2, 3, 4, 5, 6, 7, 8, \
482 21, 20, 19, 18, 17, 16, \
484 9, 10, 11, 12, 13, 14, \
490 /* Return number of consecutive hard regs needed starting at reg REGNO
491 to hold something of mode MODE.
492 This is ordinarily the length in words of a value of mode MODE
493 but can be less for certain modes in special long registers. */
495 #define HARD_REGNO_NREGS(REGNO, MODE) \
496 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
498 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
499 On Alpha, the integer registers can hold any mode. The floating-point
500 registers can hold 32-bit and 64-bit integers as well, but not 16-bit
501 or 8-bit values. If we only allowed the larger integers into FP registers,
502 we'd have to say that QImode and SImode aren't tiable, which is a
503 pain. So say all registers can hold everything and see how that works. */
505 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
507 /* Value is 1 if it is a good idea to tie two pseudo registers
508 when one has mode MODE1 and one has mode MODE2.
509 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
510 for any hard reg, then this must be 0 for correct output. */
512 #define MODES_TIEABLE_P(MODE1, MODE2) 1
514 /* Specify the registers used for certain standard purposes.
515 The values of these macros are register numbers. */
517 /* Alpha pc isn't overloaded on a register that the compiler knows about. */
518 /* #define PC_REGNUM */
520 /* Register to use for pushing function arguments. */
521 #define STACK_POINTER_REGNUM 30
523 /* Base register for access to local variables of the function. */
524 #define HARD_FRAME_POINTER_REGNUM 15
526 /* Value should be nonzero if functions must have frame pointers.
527 Zero means the frame pointer need not be set up (and parms
528 may be accessed via the stack pointer) in functions that seem suitable.
529 This is computed in `reload', in reload1.c. */
530 #define FRAME_POINTER_REQUIRED 0
532 /* Base register for access to arguments of the function. */
533 #define ARG_POINTER_REGNUM 31
535 /* Base register for access to local variables of function. */
536 #define FRAME_POINTER_REGNUM 63
538 /* Register in which static-chain is passed to a function.
540 For the Alpha, this is based on an example; the calling sequence
541 doesn't seem to specify this. */
542 #define STATIC_CHAIN_REGNUM 1
544 /* Register in which address to store a structure value
545 arrives in the function. On the Alpha, the address is passed
546 as a hidden argument. */
547 #define STRUCT_VALUE 0
549 /* Define the classes of registers for register constraints in the
550 machine description. Also define ranges of constants.
552 One of the classes must always be named ALL_REGS and include all hard regs.
553 If there is more than one class, another class must be named NO_REGS
554 and contain no registers.
556 The name GENERAL_REGS must be the name of a class (or an alias for
557 another name such as ALL_REGS). This is the class of registers
558 that is allowed by "g" or "r" in a register constraint.
559 Also, registers outside this class are allocated only when
560 instructions express preferences for them.
562 The classes must be numbered in nondecreasing order; that is,
563 a larger-numbered class must never be contained completely
564 in a smaller-numbered class.
566 For any two classes, it is very desirable that there be another
567 class that represents their union. */
569 enum reg_class { NO_REGS, GENERAL_REGS, FLOAT_REGS, ALL_REGS,
572 #define N_REG_CLASSES (int) LIM_REG_CLASSES
574 /* Give names of register classes as strings for dump file. */
576 #define REG_CLASS_NAMES \
577 {"NO_REGS", "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
579 /* Define which registers fit in which classes.
580 This is an initializer for a vector of HARD_REG_SET
581 of length N_REG_CLASSES. */
583 #define REG_CLASS_CONTENTS \
584 { {0, 0}, {~0, 0x80000000}, {0, 0x7fffffff}, {~0, ~0} }
586 /* The same information, inverted:
587 Return the class number of the smallest class containing
588 reg number REGNO. This could be a conditional expression
589 or could index an array. */
591 #define REGNO_REG_CLASS(REGNO) \
592 ((REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS : GENERAL_REGS)
594 /* The class value for index registers, and the one for base regs. */
595 #define INDEX_REG_CLASS NO_REGS
596 #define BASE_REG_CLASS GENERAL_REGS
598 /* Get reg_class from a letter such as appears in the machine description. */
600 #define REG_CLASS_FROM_LETTER(C) \
601 ((C) == 'f' ? FLOAT_REGS : NO_REGS)
603 /* Define this macro to change register usage conditional on target flags. */
604 /* #define CONDITIONAL_REGISTER_USAGE */
606 /* The letters I, J, K, L, M, N, O, and P in a register constraint string
607 can be used to stand for particular ranges of immediate operands.
608 This macro defines what the ranges are.
609 C is the letter, and VALUE is a constant value.
610 Return 1 if VALUE is in the range specified by C.
613 `I' is used for the range of constants most insns can contain.
614 `J' is the constant zero.
615 `K' is used for the constant in an LDA insn.
616 `L' is used for the constant in a LDAH insn.
617 `M' is used for the constants that can be AND'ed with using a ZAP insn.
618 `N' is used for complemented 8-bit constants.
619 `O' is used for negated 8-bit constants.
620 `P' is used for the constants 1, 2 and 3. */
622 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
623 ((C) == 'I' ? (unsigned HOST_WIDE_INT) (VALUE) < 0x100 \
624 : (C) == 'J' ? (VALUE) == 0 \
625 : (C) == 'K' ? (unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000 \
626 : (C) == 'L' ? (((VALUE) & 0xffff) == 0 \
627 && (((VALUE)) >> 31 == -1 || (VALUE) >> 31 == 0) \
628 && ((HOST_BITS_PER_WIDE_INT == 64 \
629 || (unsigned) (VALUE) != 0x80000000U))) \
630 : (C) == 'M' ? zap_mask (VALUE) \
631 : (C) == 'N' ? (unsigned HOST_WIDE_INT) (~ (VALUE)) < 0x100 \
632 : (C) == 'O' ? (unsigned HOST_WIDE_INT) (- (VALUE)) < 0x100 \
633 : (C) == 'P' ? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 3 \
636 /* Similar, but for floating or large integer constants, and defining letters
637 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
639 For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE
640 that is the operand of a ZAP insn. */
642 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
643 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
644 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
645 : (C) == 'H' ? (GET_MODE (VALUE) == VOIDmode \
646 && zap_mask (CONST_DOUBLE_LOW (VALUE)) \
647 && zap_mask (CONST_DOUBLE_HIGH (VALUE))) \
650 /* Optional extra constraints for this machine.
652 For the Alpha, `Q' means that this is a memory operand but not a
653 reference to an unaligned location.
654 `R' is a SYMBOL_REF that has SYMBOL_REF_FLAG set or is the current
657 #define EXTRA_CONSTRAINT(OP, C) \
658 ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) != AND \
659 : (C) == 'R' ? current_file_function_operand (OP, Pmode) \
662 /* Given an rtx X being reloaded into a reg required to be
663 in class CLASS, return the class of reg to actually use.
664 In general this is just CLASS; but on some machines
665 in some cases it is preferable to use a more restrictive class.
667 On the Alpha, all constants except zero go into a floating-point
668 register via memory. */
670 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
671 (CONSTANT_P (X) && (X) != const0_rtx && (X) != CONST0_RTX (GET_MODE (X)) \
672 ? ((CLASS) == FLOAT_REGS ? NO_REGS : GENERAL_REGS) \
675 /* Loading and storing HImode or QImode values to and from memory
676 usually requires a scratch register. The exceptions are loading
677 QImode and HImode from an aligned address to a general register.
678 We also cannot load an unaligned address or a paradoxical SUBREG into an
681 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \
682 (((GET_CODE (IN) == MEM \
683 || (GET_CODE (IN) == REG && REGNO (IN) >= FIRST_PSEUDO_REGISTER) \
684 || (GET_CODE (IN) == SUBREG \
685 && (GET_CODE (SUBREG_REG (IN)) == MEM \
686 || (GET_CODE (SUBREG_REG (IN)) == REG \
687 && REGNO (SUBREG_REG (IN)) >= FIRST_PSEUDO_REGISTER)))) \
688 && (((CLASS) == FLOAT_REGS \
689 && ((MODE) == SImode || (MODE) == HImode || (MODE) == QImode)) \
690 || (((MODE) == QImode || (MODE) == HImode) \
691 && unaligned_memory_operand (IN, MODE)))) \
693 : ((CLASS) == FLOAT_REGS && GET_CODE (IN) == MEM \
694 && GET_CODE (XEXP (IN, 0)) == AND) ? GENERAL_REGS \
695 : ((CLASS) == FLOAT_REGS && GET_CODE (IN) == SUBREG \
696 && (GET_MODE_SIZE (GET_MODE (IN)) \
697 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (IN))))) ? GENERAL_REGS \
700 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \
701 (((GET_CODE (OUT) == MEM \
702 || (GET_CODE (OUT) == REG && REGNO (OUT) >= FIRST_PSEUDO_REGISTER) \
703 || (GET_CODE (OUT) == SUBREG \
704 && (GET_CODE (SUBREG_REG (OUT)) == MEM \
705 || (GET_CODE (SUBREG_REG (OUT)) == REG \
706 && REGNO (SUBREG_REG (OUT)) >= FIRST_PSEUDO_REGISTER)))) \
707 && (((MODE) == HImode || (MODE) == QImode \
708 || ((MODE) == SImode && (CLASS) == FLOAT_REGS)))) \
710 : ((CLASS) == FLOAT_REGS && GET_CODE (OUT) == MEM \
711 && GET_CODE (XEXP (OUT, 0)) == AND) ? GENERAL_REGS \
712 : ((CLASS) == FLOAT_REGS && GET_CODE (OUT) == SUBREG \
713 && (GET_MODE_SIZE (GET_MODE (OUT)) \
714 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (OUT))))) ? GENERAL_REGS \
717 /* If we are copying between general and FP registers, we need a memory
720 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) ((CLASS1) != (CLASS2))
722 /* Specify the mode to be used for memory when a secondary memory
723 location is needed. If MODE is floating-point, use it. Otherwise,
724 widen to a word like the default. This is needed because we always
725 store integers in FP registers in quadword format. This whole
726 area is very tricky! */
727 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
728 (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \
729 : GET_MODE_SIZE (MODE) >= 4 ? (MODE) \
730 : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0))
732 /* Return the maximum number of consecutive registers
733 needed to represent mode MODE in a register of class CLASS. */
735 #define CLASS_MAX_NREGS(CLASS, MODE) \
736 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
738 /* If defined, gives a class of registers that cannot be used as the
739 operand of a SUBREG that changes the size of the object. */
741 #define CLASS_CANNOT_CHANGE_SIZE FLOAT_REGS
743 /* Define the cost of moving between registers of various classes. Moving
744 between FLOAT_REGS and anything else except float regs is expensive.
745 In fact, we make it quite expensive because we really don't want to
746 do these moves unless it is clearly worth it. Optimizations may
747 reduce the impact of not being able to allocate a pseudo to a
750 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
751 (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) ? 2 : 20)
753 /* A C expressions returning the cost of moving data of MODE from a register to
756 On the Alpha, bump this up a bit. */
758 #define MEMORY_MOVE_COST(MODE) 6
760 /* Provide the cost of a branch. Exact meaning under development. */
761 #define BRANCH_COST 5
763 /* Adjust the cost of dependencies. */
765 #define ADJUST_COST(INSN,LINK,DEP,COST) \
766 (COST) = alpha_adjust_cost (INSN, LINK, DEP, COST)
768 /* Stack layout; function entry, exit and calling. */
770 /* Define this if pushing a word on the stack
771 makes the stack pointer a smaller address. */
772 #define STACK_GROWS_DOWNWARD
774 /* Define this if the nominal address of the stack frame
775 is at the high-address end of the local variables;
776 that is, each additional local variable allocated
777 goes at a more negative offset in the frame. */
778 /* #define FRAME_GROWS_DOWNWARD */
780 /* Offset within stack frame to start allocating local variables at.
781 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
782 first local allocated. Otherwise, it is the offset to the BEGINNING
783 of the first local allocated. */
785 #define STARTING_FRAME_OFFSET 0
787 /* If we generate an insn to push BYTES bytes,
788 this says how many the stack pointer really advances by.
789 On Alpha, don't define this because there are no push insns. */
790 /* #define PUSH_ROUNDING(BYTES) */
792 /* Define this if the maximum size of all the outgoing args is to be
793 accumulated and pushed during the prologue. The amount can be
794 found in the variable current_function_outgoing_args_size. */
795 #define ACCUMULATE_OUTGOING_ARGS
797 /* Offset of first parameter from the argument pointer register value. */
799 #define FIRST_PARM_OFFSET(FNDECL) 0
801 /* Definitions for register eliminations.
803 We have two registers that can be eliminated on the Alpha. First, the
804 frame pointer register can often be eliminated in favor of the stack
805 pointer register. Secondly, the argument pointer register can always be
806 eliminated; it is replaced with either the stack or frame pointer. */
808 /* This is an array of structures. Each structure initializes one pair
809 of eliminable registers. The "from" register number is given first,
810 followed by "to". Eliminations of the same "from" register are listed
811 in order of preference. */
813 #define ELIMINABLE_REGS \
814 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
815 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
816 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
817 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
819 /* Given FROM and TO register numbers, say whether this elimination is allowed.
820 Frame pointer elimination is automatically handled.
822 All eliminations are valid since the cases where FP can't be
823 eliminated are already handled. */
825 #define CAN_ELIMINATE(FROM, TO) 1
827 /* Round up to a multiple of 16 bytes. */
828 #define ALPHA_ROUND(X) (((X) + 15) & ~ 15)
830 /* Define the offset between two registers, one to be eliminated, and the other
831 its replacement, at the start of a routine. */
832 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
833 { if ((FROM) == FRAME_POINTER_REGNUM) \
834 (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \
835 + alpha_sa_size ()); \
836 else if ((FROM) == ARG_POINTER_REGNUM) \
837 (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \
839 + (ALPHA_ROUND (get_frame_size () \
840 + current_function_pretend_args_size) \
841 - current_function_pretend_args_size)); \
844 /* Define this if stack space is still allocated for a parameter passed
846 /* #define REG_PARM_STACK_SPACE */
848 /* Value is the number of bytes of arguments automatically
849 popped when returning from a subroutine call.
850 FUNDECL is the declaration node of the function (as a tree),
851 FUNTYPE is the data type of the function (as a tree),
852 or for a library call it is an identifier node for the subroutine name.
853 SIZE is the number of bytes of arguments passed on the stack. */
855 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
857 /* Define how to find the value returned by a function.
858 VALTYPE is the data type of the value (as a tree).
859 If the precise function being called is known, FUNC is its FUNCTION_DECL;
860 otherwise, FUNC is 0.
862 On Alpha the value is found in $0 for integer functions and
863 $f0 for floating-point functions. */
865 #define FUNCTION_VALUE(VALTYPE, FUNC) \
867 (INTEGRAL_MODE_P (TYPE_MODE (VALTYPE)) \
868 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
869 ? word_mode : TYPE_MODE (VALTYPE), \
871 && (TREE_CODE (VALTYPE) == REAL_TYPE \
872 || TREE_CODE (VALTYPE) == COMPLEX_TYPE)) \
875 /* Define how to find the value returned by a library function
876 assuming the value has mode MODE. */
878 #define LIBCALL_VALUE(MODE) \
879 gen_rtx (REG, MODE, \
881 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
882 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
885 /* The definition of this macro implies that there are cases where
886 a scalar value cannot be returned in registers.
888 For the Alpha, any structure or union type is returned in memory, as
889 are integers whose size is larger than 64 bits. */
891 #define RETURN_IN_MEMORY(TYPE) \
892 (TYPE_MODE (TYPE) == BLKmode \
893 || (TREE_CODE (TYPE) == INTEGER_TYPE && TYPE_PRECISION (TYPE) > 64))
895 /* 1 if N is a possible register number for a function value
896 as seen by the caller. */
898 #define FUNCTION_VALUE_REGNO_P(N) \
899 ((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33)
901 /* 1 if N is a possible register number for function argument passing.
902 On Alpha, these are $16-$21 and $f16-$f21. */
904 #define FUNCTION_ARG_REGNO_P(N) \
905 (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
907 /* Define a data type for recording info about an argument list
908 during the scan of that argument list. This data type should
909 hold all necessary information about the function itself
910 and about the args processed so far, enough to enable macros
911 such as FUNCTION_ARG to determine where the next arg should go.
913 On Alpha, this is a single integer, which is a number of words
914 of arguments scanned so far.
915 Thus 6 or more means all following args should go on the stack. */
917 #define CUMULATIVE_ARGS int
919 /* Initialize a variable CUM of type CUMULATIVE_ARGS
920 for a call to a function whose data type is FNTYPE.
921 For a library call, FNTYPE is 0. */
923 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) (CUM) = 0
925 /* Define intermediate macro to compute the size (in registers) of an argument
928 #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \
930 ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
931 : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
933 /* Update the data in CUM to advance over an argument
934 of mode MODE and data type TYPE.
935 (TYPE is null for libcalls where that information may not be available.) */
937 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
938 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
941 (CUM) += ALPHA_ARG_SIZE (MODE, TYPE, NAMED)
943 /* Determine where to put an argument to a function.
944 Value is zero to push the argument on the stack,
945 or a hard register in which to store the argument.
947 MODE is the argument's machine mode.
948 TYPE is the data type of the argument (as a tree).
949 This is null for libcalls where that information may
951 CUM is a variable of type CUMULATIVE_ARGS which gives info about
952 the preceding args and about the function being called.
953 NAMED is nonzero if this argument is a named parameter
954 (otherwise it is an extra parameter matching an ellipsis).
956 On Alpha the first 6 words of args are normally in registers
957 and the rest are pushed. */
959 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
960 ((CUM) < 6 && ! MUST_PASS_IN_STACK (MODE, TYPE) \
961 ? gen_rtx(REG, (MODE), \
962 (CUM) + 16 + ((TARGET_FPREGS \
963 && (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT \
964 || GET_MODE_CLASS (MODE) == MODE_FLOAT)) \
968 /* Specify the padding direction of arguments.
970 On the Alpha, we must pad upwards in order to be able to pass args in
973 #define FUNCTION_ARG_PADDING(MODE, TYPE) upward
975 /* For an arg passed partly in registers and partly in memory,
976 this is the number of registers used.
977 For args passed entirely in registers or entirely in memory, zero. */
979 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
980 ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \
983 /* Perform any needed actions needed for a function that is receiving a
984 variable number of arguments.
988 MODE and TYPE are the mode and type of the current parameter.
990 PRETEND_SIZE is a variable that should be set to the amount of stack
991 that must be pushed by the prolog to pretend that our caller pushed
994 Normally, this macro will push all remaining incoming registers on the
995 stack and set PRETEND_SIZE to the length of the registers pushed.
997 On the Alpha, we allocate space for all 12 arg registers, but only
998 push those that are remaining.
1000 However, if NO registers need to be saved, don't allocate any space.
1001 This is not only because we won't need the space, but because AP includes
1002 the current_pretend_args_size and we don't want to mess up any
1003 ap-relative addresses already made.
1005 If we are not to use the floating-point registers, save the integer
1006 registers where we would put the floating-point registers. This is
1007 not the most efficient way to implement varargs with just one register
1008 class, but it isn't worth doing anything more efficient in this rare
1012 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
1017 move_block_from_reg \
1019 gen_rtx (MEM, BLKmode, \
1020 plus_constant (virtual_incoming_args_rtx, \
1021 ((CUM) + 6)* UNITS_PER_WORD)), \
1022 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
1023 move_block_from_reg \
1024 (16 + (TARGET_FPREGS ? 32 : 0) + CUM, \
1025 gen_rtx (MEM, BLKmode, \
1026 plus_constant (virtual_incoming_args_rtx, \
1027 (CUM) * UNITS_PER_WORD)), \
1028 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
1030 PRETEND_SIZE = 12 * UNITS_PER_WORD; \
1034 /* Try to output insns to set TARGET equal to the constant C if it can be
1035 done in less than N insns. Do all computations in MODE. Returns the place
1036 where the output has been placed if it can be done and the insns have been
1037 emitted. If it would take more than N insns, zero is returned and no
1038 insns and emitted. */
1039 extern struct rtx_def *alpha_emit_set_const ();
1040 extern struct rtx_def *alpha_emit_set_long_const ();
1041 extern struct rtx_def *alpha_emit_conditional_move ();
1043 /* Generate necessary RTL for __builtin_saveregs().
1044 ARGLIST is the argument list; see expr.c. */
1045 extern struct rtx_def *alpha_builtin_saveregs ();
1046 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) alpha_builtin_saveregs (ARGLIST)
1048 /* Define the information needed to generate branch and scc insns. This is
1049 stored from the compare operation. Note that we can't use "rtx" here
1050 since it hasn't been defined! */
1052 extern struct rtx_def *alpha_compare_op0, *alpha_compare_op1;
1053 extern int alpha_compare_fp_p;
1055 /* Make (or fake) .linkage entry for function call.
1057 IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */
1058 extern void alpha_need_linkage ();
1060 /* This macro produces the initial definition of a function name. On the
1061 Alpha, we need to save the function name for the prologue and epilogue. */
1063 extern char *alpha_function_name;
1065 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
1067 alpha_function_name = NAME; \
1070 /* This macro generates the assembly code for function entry.
1071 FILE is a stdio stream to output the code to.
1072 SIZE is an int: how many units of temporary storage to allocate.
1073 Refer to the array `regs_ever_live' to determine which registers
1074 to save; `regs_ever_live[I]' is nonzero if register number I
1075 is ever used in the function. This macro is responsible for
1076 knowing which registers should not be saved even if used. */
1078 #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
1080 /* Output assembler code to FILE to increment profiler label # LABELNO
1081 for profiling a function entry. Under OSF/1, profiling is enabled
1082 by simply passing -pg to the assembler and linker. */
1084 #define FUNCTION_PROFILER(FILE, LABELNO)
1086 /* Output assembler code to FILE to initialize this source file's
1087 basic block profiling info, if that has not already been done.
1088 This assumes that __bb_init_func doesn't garble a1-a5. */
1090 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
1092 ASM_OUTPUT_REG_PUSH (FILE, 16); \
1093 fputs ("\tlda $16,$PBX32\n", (FILE)); \
1094 fputs ("\tldq $26,0($16)\n", (FILE)); \
1095 fputs ("\tbne $26,1f\n", (FILE)); \
1096 fputs ("\tlda $27,__bb_init_func\n", (FILE)); \
1097 fputs ("\tjsr $26,($27),__bb_init_func\n", (FILE)); \
1098 fputs ("\tldgp $29,0($26)\n", (FILE)); \
1099 fputs ("1:\n", (FILE)); \
1100 ASM_OUTPUT_REG_POP (FILE, 16); \
1103 /* Output assembler code to FILE to increment the entry-count for
1104 the BLOCKNO'th basic block in this source file. */
1106 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1108 int blockn = (BLOCKNO); \
1109 fputs ("\tsubq $30,16,$30\n", (FILE)); \
1110 fputs ("\tstq $26,0($30)\n", (FILE)); \
1111 fputs ("\tstq $27,8($30)\n", (FILE)); \
1112 fputs ("\tlda $26,$PBX34\n", (FILE)); \
1113 fprintf ((FILE), "\tldq $27,%d($26)\n", 8*blockn); \
1114 fputs ("\taddq $27,1,$27\n", (FILE)); \
1115 fprintf ((FILE), "\tstq $27,%d($26)\n", 8*blockn); \
1116 fputs ("\tldq $26,0($30)\n", (FILE)); \
1117 fputs ("\tldq $27,8($30)\n", (FILE)); \
1118 fputs ("\taddq $30,16,$30\n", (FILE)); \
1122 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1123 the stack pointer does not matter. The value is tested only in
1124 functions that have frame pointers.
1125 No definition is equivalent to always zero. */
1127 #define EXIT_IGNORE_STACK 1
1129 /* This macro generates the assembly code for function exit,
1130 on machines that need it. If FUNCTION_EPILOGUE is not defined
1131 then individual return instructions are generated for each
1132 return statement. Args are same as for FUNCTION_PROLOGUE.
1134 The function epilogue should not depend on the current stack pointer!
1135 It should use the frame pointer only. This is mandatory because
1136 of alloca; we also take advantage of it to omit stack adjustments
1137 before returning. */
1139 #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
1142 /* Output assembler code for a block containing the constant parts
1143 of a trampoline, leaving space for the variable parts.
1145 The trampoline should set the static chain pointer to value placed
1146 into the trampoline and should branch to the specified routine.
1147 Note that $27 has been set to the address of the trampoline, so we can
1148 use it for addressability of the two data items. Trampolines are always
1149 aligned to FUNCTION_BOUNDARY, which is 64 bits. */
1151 #define TRAMPOLINE_TEMPLATE(FILE) \
1153 fprintf (FILE, "\tldq $1,24($27)\n"); \
1154 fprintf (FILE, "\tldq $27,16($27)\n"); \
1155 fprintf (FILE, "\tjmp $31,($27),0\n"); \
1156 fprintf (FILE, "\tnop\n"); \
1157 fprintf (FILE, "\t.quad 0,0\n"); \
1160 /* Section in which to place the trampoline. On Alpha, instructions
1161 may only be placed in a text segment. */
1163 #define TRAMPOLINE_SECTION text_section
1165 /* Length in units of the trampoline for entering a nested function. */
1167 #define TRAMPOLINE_SIZE 32
1169 /* Emit RTL insns to initialize the variable parts of a trampoline.
1170 FNADDR is an RTX for the address of the function's pure code.
1171 CXT is an RTX for the static chain value for the function. We assume
1172 here that a function will be called many more times than its address
1173 is taken (e.g., it might be passed to qsort), so we take the trouble
1174 to initialize the "hint" field in the JMP insn. Note that the hint
1175 field is PC (new) + 4 * bits 13:0. */
1177 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1179 rtx _temp, _temp1, _addr; \
1181 _addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
1182 emit_move_insn (gen_rtx (MEM, Pmode, _addr), (FNADDR)); \
1183 _addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \
1184 emit_move_insn (gen_rtx (MEM, Pmode, _addr), (CXT)); \
1186 _temp = force_operand (plus_constant ((TRAMP), 12), NULL_RTX); \
1187 _temp = expand_binop (DImode, sub_optab, (FNADDR), _temp, _temp, 1, \
1189 _temp = expand_shift (RSHIFT_EXPR, Pmode, _temp, \
1190 build_int_2 (2, 0), NULL_RTX, 1); \
1191 _temp = expand_and (gen_lowpart (SImode, _temp), \
1192 GEN_INT (0x3fff), 0); \
1194 _addr = memory_address (SImode, plus_constant ((TRAMP), 8)); \
1195 _temp1 = force_reg (SImode, gen_rtx (MEM, SImode, _addr)); \
1196 _temp1 = expand_and (_temp1, GEN_INT (0xffffc000), NULL_RTX); \
1197 _temp1 = expand_binop (SImode, ior_optab, _temp1, _temp, _temp1, 1, \
1200 emit_move_insn (gen_rtx (MEM, SImode, _addr), _temp1); \
1202 emit_library_call (gen_rtx (SYMBOL_REF, Pmode, \
1203 "__enable_execute_stack"), \
1204 0, VOIDmode, 1,_addr, Pmode); \
1206 emit_insn (gen_rtx (UNSPEC_VOLATILE, VOIDmode, \
1207 gen_rtvec (1, const0_rtx), 0)); \
1210 /* Attempt to turn on access permissions for the stack. */
1212 #define TRANSFER_FROM_TRAMPOLINE \
1215 __enable_execute_stack (addr) \
1218 long size = getpagesize (); \
1219 long mask = ~(size-1); \
1220 char *page = (char *) (((long) addr) & mask); \
1221 char *end = (char *) ((((long) (addr + TRAMPOLINE_SIZE)) & mask) + size); \
1223 /* 7 is PROT_READ | PROT_WRITE | PROT_EXEC */ \
1224 if (mprotect (page, end - page, 7) < 0) \
1225 perror ("mprotect of trampoline code"); \
1228 /* A C expression whose value is RTL representing the value of the return
1229 address for the frame COUNT steps up from the current frame.
1230 FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of
1231 the COUNT-1 frame if RETURN_ADDR_IN_PREVIOUS_FRAME} is defined.
1233 This definition for Alpha is broken, but is put in at the request of
1236 #define RETURN_ADDR_RTX(COUNT, FRAME) \
1237 ((COUNT == 0 && alpha_sa_size () == 0 && 0 /* not right. */) \
1238 ? gen_rtx (REG, Pmode, 26) \
1239 : gen_rtx (MEM, Pmode, \
1240 memory_address (Pmode, FRAME)))
1242 /* Addressing modes, and classification of registers for them. */
1244 /* #define HAVE_POST_INCREMENT */
1245 /* #define HAVE_POST_DECREMENT */
1247 /* #define HAVE_PRE_DECREMENT */
1248 /* #define HAVE_PRE_INCREMENT */
1250 /* Macros to check register numbers against specific register classes. */
1252 /* These assume that REGNO is a hard or pseudo reg number.
1253 They give nonzero only if REGNO is a hard reg of the suitable class
1254 or a pseudo reg currently allocated to a suitable hard reg.
1255 Since they use reg_renumber, they are safe only once reg_renumber
1256 has been allocated, which happens in local-alloc.c. */
1258 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
1259 #define REGNO_OK_FOR_BASE_P(REGNO) \
1260 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \
1261 || (REGNO) == 63 || reg_renumber[REGNO] == 63)
1263 /* Maximum number of registers that can appear in a valid memory address. */
1264 #define MAX_REGS_PER_ADDRESS 1
1266 /* Recognize any constant value that is a valid address. For the Alpha,
1267 there are only constants none since we want to use LDA to load any
1268 symbolic addresses into registers. */
1270 #define CONSTANT_ADDRESS_P(X) \
1271 (GET_CODE (X) == CONST_INT \
1272 && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
1274 /* Include all constant integers and constant doubles, but not
1275 floating-point, except for floating-point zero. */
1277 #define LEGITIMATE_CONSTANT_P(X) \
1278 (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1279 || (X) == CONST0_RTX (GET_MODE (X)))
1281 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1282 and check its validity for a certain class.
1283 We have two alternate definitions for each of them.
1284 The usual definition accepts all pseudo regs; the other rejects
1285 them unless they have been allocated suitable hard regs.
1286 The symbol REG_OK_STRICT causes the latter definition to be used.
1288 Most source files want to accept pseudo regs in the hope that
1289 they will get allocated to the class that the insn wants them to be in.
1290 Source files for reload pass need to be strict.
1291 After reload, it makes no difference, since pseudo regs have
1292 been eliminated by then. */
1294 #ifndef REG_OK_STRICT
1296 /* Nonzero if X is a hard reg that can be used as an index
1297 or if it is a pseudo reg. */
1298 #define REG_OK_FOR_INDEX_P(X) 0
1299 /* Nonzero if X is a hard reg that can be used as a base reg
1300 or if it is a pseudo reg. */
1301 #define REG_OK_FOR_BASE_P(X) \
1302 (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1306 /* Nonzero if X is a hard reg that can be used as an index. */
1307 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1308 /* Nonzero if X is a hard reg that can be used as a base reg. */
1309 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1313 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1314 that is a valid memory address for an instruction.
1315 The MODE argument is the machine mode for the MEM expression
1316 that wants to use this address.
1318 For Alpha, we have either a constant address or the sum of a register
1319 and a constant address, or just a register. For DImode, any of those
1320 forms can be surrounded with an AND that clear the low-order three bits;
1321 this is an "unaligned" access.
1323 First define the basic valid address. */
1325 #define GO_IF_LEGITIMATE_SIMPLE_ADDRESS(MODE, X, ADDR) \
1326 { if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1328 if (CONSTANT_ADDRESS_P (X)) \
1330 if (GET_CODE (X) == PLUS \
1331 && REG_P (XEXP (X, 0)) \
1332 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1333 && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1337 /* Now accept the simple address, or, for DImode only, an AND of a simple
1338 address that turns off the low three bits. */
1340 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1341 { GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, X, ADDR); \
1342 if ((MODE) == DImode \
1343 && GET_CODE (X) == AND \
1344 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1345 && INTVAL (XEXP (X, 1)) == -8) \
1346 GO_IF_LEGITIMATE_SIMPLE_ADDRESS (MODE, XEXP (X, 0), ADDR); \
1349 /* Try machine-dependent ways of modifying an illegitimate address
1350 to be legitimate. If we find one, return the new, valid address.
1351 This macro is used in only one place: `memory_address' in explow.c.
1353 OLDX is the address as it was before break_out_memory_refs was called.
1354 In some cases it is useful to look at this to decide what needs to be done.
1356 MODE and WIN are passed so that this macro can use
1357 GO_IF_LEGITIMATE_ADDRESS.
1359 It is always safe for this macro to do nothing. It exists to recognize
1360 opportunities to optimize the output.
1362 For the Alpha, there are three cases we handle:
1364 (1) If the address is (plus reg const_int) and the CONST_INT is not a
1365 valid offset, compute the high part of the constant and add it to the
1366 register. Then our address is (plus temp low-part-const).
1367 (2) If the address is (const (plus FOO const_int)), find the low-order
1368 part of the CONST_INT. Then load FOO plus any high-order part of the
1369 CONST_INT into a register. Our address is (plus reg low-part-const).
1370 This is done to reduce the number of GOT entries.
1371 (3) If we have a (plus reg const), emit the load as in (2), then add
1372 the two registers, and finally generate (plus reg low-part-const) as
1375 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1376 { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1377 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1378 && ! CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1380 HOST_WIDE_INT val = INTVAL (XEXP (X, 1)); \
1381 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1382 HOST_WIDE_INT highpart = val - lowpart; \
1383 rtx high = GEN_INT (highpart); \
1384 rtx temp = expand_binop (Pmode, add_optab, XEXP (x, 0), \
1385 high, NULL_RTX, 1, OPTAB_LIB_WIDEN); \
1387 (X) = plus_constant (temp, lowpart); \
1390 else if (GET_CODE (X) == CONST \
1391 && GET_CODE (XEXP (X, 0)) == PLUS \
1392 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT) \
1394 HOST_WIDE_INT val = INTVAL (XEXP (XEXP (X, 0), 1)); \
1395 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1396 HOST_WIDE_INT highpart = val - lowpart; \
1397 rtx high = XEXP (XEXP (X, 0), 0); \
1400 high = plus_constant (high, highpart); \
1402 (X) = plus_constant (force_reg (Pmode, high), lowpart); \
1405 else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
1406 && GET_CODE (XEXP (X, 1)) == CONST \
1407 && GET_CODE (XEXP (XEXP (X, 1), 0)) == PLUS \
1408 && GET_CODE (XEXP (XEXP (XEXP (X, 1), 0), 1)) == CONST_INT) \
1410 HOST_WIDE_INT val = INTVAL (XEXP (XEXP (XEXP (X, 1), 0), 1)); \
1411 HOST_WIDE_INT lowpart = (val & 0xffff) - 2 * (val & 0x8000); \
1412 HOST_WIDE_INT highpart = val - lowpart; \
1413 rtx high = XEXP (XEXP (XEXP (X, 1), 0), 0); \
1416 high = plus_constant (high, highpart); \
1418 high = expand_binop (Pmode, add_optab, XEXP (X, 0), \
1419 force_reg (Pmode, high), \
1420 high, 1, OPTAB_LIB_WIDEN); \
1421 (X) = plus_constant (high, lowpart); \
1426 /* Go to LABEL if ADDR (a legitimate address expression)
1427 has an effect that depends on the machine mode it is used for.
1428 On the Alpha this is true only for the unaligned modes. We can
1429 simplify this test since we know that the address must be valid. */
1431 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1432 { if (GET_CODE (ADDR) == AND) goto LABEL; }
1434 /* Compute the cost of an address. For the Alpha, all valid addresses are
1437 #define ADDRESS_COST(X) 0
1439 /* Define this if some processing needs to be done immediately before
1440 emitting code for an insn. */
1442 extern void final_prescan_insn ();
1443 #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) \
1444 final_prescan_insn ((INSN), (OPERANDS), (NOPERANDS))
1446 /* Define this if FINAL_PRESCAN_INSN should be called for a CODE_LABEL. */
1447 #define FINAL_PRESCAN_LABEL
1449 /* Specify the machine mode that this machine uses
1450 for the index in the tablejump instruction. */
1451 #define CASE_VECTOR_MODE SImode
1453 /* Define this if the tablejump instruction expects the table
1454 to contain offsets from the address of the table.
1455 Do not define this if the table should contain absolute addresses.
1456 On the Alpha, the table is really GP-relative, not relative to the PC
1457 of the table, but we pretend that it is PC-relative; this should be OK,
1458 but we should try to find some better way sometime. */
1459 #define CASE_VECTOR_PC_RELATIVE
1461 /* Specify the tree operation to be used to convert reals to integers. */
1462 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1464 /* This is the kind of divide that is easiest to do in the general case. */
1465 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1467 /* Define this as 1 if `char' should by default be signed; else as 0. */
1468 #define DEFAULT_SIGNED_CHAR 1
1470 /* This flag, if defined, says the same insns that convert to a signed fixnum
1471 also convert validly to an unsigned one.
1473 We actually lie a bit here as overflow conditions are different. But
1474 they aren't being checked anyway. */
1476 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1478 /* Max number of bytes we can move to or from memory
1479 in one reasonably fast instruction. */
1483 /* Largest number of bytes of an object that can be placed in a register.
1484 On the Alpha we have plenty of registers, so use TImode. */
1485 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1487 /* Nonzero if access to memory by bytes is no faster than for words.
1488 Also non-zero if doing byte operations (specifically shifts) in registers
1491 On the Alpha, we want to not use the byte operation and instead use
1492 masking operations to access fields; these will save instructions. */
1494 #define SLOW_BYTE_ACCESS 1
1496 /* Define if operations between registers always perform the operation
1497 on the full register even if a narrower mode is specified. */
1498 #define WORD_REGISTER_OPERATIONS
1500 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1501 will either zero-extend or sign-extend. The value of this macro should
1502 be the code that says which one of the two operations is implicitly
1503 done, NIL if none. */
1504 #define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND)
1506 /* Define if loading short immediate values into registers sign extends. */
1507 #define SHORT_IMMEDIATES_SIGN_EXTEND
1509 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1510 is done just by pretending it is already truncated. */
1511 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1513 /* We assume that the store-condition-codes instructions store 0 for false
1514 and some other value for true. This is the value stored for true. */
1516 #define STORE_FLAG_VALUE 1
1518 /* Define the value returned by a floating-point comparison instruction. */
1520 #define FLOAT_STORE_FLAG_VALUE 0.5
1522 /* Canonicalize a comparison from one we don't have to one we do have. */
1524 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
1526 if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \
1527 && (GET_CODE (OP1) == REG || (OP1) == const0_rtx)) \
1532 (CODE) = swap_condition (CODE); \
1534 if (((CODE) == LT || (CODE) == LTU) \
1535 && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256) \
1537 (CODE) = (CODE) == LT ? LE : LEU; \
1538 (OP1) = GEN_INT (255); \
1542 /* Specify the machine mode that pointers have.
1543 After generation of rtl, the compiler makes no further distinction
1544 between pointers and any other objects of this machine mode. */
1545 #define Pmode DImode
1547 /* Mode of a function address in a call instruction (for indexing purposes). */
1549 #define FUNCTION_MODE Pmode
1551 /* Define this if addresses of constant functions
1552 shouldn't be put through pseudo regs where they can be cse'd.
1553 Desirable on machines where ordinary constants are expensive
1554 but a CALL with constant address is cheap.
1556 We define this on the Alpha so that gen_call and gen_call_value
1557 get to see the SYMBOL_REF (for the hint field of the jsr). It will
1558 then copy it into a register, thus actually letting the address be
1561 #define NO_FUNCTION_CSE
1563 /* Define this to be nonzero if shift instructions ignore all but the low-order
1565 #define SHIFT_COUNT_TRUNCATED 1
1567 /* Use atexit for static constructors/destructors, instead of defining
1568 our own exit function. */
1571 /* Compute the cost of computing a constant rtl expression RTX
1572 whose rtx-code is CODE. The body of this macro is a portion
1573 of a switch statement. If the code is computed here,
1574 return it with a return statement. Otherwise, break from the switch.
1576 If this is an 8-bit constant, return zero since it can be used
1577 nearly anywhere with no cost. If it is a valid operand for an
1578 ADD or AND, likewise return 0 if we know it will be used in that
1579 context. Otherwise, return 2 since it might be used there later.
1580 All other constants take at least two insns. */
1582 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1584 if (INTVAL (RTX) >= 0 && INTVAL (RTX) < 256) \
1586 case CONST_DOUBLE: \
1587 if (((OUTER_CODE) == PLUS && add_operand (RTX, VOIDmode)) \
1588 || ((OUTER_CODE) == AND && and_operand (RTX, VOIDmode))) \
1590 else if (add_operand (RTX, VOIDmode) || and_operand (RTX, VOIDmode)) \
1593 return COSTS_N_INSNS (2); \
1597 switch (alpha_cpu) \
1599 case PROCESSOR_EV4: \
1600 return COSTS_N_INSNS (3); \
1601 case PROCESSOR_EV5: \
1602 return COSTS_N_INSNS (2); \
1605 /* Provide the costs of a rtl expression. This is in the body of a
1608 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1609 case PLUS: case MINUS: \
1610 if (FLOAT_MODE_P (GET_MODE (X))) \
1611 switch (alpha_cpu) \
1613 case PROCESSOR_EV4: \
1614 return COSTS_N_INSNS (6); \
1615 case PROCESSOR_EV5: \
1616 return COSTS_N_INSNS (4); \
1618 else if (GET_CODE (XEXP (X, 0)) == MULT \
1619 && const48_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
1620 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1621 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1624 switch (alpha_cpu) \
1626 case PROCESSOR_EV4: \
1627 if (FLOAT_MODE_P (GET_MODE (X))) \
1628 return COSTS_N_INSNS (6); \
1629 return COSTS_N_INSNS (23); \
1630 case PROCESSOR_EV5: \
1631 if (FLOAT_MODE_P (GET_MODE (X))) \
1632 return COSTS_N_INSNS (4); \
1633 else if (GET_MODE (X) == DImode) \
1634 return COSTS_N_INSNS (12); \
1636 return COSTS_N_INSNS (8); \
1639 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1640 && INTVAL (XEXP (X, 1)) <= 3) \
1642 /* ... fall through ... */ \
1643 case ASHIFTRT: case LSHIFTRT: case IF_THEN_ELSE: \
1644 switch (alpha_cpu) \
1646 case PROCESSOR_EV4: \
1647 return COSTS_N_INSNS (2); \
1648 case PROCESSOR_EV5: \
1649 return COSTS_N_INSNS (1); \
1651 case DIV: case UDIV: case MOD: case UMOD: \
1652 switch (alpha_cpu) \
1654 case PROCESSOR_EV4: \
1655 if (GET_MODE (X) == SFmode) \
1656 return COSTS_N_INSNS (34); \
1657 else if (GET_MODE (X) == DFmode) \
1658 return COSTS_N_INSNS (63); \
1660 return COSTS_N_INSNS (70); \
1661 case PROCESSOR_EV5: \
1662 if (GET_MODE (X) == SFmode) \
1663 return COSTS_N_INSNS (15); \
1664 else if (GET_MODE (X) == DFmode) \
1665 return COSTS_N_INSNS (22); \
1667 return COSTS_N_INSNS (70); /* EV5 ??? */ \
1670 switch (alpha_cpu) \
1672 case PROCESSOR_EV4: \
1673 return COSTS_N_INSNS (3); \
1674 case PROCESSOR_EV5: \
1675 return COSTS_N_INSNS (2); \
1677 case NEG: case ABS: \
1678 if (! FLOAT_MODE_P (GET_MODE (X))) \
1680 /* ... fall through ... */ \
1681 case FLOAT: case UNSIGNED_FLOAT: case FIX: case UNSIGNED_FIX: \
1682 case FLOAT_EXTEND: case FLOAT_TRUNCATE: \
1683 switch (alpha_cpu) \
1685 case PROCESSOR_EV4: \
1686 return COSTS_N_INSNS (6); \
1687 case PROCESSOR_EV5: \
1688 return COSTS_N_INSNS (4); \
1691 /* Control the assembler format that we output. */
1693 /* Output at beginning of assembler file. */
1695 #define ASM_FILE_START(FILE) \
1697 alpha_write_verstamp (FILE); \
1698 fprintf (FILE, "\t.set noreorder\n"); \
1699 fprintf (FILE, "\t.set volatile\n"); \
1700 fprintf (FILE, "\t.set noat\n"); \
1701 ASM_OUTPUT_SOURCE_FILENAME (FILE, main_input_filename); \
1704 /* Output to assembler file text saying following lines
1705 may contain character constants, extra white space, comments, etc. */
1707 #define ASM_APP_ON ""
1709 /* Output to assembler file text saying following lines
1710 no longer contain unusual constructs. */
1712 #define ASM_APP_OFF ""
1714 #define TEXT_SECTION_ASM_OP ".text"
1716 /* Output before read-only data. */
1718 #define READONLY_DATA_SECTION_ASM_OP ".rdata"
1720 /* Output before writable data. */
1722 #define DATA_SECTION_ASM_OP ".data"
1724 /* Define an extra section for read-only data, a routine to enter it, and
1725 indicate that it is for read-only data.
1727 The first time we enter the readonly data section for a file, we write
1728 eight bytes of zero. This works around a bug in DEC's assembler in
1729 some versions of OSF/1 V3.x. */
1731 #define EXTRA_SECTIONS readonly_data
1733 #define EXTRA_SECTION_FUNCTIONS \
1735 literal_section () \
1737 if (in_section != readonly_data) \
1739 static int firsttime = 1; \
1741 fprintf (asm_out_file, "%s\n", READONLY_DATA_SECTION_ASM_OP); \
1745 ASM_OUTPUT_DOUBLE_INT (asm_out_file, const0_rtx); \
1748 in_section = readonly_data; \
1752 #define READONLY_DATA_SECTION literal_section
1754 /* If we are referencing a function that is static, make the SYMBOL_REF
1755 special. We use this to see indicate we can branch to this function
1756 without setting PV or restoring GP. */
1758 #define ENCODE_SECTION_INFO(DECL) \
1759 if (TREE_CODE (DECL) == FUNCTION_DECL && ! TREE_PUBLIC (DECL)) \
1760 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1;
1762 /* How to refer to registers in assembler output.
1763 This sequence is indexed by compiler's hard-register-number (see above). */
1765 #define REGISTER_NAMES \
1766 {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
1767 "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
1768 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \
1769 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \
1770 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
1771 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
1772 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
1773 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"}
1775 /* How to renumber registers for dbx and gdb. */
1777 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1779 /* This is how to output the definition of a user-level label named NAME,
1780 such as the label on a static function or variable NAME. */
1782 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1783 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1785 /* This is how to output a command to make the user-level label named NAME
1786 defined for reference from other files. */
1788 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1789 do { fputs ("\t.globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
1791 /* The prefix to add to user-visible assembler symbols. */
1793 #define USER_LABEL_PREFIX ""
1795 /* This is how to output an internal numbered label where
1796 PREFIX is the class of label and NUM is the number within the class. */
1798 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1799 if ((PREFIX)[0] == 'L') \
1800 fprintf (FILE, "$%s%d:\n", & (PREFIX)[1], NUM + 32); \
1802 fprintf (FILE, "%s%d:\n", PREFIX, NUM);
1804 /* This is how to output a label for a jump table. Arguments are the same as
1805 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1808 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1809 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1811 /* This is how to store into the string LABEL
1812 the symbol_ref name of an internal numbered label where
1813 PREFIX is the class of label and NUM is the number within the class.
1814 This is suitable for output with `assemble_name'. */
1816 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1817 if ((PREFIX)[0] == 'L') \
1818 sprintf (LABEL, "*$%s%d", & (PREFIX)[1], NUM + 32); \
1820 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1822 /* Check a floating-point value for validity for a particular machine mode. */
1824 #define CHECK_FLOAT_VALUE(MODE, D, OVERFLOW) \
1825 ((OVERFLOW) = check_float_value (MODE, &D, OVERFLOW))
1827 /* This is how to output an assembler line defining a `double' constant. */
1829 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1831 if (REAL_VALUE_ISINF (VALUE) \
1832 || REAL_VALUE_ISNAN (VALUE) \
1833 || REAL_VALUE_MINUS_ZERO (VALUE)) \
1836 REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \
1837 fprintf (FILE, "\t.quad 0x%lx%08lx\n", \
1838 t[1] & 0xffffffff, t[0] & 0xffffffff); \
1843 REAL_VALUE_TO_DECIMAL (VALUE, "%.20e", str); \
1844 fprintf (FILE, "\t.%c_floating %s\n", (TARGET_FLOAT_VAX)?'g':'t', str); \
1848 /* This is how to output an assembler line defining a `float' constant. */
1850 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1853 REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \
1854 fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \
1857 /* This is how to output an assembler line defining an `int' constant. */
1859 #define ASM_OUTPUT_INT(FILE,VALUE) \
1860 ( fprintf (FILE, "\t.long "), \
1861 output_addr_const (FILE, (VALUE)), \
1862 fprintf (FILE, "\n"))
1864 /* This is how to output an assembler line defining a `long' constant. */
1866 #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \
1867 ( fprintf (FILE, "\t.quad "), \
1868 output_addr_const (FILE, (VALUE)), \
1869 fprintf (FILE, "\n"))
1871 /* Likewise for `char' and `short' constants. */
1873 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1874 fprintf (FILE, "\t.word %d\n", \
1875 (GET_CODE (VALUE) == CONST_INT \
1876 ? INTVAL (VALUE) & 0xffff : (abort (), 0)))
1878 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1879 fprintf (FILE, "\t.byte %d\n", \
1880 (GET_CODE (VALUE) == CONST_INT \
1881 ? INTVAL (VALUE) & 0xff : (abort (), 0)))
1883 /* We use the default ASCII-output routine, except that we don't write more
1884 than 50 characters since the assembler doesn't support very long lines. */
1886 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1888 FILE *_hide_asm_out_file = (MYFILE); \
1889 unsigned char *_hide_p = (unsigned char *) (MYSTRING); \
1890 int _hide_thissize = (MYLENGTH); \
1891 int _size_so_far = 0; \
1893 FILE *asm_out_file = _hide_asm_out_file; \
1894 unsigned char *p = _hide_p; \
1895 int thissize = _hide_thissize; \
1897 fprintf (asm_out_file, "\t.ascii \""); \
1899 for (i = 0; i < thissize; i++) \
1901 register int c = p[i]; \
1903 if (_size_so_far ++ > 50 && i < thissize - 4) \
1904 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1906 if (c == '\"' || c == '\\') \
1907 putc ('\\', asm_out_file); \
1908 if (c >= ' ' && c < 0177) \
1909 putc (c, asm_out_file); \
1912 fprintf (asm_out_file, "\\%o", c); \
1913 /* After an octal-escape, if a digit follows, \
1914 terminate one string constant and start another. \
1915 The Vax assembler fails to stop reading the escape \
1916 after three digits, so this is the only way we \
1917 can get it to parse the data properly. */ \
1918 if (i < thissize - 1 \
1919 && p[i + 1] >= '0' && p[i + 1] <= '9') \
1920 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1923 fprintf (asm_out_file, "\"\n"); \
1928 /* This is how to output an insn to push a register on the stack.
1929 It need not be very fast code. */
1931 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1932 fprintf (FILE, "\tsubq $30,8,$30\n\tst%s $%s%d,0($30)\n", \
1933 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1936 /* This is how to output an insn to pop a register from the stack.
1937 It need not be very fast code. */
1939 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1940 fprintf (FILE, "\tld%s $%s%d,0($30)\n\taddq $30,8,$30\n", \
1941 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1944 /* This is how to output an assembler line for a numeric constant byte. */
1946 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1947 fprintf (FILE, "\t.byte 0x%x\n", (VALUE) & 0xff)
1949 /* This is how to output an element of a case-vector that is absolute.
1950 (Alpha does not use such vectors, but we must define this macro anyway.) */
1952 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) abort ()
1954 /* This is how to output an element of a case-vector that is relative. */
1956 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1957 fprintf (FILE, "\t.%s $%d\n", TARGET_WINDOWS_NT ? "long" : "gprel32", \
1960 /* This is how to output an assembler line
1961 that says to advance the location counter
1962 to a multiple of 2**LOG bytes. */
1964 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1966 fprintf (FILE, "\t.align %d\n", LOG);
1968 /* This is how to advance the location counter by SIZE bytes. */
1970 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1971 fprintf (FILE, "\t.space %d\n", (SIZE))
1973 /* This says how to output an assembler line
1974 to define a global common symbol. */
1976 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1977 ( fputs ("\t.comm ", (FILE)), \
1978 assemble_name ((FILE), (NAME)), \
1979 fprintf ((FILE), ",%d\n", (SIZE)))
1981 /* This says how to output an assembler line
1982 to define a local common symbol. */
1984 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1985 ( fputs ("\t.lcomm ", (FILE)), \
1986 assemble_name ((FILE), (NAME)), \
1987 fprintf ((FILE), ",%d\n", (SIZE)))
1989 /* Store in OUTPUT a string (made with alloca) containing
1990 an assembler-name for a local static variable named NAME.
1991 LABELNO is an integer which is different for each call. */
1993 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1994 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1995 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1997 /* Define the parentheses used to group arithmetic operations
1998 in assembler code. */
2000 #define ASM_OPEN_PAREN "("
2001 #define ASM_CLOSE_PAREN ")"
2003 /* Define results of standard character escape sequences. */
2004 #define TARGET_BELL 007
2005 #define TARGET_BS 010
2006 #define TARGET_TAB 011
2007 #define TARGET_NEWLINE 012
2008 #define TARGET_VT 013
2009 #define TARGET_FF 014
2010 #define TARGET_CR 015
2012 /* Print operand X (an rtx) in assembler syntax to file FILE.
2013 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2014 For `%' followed by punctuation, CODE is the punctuation and X is null. */
2016 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2018 /* Determine which codes are valid without a following integer. These must
2019 not be alphabetic (the characters are chosen so that
2020 PRINT_OPERAND_PUNCT_VALID_P translates into a simple range change when
2023 & Generates fp-rounding mode suffix: nothing for normal, 'c' for
2024 chopped, 'm' for minus-infinity, and 'd' for dynamic rounding
2025 mode. alpha_fprm controls which suffix is generated.
2027 ' Generates trap-mode suffix for instructions that accept the
2028 su suffix only (cmpt et al).
2030 ) Generates trap-mode suffix for instructions that accept the
2031 u, su, and sui suffix. This is the bulk of the IEEE floating
2032 point instructions (addt et al).
2034 + Generates trap-mode suffix for instructions that accept the
2035 sui suffix (cvtqt and cvtqs).
2037 , Generates single precision suffix for floating point
2038 instructions (s for IEEE, f for VAX)
2040 - Generates double precision suffix for floating point
2041 instructions (t for IEEE, g for VAX)
2044 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2045 ((CODE) == '&' || (CODE) == '\'' || (CODE) == ')' || (CODE) == '+' \
2046 || (CODE) == ',' || (CODE) == '-')
2048 /* Print a memory address as an operand to reference that memory location. */
2050 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2051 { rtx addr = (ADDR); \
2053 HOST_WIDE_INT offset = 0; \
2055 if (GET_CODE (addr) == AND) \
2056 addr = XEXP (addr, 0); \
2058 if (GET_CODE (addr) == REG) \
2059 basereg = REGNO (addr); \
2060 else if (GET_CODE (addr) == CONST_INT) \
2061 offset = INTVAL (addr); \
2062 else if (GET_CODE (addr) == PLUS \
2063 && GET_CODE (XEXP (addr, 0)) == REG \
2064 && GET_CODE (XEXP (addr, 1)) == CONST_INT) \
2065 basereg = REGNO (XEXP (addr, 0)), offset = INTVAL (XEXP (addr, 1)); \
2069 fprintf (FILE, "%d($%d)", offset, basereg); \
2071 /* Define the codes that are matched by predicates in alpha.c. */
2073 #define PREDICATE_CODES \
2074 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
2075 {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \
2076 {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \
2077 {"cint8_operand", {CONST_INT}}, \
2078 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
2079 {"add_operand", {SUBREG, REG, CONST_INT}}, \
2080 {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \
2081 {"const48_operand", {CONST_INT}}, \
2082 {"and_operand", {SUBREG, REG, CONST_INT}}, \
2083 {"or_operand", {SUBREG, REG, CONST_INT}}, \
2084 {"mode_mask_operand", {CONST_INT}}, \
2085 {"mul8_operand", {CONST_INT}}, \
2086 {"mode_width_operand", {CONST_INT}}, \
2087 {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \
2088 {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \
2089 {"alpha_swapped_comparison_operator", {EQ, GE, GT, GEU, GTU}}, \
2090 {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \
2091 {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \
2092 {"fp0_operand", {CONST_DOUBLE}}, \
2093 {"current_file_function_operand", {SYMBOL_REF}}, \
2094 {"call_operand", {REG, SYMBOL_REF}}, \
2095 {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
2096 SYMBOL_REF, CONST, LABEL_REF}}, \
2097 {"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
2098 SYMBOL_REF, CONST, LABEL_REF}}, \
2099 {"aligned_memory_operand", {MEM}}, \
2100 {"unaligned_memory_operand", {MEM}}, \
2101 {"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}}, \
2102 {"any_memory_operand", {MEM}},
2104 /* Tell collect that the object format is ECOFF. */
2105 #define OBJECT_FORMAT_COFF
2106 #define EXTENDED_COFF
2108 /* If we use NM, pass -g to it so it only lists globals. */
2109 #define NM_FLAGS "-pg"
2111 /* Definitions for debugging. */
2113 #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */
2114 #define DBX_DEBUGGING_INFO /* generate embedded stabs */
2115 #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */
2117 #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
2118 #define PREFERRED_DEBUGGING_TYPE \
2119 ((len > 1 && !strncmp (str, "ggdb", len)) ? DBX_DEBUG : SDB_DEBUG)
2123 /* Correct the offset of automatic variables and arguments. Note that
2124 the Alpha debug format wants all automatic variables and arguments
2125 to be in terms of two different offsets from the virtual frame pointer,
2126 which is the stack pointer before any adjustment in the function.
2127 The offset for the argument pointer is fixed for the native compiler,
2128 it is either zero (for the no arguments case) or large enough to hold
2129 all argument registers.
2130 The offset for the auto pointer is the fourth argument to the .frame
2131 directive (local_offset).
2132 To stay compatible with the native tools we use the same offsets
2133 from the virtual frame pointer and adjust the debugger arg/auto offsets
2134 accordingly. These debugger offsets are set up in output_prolog. */
2136 extern long alpha_arg_offset;
2137 extern long alpha_auto_offset;
2138 #define DEBUGGER_AUTO_OFFSET(X) \
2139 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)
2140 #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset)
2143 #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \
2144 alpha_output_lineno (STREAM, LINE)
2145 extern void alpha_output_lineno ();
2147 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
2148 alpha_output_filename (STREAM, NAME)
2149 extern void alpha_output_filename ();
2152 /* mips-tfile.c limits us to strings of one page. */
2153 #define DBX_CONTIN_LENGTH 4000
2155 /* By default, turn on GDB extensions. */
2156 #define DEFAULT_GDB_EXTENSIONS 1
2158 /* Stabs-in-ECOFF can't handle dbxout_function_end(). */
2159 #define NO_DBX_FUNCTION_END 1
2161 /* If we are smuggling stabs through the ALPHA ECOFF object
2162 format, put a comment in front of the .stab<x> operation so
2163 that the ALPHA assembler does not choke. The mips-tfile program
2164 will correctly put the stab into the object file. */
2166 #define ASM_STABS_OP ((TARGET_GAS) ? ".stabs" : " #.stabs")
2167 #define ASM_STABN_OP ((TARGET_GAS) ? ".stabn" : " #.stabn")
2168 #define ASM_STABD_OP ((TARGET_GAS) ? ".stabd" : " #.stabd")
2170 /* Forward references to tags are allowed. */
2171 #define SDB_ALLOW_FORWARD_REFERENCES
2173 /* Unknown tags are also allowed. */
2174 #define SDB_ALLOW_UNKNOWN_REFERENCES
2176 #define PUT_SDB_DEF(a) \
2178 fprintf (asm_out_file, "\t%s.def\t", \
2179 (TARGET_GAS) ? "" : "#"); \
2180 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2181 fputc (';', asm_out_file); \
2184 #define PUT_SDB_PLAIN_DEF(a) \
2186 fprintf (asm_out_file, "\t%s.def\t.%s;", \
2187 (TARGET_GAS) ? "" : "#", (a)); \
2190 #define PUT_SDB_TYPE(a) \
2192 fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \
2195 /* For block start and end, we create labels, so that
2196 later we can figure out where the correct offset is.
2197 The normal .ent/.end serve well enough for functions,
2198 so those are just commented out. */
2200 extern int sdb_label_count; /* block start/end next label # */
2202 #define PUT_SDB_BLOCK_START(LINE) \
2204 fprintf (asm_out_file, \
2205 "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \
2207 (TARGET_GAS) ? "" : "#", \
2210 sdb_label_count++; \
2213 #define PUT_SDB_BLOCK_END(LINE) \
2215 fprintf (asm_out_file, \
2216 "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \
2218 (TARGET_GAS) ? "" : "#", \
2221 sdb_label_count++; \
2224 #define PUT_SDB_FUNCTION_START(LINE)
2226 #define PUT_SDB_FUNCTION_END(LINE)
2228 #define PUT_SDB_EPILOGUE_END(NAME)
2230 /* No point in running CPP on our assembler output. */
2231 #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_GAS) != 0
2232 /* Don't pass -g to GNU as, because some versions don't accept this option. */
2233 #define ASM_SPEC "%{malpha-as:-g} -nocpp %{pg}"
2235 /* In OSF/1 v3.2c, the assembler by default does not output file names which
2236 causes mips-tfile to fail. Passing -g to the assembler fixes this problem.
2237 ??? Stricly speaking, we only need -g if the user specifies -g. Passing
2238 it always means that we get slightly larger than necessary object files
2239 if the user does not specify -g. If we don't pass -g, then mips-tfile
2240 will need to be fixed to work in this case. */
2241 #define ASM_SPEC "%{!mgas:-g} -nocpp %{pg}"
2244 /* Specify to run a post-processor, mips-tfile after the assembler
2245 has run to stuff the ecoff debug information into the object file.
2246 This is needed because the Alpha assembler provides no way
2247 of specifying such information in the assembly file. */
2249 #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_GAS) != 0
2251 #define ASM_FINAL_SPEC "\
2252 %{malpha-as: %{!mno-mips-tfile: \
2253 \n mips-tfile %{v*: -v} \
2255 %{!K: %{save-temps: -I %b.o~}} \
2256 %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
2257 %{.s:%i} %{!.s:%g.s}}}"
2260 #define ASM_FINAL_SPEC "\
2261 %{!mgas: %{!mno-mips-tfile: \
2262 \n mips-tfile %{v*: -v} \
2264 %{!K: %{save-temps: -I %b.o~}} \
2265 %{c:%W{o*}%{!o*:-o %b.o}}%{!c:-o %U.o} \
2266 %{.s:%i} %{!.s:%g.s}}}"
2270 /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
2271 mips-tdump.c to print them out.
2273 These must match the corresponding definitions in gdb/mipsread.c.
2274 Unfortunately, gcc and gdb do not currently share any directories. */
2276 #define CODE_MASK 0x8F300
2277 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
2278 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
2279 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
2281 /* Override some mips-tfile definitions. */
2283 #define SHASH_SIZE 511
2284 #define THASH_SIZE 55
2286 /* Align ecoff symbol tables to avoid OSF1/1.3 nm complaints. */
2288 #define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7)
2290 /* The system headers under OSF/1 are C++-aware. */
2291 #define NO_IMPLICIT_EXTERN_C
2293 /* The linker will stick __main into the .init section. */
2294 #define HAS_INIT_SECTION
2295 #define LD_INIT_SWITCH "-init"
2296 #define LD_FINI_SWITCH "-fini"
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