1 /* Subroutines used for code generation on the DEC Alpha.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
41 /* Specify which cpu to schedule for. */
42 enum processor_type alpha_cpu;
44 /* Specify how accurate floating-point traps need to be. */
46 enum alpha_trap_precision alpha_tp;
48 /* Specify the floating-point rounding mode. */
50 enum alpha_fp_rounding_mode alpha_fprm;
52 /* Specify which things cause traps. */
54 enum alpha_fp_trap_mode alpha_fptm;
56 /* Strings decoded into the above options. */
57 char *alpha_cpu_string; /* -mcpu=ev[4|5] */
58 char *alpha_tp_string; /* -mtrap-precision=[p|s|i] */
59 char *alpha_fprm_string; /* -mfp-rounding-mode=[n|m|c|d] */
60 char *alpha_fptm_string; /* -mfp-trap-mode=[n|u|su|sui] */
62 /* Save information from a "cmpxx" operation until the branch or scc is
65 rtx alpha_compare_op0, alpha_compare_op1;
66 int alpha_compare_fp_p;
68 /* Save the name of the current function as used by the assembler. This
69 is used by the epilogue. */
71 char *alpha_function_name;
73 /* Non-zero if inside of a function, because the Alpha asm can't
74 handle .files inside of functions. */
76 static int inside_function = FALSE;
78 /* Non-zero if an instruction that may cause a trap is pending. */
80 static int trap_pending = 0;
82 /* Nonzero if the current function needs gp. */
84 int alpha_function_needs_gp;
86 extern char *version_string;
87 extern int rtx_equal_function_value_matters;
89 /* Declarations of static functions. */
90 static void alpha_set_memflags_1 PROTO((rtx, int, int, int));
91 static rtx alpha_emit_set_const_1 PROTO((rtx, enum machine_mode,
93 static void add_long_const PROTO((FILE *, HOST_WIDE_INT, int, int, int));
95 /* Compute the size of the save area in the stack. */
96 static void alpha_sa_mask PROTO((unsigned long *imaskP,
97 unsigned long *fmaskP));
98 /* Strip type information. */
99 #define CURRENT_FUNCTION_ARGS_INFO \
100 (TARGET_OPEN_VMS ? current_function_args_info & 0xff \
101 : current_function_args_info)
103 /* Parse target option strings. */
108 alpha_cpu = PROCESSOR_EV4;
110 if (alpha_cpu_string)
112 if (! strcmp (alpha_cpu_string, "ev4")
113 || ! strcmp (alpha_cpu_string, "21064"))
114 alpha_cpu = PROCESSOR_EV4;
115 else if (! strcmp (alpha_cpu_string, "ev5")
116 || ! strcmp (alpha_cpu_string, "21164"))
117 alpha_cpu = PROCESSOR_EV5;
119 error ("bad value `%s' for -mcpu switch", alpha_cpu_string);
122 alpha_tp = ALPHA_TP_PROG;
123 alpha_fprm = ALPHA_FPRM_NORM;
124 alpha_fptm = ALPHA_FPTM_N;
128 alpha_tp = ALPHA_TP_INSN;
129 alpha_fptm = ALPHA_FPTM_SU;
132 if (TARGET_IEEE_WITH_INEXACT)
134 alpha_tp = ALPHA_TP_INSN;
135 alpha_fptm = ALPHA_FPTM_SUI;
140 if (! strcmp (alpha_tp_string, "p"))
141 alpha_tp = ALPHA_TP_PROG;
142 else if (! strcmp (alpha_tp_string, "f"))
143 alpha_tp = ALPHA_TP_FUNC;
144 else if (! strcmp (alpha_tp_string, "i"))
145 alpha_tp = ALPHA_TP_INSN;
147 error ("bad value `%s' for -mtrap-precision switch", alpha_tp_string);
150 if (alpha_fprm_string)
152 if (! strcmp (alpha_fprm_string, "n"))
153 alpha_fprm = ALPHA_FPRM_NORM;
154 else if (! strcmp (alpha_fprm_string, "m"))
155 alpha_fprm = ALPHA_FPRM_MINF;
156 else if (! strcmp (alpha_fprm_string, "c"))
157 alpha_fprm = ALPHA_FPRM_CHOP;
158 else if (! strcmp (alpha_fprm_string,"d"))
159 alpha_fprm = ALPHA_FPRM_DYN;
161 error ("bad value `%s' for -mfp-rounding-mode switch",
165 if (alpha_fptm_string)
167 if (strcmp (alpha_fptm_string, "n") == 0)
168 alpha_fptm = ALPHA_FPTM_N;
169 else if (strcmp (alpha_fptm_string, "u") == 0)
170 alpha_fptm = ALPHA_FPTM_U;
171 else if (strcmp (alpha_fptm_string, "su") == 0)
172 alpha_fptm = ALPHA_FPTM_SU;
173 else if (strcmp (alpha_fptm_string, "sui") == 0)
174 alpha_fptm = ALPHA_FPTM_SUI;
176 error ("bad value `%s' for -mfp-trap-mode switch", alpha_fptm_string);
179 /* Do some sanity checks on the above option. */
181 if ((alpha_fptm == ALPHA_FPTM_SU || alpha_fptm == ALPHA_FPTM_SUI)
182 && alpha_tp != ALPHA_TP_INSN)
184 warning ("fp software completion requires -mtrap-precision=i");
185 alpha_tp = ALPHA_TP_INSN;
188 if (TARGET_FLOAT_VAX)
190 if (alpha_fprm == ALPHA_FPRM_MINF || alpha_fprm == ALPHA_FPRM_DYN)
192 warning ("rounding mode not supported for VAX floats");
193 alpha_fprm = ALPHA_FPRM_NORM;
195 if (alpha_fptm == ALPHA_FPTM_SUI)
197 warning ("trap mode not supported for VAX floats");
198 alpha_fptm = ALPHA_FPTM_SU;
203 /* Returns 1 if VALUE is a mask that contains full bytes of zero or ones. */
211 for (i = 0; i < HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR;
213 if ((value & 0xff) != 0 && (value & 0xff) != 0xff)
219 /* Returns 1 if OP is either the constant zero or a register. If a
220 register, it must be in the proper mode unless MODE is VOIDmode. */
223 reg_or_0_operand (op, mode)
225 enum machine_mode mode;
227 return op == const0_rtx || register_operand (op, mode);
230 /* Return 1 if OP is a constant in the range of 0-63 (for a shift) or
234 reg_or_6bit_operand (op, mode)
236 enum machine_mode mode;
238 return ((GET_CODE (op) == CONST_INT
239 && (unsigned HOST_WIDE_INT) INTVAL (op) < 64)
240 || register_operand (op, mode));
244 /* Return 1 if OP is an 8-bit constant or any register. */
247 reg_or_8bit_operand (op, mode)
249 enum machine_mode mode;
251 return ((GET_CODE (op) == CONST_INT
252 && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100)
253 || register_operand (op, mode));
256 /* Return 1 if OP is an 8-bit constant. */
259 cint8_operand (op, mode)
261 enum machine_mode mode;
263 return (GET_CODE (op) == CONST_INT
264 && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100);
267 /* Return 1 if the operand is a valid second operand to an add insn. */
270 add_operand (op, mode)
272 enum machine_mode mode;
274 if (GET_CODE (op) == CONST_INT)
275 return (CONST_OK_FOR_LETTER_P (INTVAL (op), 'K')
276 || CONST_OK_FOR_LETTER_P (INTVAL (op), 'L')
277 || CONST_OK_FOR_LETTER_P (INTVAL (op), 'O'));
279 return register_operand (op, mode);
282 /* Return 1 if the operand is a valid second operand to a sign-extending
286 sext_add_operand (op, mode)
288 enum machine_mode mode;
290 if (GET_CODE (op) == CONST_INT)
291 return ((unsigned HOST_WIDE_INT) INTVAL (op) < 255
292 || (unsigned HOST_WIDE_INT) (- INTVAL (op)) < 255);
294 return register_operand (op, mode);
297 /* Return 1 if OP is the constant 4 or 8. */
300 const48_operand (op, mode)
302 enum machine_mode mode;
304 return (GET_CODE (op) == CONST_INT
305 && (INTVAL (op) == 4 || INTVAL (op) == 8));
308 /* Return 1 if OP is a valid first operand to an AND insn. */
311 and_operand (op, mode)
313 enum machine_mode mode;
315 if (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == VOIDmode)
316 return (zap_mask (CONST_DOUBLE_LOW (op))
317 && zap_mask (CONST_DOUBLE_HIGH (op)));
319 if (GET_CODE (op) == CONST_INT)
320 return ((unsigned HOST_WIDE_INT) INTVAL (op) < 0x100
321 || (unsigned HOST_WIDE_INT) ~ INTVAL (op) < 0x100
322 || zap_mask (INTVAL (op)));
324 return register_operand (op, mode);
327 /* Return 1 if OP is a valid first operand to an IOR or XOR insn. */
330 or_operand (op, mode)
332 enum machine_mode mode;
334 if (GET_CODE (op) == CONST_INT)
335 return ((unsigned HOST_WIDE_INT) INTVAL (op) < 0x100
336 || (unsigned HOST_WIDE_INT) ~ INTVAL (op) < 0x100);
338 return register_operand (op, mode);
341 /* Return 1 if OP is a constant that is the width, in bits, of an integral
342 mode smaller than DImode. */
345 mode_width_operand (op, mode)
347 enum machine_mode mode;
349 return (GET_CODE (op) == CONST_INT
350 && (INTVAL (op) == 8 || INTVAL (op) == 16 || INTVAL (op) == 32));
353 /* Return 1 if OP is a constant that is the width of an integral machine mode
354 smaller than an integer. */
357 mode_mask_operand (op, mode)
359 enum machine_mode mode;
361 #if HOST_BITS_PER_WIDE_INT == 32
362 if (GET_CODE (op) == CONST_DOUBLE)
363 return CONST_DOUBLE_HIGH (op) == 0 && CONST_DOUBLE_LOW (op) == -1;
366 return (GET_CODE (op) == CONST_INT
367 && (INTVAL (op) == 0xff
368 || INTVAL (op) == 0xffff
369 #if HOST_BITS_PER_WIDE_INT == 64
370 || INTVAL (op) == 0xffffffff
375 /* Return 1 if OP is a multiple of 8 less than 64. */
378 mul8_operand (op, mode)
380 enum machine_mode mode;
382 return (GET_CODE (op) == CONST_INT
383 && (unsigned HOST_WIDE_INT) INTVAL (op) < 64
384 && (INTVAL (op) & 7) == 0);
387 /* Return 1 if OP is the constant zero in floating-point. */
390 fp0_operand (op, mode)
392 enum machine_mode mode;
394 return (GET_MODE (op) == mode
395 && GET_MODE_CLASS (mode) == MODE_FLOAT && op == CONST0_RTX (mode));
398 /* Return 1 if OP is the floating-point constant zero or a register. */
401 reg_or_fp0_operand (op, mode)
403 enum machine_mode mode;
405 return fp0_operand (op, mode) || register_operand (op, mode);
408 /* Return 1 if OP is a register or a constant integer. */
412 reg_or_cint_operand (op, mode)
414 enum machine_mode mode;
416 return GET_CODE (op) == CONST_INT || register_operand (op, mode);
419 /* Return 1 if OP is something that can be reloaded into a register;
420 if it is a MEM, it need not be valid. */
423 some_operand (op, mode)
425 enum machine_mode mode;
427 if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op))
430 switch (GET_CODE (op))
432 case REG: case MEM: case CONST_DOUBLE:
433 case CONST_INT: case LABEL_REF: case SYMBOL_REF: case CONST:
437 return some_operand (SUBREG_REG (op), VOIDmode);
443 /* Return 1 if OP is a valid operand for the source of a move insn. */
446 input_operand (op, mode)
448 enum machine_mode mode;
450 if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op))
453 if (GET_MODE_CLASS (mode) == MODE_FLOAT && GET_MODE (op) != mode)
456 switch (GET_CODE (op))
461 /* This handles both the Windows/NT and OSF cases. */
462 return mode == ptr_mode || mode == DImode;
468 if (register_operand (op, mode))
470 /* ... fall through ... */
472 return (TARGET_BYTE_OPS || (mode != HImode && mode != QImode)
473 && general_operand (op, mode));
476 return GET_MODE_CLASS (mode) == MODE_FLOAT && op == CONST0_RTX (mode);
479 return mode == QImode || mode == HImode || add_operand (op, mode);
485 /* Return 1 if OP is a SYMBOL_REF for a function known to be in this
489 current_file_function_operand (op, mode)
491 enum machine_mode mode;
493 return (GET_CODE (op) == SYMBOL_REF
494 && ! profile_flag && ! profile_block_flag
495 && (SYMBOL_REF_FLAG (op)
496 || op == XEXP (DECL_RTL (current_function_decl), 0)));
499 /* Return 1 if OP is a valid operand for the MEM of a CALL insn. */
502 call_operand (op, mode)
504 enum machine_mode mode;
509 return (GET_CODE (op) == SYMBOL_REF
510 || (GET_CODE (op) == REG && (TARGET_OPEN_VMS || REGNO (op) == 27)));
513 /* Return 1 if OP is a valid Alpha comparison operator. Here we know which
514 comparisons are valid in which insn. */
517 alpha_comparison_operator (op, mode)
519 enum machine_mode mode;
521 enum rtx_code code = GET_CODE (op);
523 if (mode != GET_MODE (op) || GET_RTX_CLASS (code) != '<')
526 return (code == EQ || code == LE || code == LT
527 || (mode == DImode && (code == LEU || code == LTU)));
530 /* Return 1 if OP is a valid Alpha swapped comparison operator. */
533 alpha_swapped_comparison_operator (op, mode)
535 enum machine_mode mode;
537 enum rtx_code code = GET_CODE (op);
539 if (mode != GET_MODE (op) || GET_RTX_CLASS (code) != '<')
542 code = swap_condition (code);
543 return (code == EQ || code == LE || code == LT
544 || (mode == DImode && (code == LEU || code == LTU)));
547 /* Return 1 if OP is a signed comparison operation. */
550 signed_comparison_operator (op, mode)
552 enum machine_mode mode;
554 switch (GET_CODE (op))
556 case EQ: case NE: case LE: case LT: case GE: case GT:
563 /* Return 1 if this is a divide or modulus operator. */
566 divmod_operator (op, mode)
568 enum machine_mode mode;
570 switch (GET_CODE (op))
572 case DIV: case MOD: case UDIV: case UMOD:
579 /* Return 1 if this memory address is a known aligned register plus
580 a constant. It must be a valid address. This means that we can do
581 this as an aligned reference plus some offset.
583 Take into account what reload will do.
585 We could say that out-of-range stack slots are alignable, but that would
586 complicate get_aligned_mem and it isn't worth the trouble since few
587 functions have large stack space. */
590 aligned_memory_operand (op, mode)
592 enum machine_mode mode;
594 if (GET_CODE (op) == SUBREG)
596 if (GET_MODE (op) != mode)
598 op = SUBREG_REG (op);
599 mode = GET_MODE (op);
602 if (reload_in_progress && GET_CODE (op) == REG
603 && REGNO (op) >= FIRST_PSEUDO_REGISTER)
604 op = reg_equiv_mem[REGNO (op)];
606 if (GET_CODE (op) != MEM || GET_MODE (op) != mode
607 || ! memory_address_p (mode, XEXP (op, 0)))
612 if (GET_CODE (op) == PLUS)
615 return (GET_CODE (op) == REG
616 && REGNO_POINTER_ALIGN (REGNO (op)) >= 4);
619 /* Similar, but return 1 if OP is a MEM which is not alignable. */
622 unaligned_memory_operand (op, mode)
624 enum machine_mode mode;
626 if (GET_CODE (op) == SUBREG)
628 if (GET_MODE (op) != mode)
630 op = SUBREG_REG (op);
631 mode = GET_MODE (op);
634 if (reload_in_progress && GET_CODE (op) == REG
635 && REGNO (op) >= FIRST_PSEUDO_REGISTER)
636 op = reg_equiv_mem[REGNO (op)];
638 if (GET_CODE (op) != MEM || GET_MODE (op) != mode)
643 if (! memory_address_p (mode, op))
646 if (GET_CODE (op) == PLUS)
649 return (GET_CODE (op) != REG
650 || REGNO_POINTER_ALIGN (REGNO (op)) < 4);
653 /* Return 1 if OP is either a register or an unaligned memory location. */
656 reg_or_unaligned_mem_operand (op, mode)
658 enum machine_mode mode;
660 return register_operand (op, mode) || unaligned_memory_operand (op, mode);
663 /* Return 1 if OP is any memory location. During reload a pseudo matches. */
666 any_memory_operand (op, mode)
668 enum machine_mode mode;
670 return (GET_CODE (op) == MEM
671 || (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == REG)
672 || (reload_in_progress && GET_CODE (op) == REG
673 && REGNO (op) >= FIRST_PSEUDO_REGISTER)
674 || (reload_in_progress && GET_CODE (op) == SUBREG
675 && GET_CODE (SUBREG_REG (op)) == REG
676 && REGNO (SUBREG_REG (op)) >= FIRST_PSEUDO_REGISTER));
679 /* REF is an alignable memory location. Place an aligned SImode
680 reference into *PALIGNED_MEM and the number of bits to shift into
684 get_aligned_mem (ref, paligned_mem, pbitnum)
686 rtx *paligned_mem, *pbitnum;
689 HOST_WIDE_INT offset = 0;
691 if (GET_CODE (ref) == SUBREG)
693 offset = SUBREG_WORD (ref) * UNITS_PER_WORD;
694 if (BYTES_BIG_ENDIAN)
695 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (ref)))
696 - MIN (UNITS_PER_WORD,
697 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref)))));
698 ref = SUBREG_REG (ref);
701 if (GET_CODE (ref) == REG)
702 ref = reg_equiv_mem[REGNO (ref)];
704 if (reload_in_progress)
705 base = find_replacement (&XEXP (ref, 0));
707 base = XEXP (ref, 0);
709 if (GET_CODE (base) == PLUS)
710 offset += INTVAL (XEXP (base, 1)), base = XEXP (base, 0);
712 *paligned_mem = gen_rtx (MEM, SImode,
713 plus_constant (base, offset & ~3));
714 MEM_IN_STRUCT_P (*paligned_mem) = MEM_IN_STRUCT_P (ref);
715 MEM_VOLATILE_P (*paligned_mem) = MEM_VOLATILE_P (ref);
716 RTX_UNCHANGING_P (*paligned_mem) = RTX_UNCHANGING_P (ref);
718 *pbitnum = GEN_INT ((offset & 3) * 8);
721 /* Similar, but just get the address. Handle the two reload cases.
722 Add EXTRA_OFFSET to the address we return. */
725 get_unaligned_address (ref, extra_offset)
730 HOST_WIDE_INT offset = 0;
732 if (GET_CODE (ref) == SUBREG)
734 offset = SUBREG_WORD (ref) * UNITS_PER_WORD;
735 if (BYTES_BIG_ENDIAN)
736 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (ref)))
737 - MIN (UNITS_PER_WORD,
738 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref)))));
739 ref = SUBREG_REG (ref);
742 if (GET_CODE (ref) == REG)
743 ref = reg_equiv_mem[REGNO (ref)];
745 if (reload_in_progress)
746 base = find_replacement (&XEXP (ref, 0));
748 base = XEXP (ref, 0);
750 if (GET_CODE (base) == PLUS)
751 offset += INTVAL (XEXP (base, 1)), base = XEXP (base, 0);
753 return plus_constant (base, offset + extra_offset);
756 /* Subfunction of the following function. Update the flags of any MEM
757 found in part of X. */
760 alpha_set_memflags_1 (x, in_struct_p, volatile_p, unchanging_p)
762 int in_struct_p, volatile_p, unchanging_p;
766 switch (GET_CODE (x))
770 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
771 alpha_set_memflags_1 (XVECEXP (x, 0, i), in_struct_p, volatile_p,
776 alpha_set_memflags_1 (PATTERN (x), in_struct_p, volatile_p,
781 alpha_set_memflags_1 (SET_DEST (x), in_struct_p, volatile_p,
783 alpha_set_memflags_1 (SET_SRC (x), in_struct_p, volatile_p,
788 MEM_IN_STRUCT_P (x) = in_struct_p;
789 MEM_VOLATILE_P (x) = volatile_p;
790 RTX_UNCHANGING_P (x) = unchanging_p;
795 /* Given INSN, which is either an INSN or a SEQUENCE generated to
796 perform a memory operation, look for any MEMs in either a SET_DEST or
797 a SET_SRC and copy the in-struct, unchanging, and volatile flags from
798 REF into each of the MEMs found. If REF is not a MEM, don't do
802 alpha_set_memflags (insn, ref)
806 /* Note that it is always safe to get these flags, though they won't
807 be what we think if REF is not a MEM. */
808 int in_struct_p = MEM_IN_STRUCT_P (ref);
809 int volatile_p = MEM_VOLATILE_P (ref);
810 int unchanging_p = RTX_UNCHANGING_P (ref);
812 if (GET_CODE (ref) != MEM
813 || (! in_struct_p && ! volatile_p && ! unchanging_p))
816 alpha_set_memflags_1 (insn, in_struct_p, volatile_p, unchanging_p);
819 /* Try to output insns to set TARGET equal to the constant C if it can be
820 done in less than N insns. Do all computations in MODE. Returns the place
821 where the output has been placed if it can be done and the insns have been
822 emitted. If it would take more than N insns, zero is returned and no
823 insns and emitted. */
826 alpha_emit_set_const (target, mode, c, n)
828 enum machine_mode mode;
835 /* Try 1 insn, then 2, then up to N. */
836 for (i = 1; i <= n; i++)
837 if ((pat = alpha_emit_set_const_1 (target, mode, c, i)) != 0)
843 /* Internal routine for the above to check for N or below insns. */
846 alpha_emit_set_const_1 (target, mode, c, n)
848 enum machine_mode mode;
852 HOST_WIDE_INT new = c;
854 /* Use a pseudo if highly optimizing and still generating RTL. */
856 = (flag_expensive_optimizations && rtx_equal_function_value_matters
860 #if HOST_BITS_PER_WIDE_INT == 64
861 /* We are only called for SImode and DImode. If this is SImode, ensure that
862 we are sign extended to a full word. This does not make any sense when
863 cross-compiling on a narrow machine. */
866 c = (c & 0xffffffff) - 2 * (c & 0x80000000);
869 /* If this is a sign-extended 32-bit constant, we can do this in at most
870 three insns, so do it if we have enough insns left. We always have
871 a sign-extended 32-bit constant when compiling on a narrow machine.
872 Note that we cannot handle the constant 0x80000000. */
874 if ((HOST_BITS_PER_WIDE_INT != 64
875 || c >> 31 == -1 || c >> 31 == 0)
878 HOST_WIDE_INT low = (c & 0xffff) - 2 * (c & 0x8000);
879 HOST_WIDE_INT tmp1 = c - low;
881 = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
882 HOST_WIDE_INT extra = 0;
884 /* If HIGH will be interpreted as negative but the constant is
885 positive, we must adjust it to do two ldha insns. */
887 if ((high & 0x8000) != 0 && c >= 0)
891 high = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
894 if (c == low || (low == 0 && extra == 0))
895 return copy_to_suggested_reg (GEN_INT (c), target, mode);
896 else if (n >= 2 + (extra != 0))
898 temp = copy_to_suggested_reg (GEN_INT (low), subtarget, mode);
901 temp = expand_binop (mode, add_optab, temp, GEN_INT (extra << 16),
902 subtarget, 0, OPTAB_WIDEN);
904 return expand_binop (mode, add_optab, temp, GEN_INT (high << 16),
905 target, 0, OPTAB_WIDEN);
909 /* If we couldn't do it that way, try some other methods. But if we have
910 no instructions left, don't bother. Likewise, if this is SImode and
911 we can't make pseudos, we can't do anything since the expand_binop
912 and expand_unop calls will widen and try to make pseudos. */
915 || (mode == SImode && ! rtx_equal_function_value_matters))
918 #if HOST_BITS_PER_WIDE_INT == 64
919 /* First, see if can load a value into the target that is the same as the
920 constant except that all bytes that are 0 are changed to be 0xff. If we
921 can, then we can do a ZAPNOT to obtain the desired constant. */
923 for (i = 0; i < 64; i += 8)
924 if ((new & ((HOST_WIDE_INT) 0xff << i)) == 0)
925 new |= (HOST_WIDE_INT) 0xff << i;
927 /* We are only called for SImode and DImode. If this is SImode, ensure that
928 we are sign extended to a full word. */
931 new = (new & 0xffffffff) - 2 * (new & 0x80000000);
934 && (temp = alpha_emit_set_const (subtarget, mode, new, n - 1)) != 0)
935 return expand_binop (mode, and_optab, temp, GEN_INT (c | ~ new),
936 target, 0, OPTAB_WIDEN);
939 /* Next, see if we can load a related constant and then shift and possibly
940 negate it to get the constant we want. Try this once each increasing
943 for (i = 1; i < n; i++)
945 /* First try complementing. */
946 if ((temp = alpha_emit_set_const (subtarget, mode, ~ c, i)) != 0)
947 return expand_unop (mode, one_cmpl_optab, temp, target, 0);
949 /* Next try to form a constant and do a left shift. We can do this
950 if some low-order bits are zero; the exact_log2 call below tells
951 us that information. The bits we are shifting out could be any
952 value, but here we'll just try the 0- and sign-extended forms of
953 the constant. To try to increase the chance of having the same
954 constant in more than one insn, start at the highest number of
955 bits to shift, but try all possibilities in case a ZAPNOT will
958 if ((bits = exact_log2 (c & - c)) > 0)
959 for (; bits > 0; bits--)
960 if ((temp = (alpha_emit_set_const
962 (unsigned HOST_WIDE_INT) c >> bits, i))) != 0
963 || ((temp = (alpha_emit_set_const
965 ((unsigned HOST_WIDE_INT) c) >> bits, i)))
967 return expand_binop (mode, ashl_optab, temp, GEN_INT (bits),
968 target, 0, OPTAB_WIDEN);
970 /* Now try high-order zero bits. Here we try the shifted-in bits as
971 all zero and all ones. Be careful to avoid shifting outside the
972 mode and to avoid shifting outside the host wide int size. */
974 if ((bits = (MIN (HOST_BITS_PER_WIDE_INT, GET_MODE_SIZE (mode) * 8)
975 - floor_log2 (c) - 1)) > 0)
976 for (; bits > 0; bits--)
977 if ((temp = alpha_emit_set_const (subtarget, mode,
979 || ((temp = (alpha_emit_set_const
981 ((c << bits) | (((HOST_WIDE_INT) 1 << bits) - 1)),
984 return expand_binop (mode, lshr_optab, temp, GEN_INT (bits),
985 target, 1, OPTAB_WIDEN);
987 /* Now try high-order 1 bits. We get that with a sign-extension.
988 But one bit isn't enough here. Be careful to avoid shifting outside
989 the mode and to avoid shifting outside the host wide int size. */
991 if ((bits = (MIN (HOST_BITS_PER_WIDE_INT, GET_MODE_SIZE (mode) * 8)
992 - floor_log2 (~ c) - 2)) > 0)
993 for (; bits > 0; bits--)
994 if ((temp = alpha_emit_set_const (subtarget, mode,
996 || ((temp = (alpha_emit_set_const
998 ((c << bits) | (((HOST_WIDE_INT) 1 << bits) - 1)),
1001 return expand_binop (mode, ashr_optab, temp, GEN_INT (bits),
1002 target, 0, OPTAB_WIDEN);
1008 #if HOST_BITS_PER_WIDE_INT == 64
1009 /* Having failed to find a 3 insn sequence in alpha_emit_set_const,
1010 fall back to a straight forward decomposition. We do this to avoid
1011 exponential run times encountered when looking for longer sequences
1012 with alpha_emit_set_const. */
1015 alpha_emit_set_long_const (target, c)
1019 /* Use a pseudo if highly optimizing and still generating RTL. */
1021 = (flag_expensive_optimizations && rtx_equal_function_value_matters
1023 HOST_WIDE_INT d1, d2, d3, d4;
1026 /* Decompose the entire word */
1027 d1 = ((c & 0xffff) ^ 0x8000) - 0x8000;
1029 d2 = ((c & 0xffffffff) ^ 0x80000000) - 0x80000000;
1031 d3 = ((c & 0xffff) ^ 0x8000) - 0x8000;
1033 d4 = ((c & 0xffffffff) ^ 0x80000000) - 0x80000000;
1038 /* Construct the high word */
1040 r1 = copy_to_suggested_reg (GEN_INT (d4), subtarget, DImode);
1042 r1 = copy_to_suggested_reg (GEN_INT (d3), subtarget, DImode);
1044 r1 = expand_binop (DImode, add_optab, GEN_INT (d3), GEN_INT (d4),
1045 subtarget, 0, OPTAB_WIDEN);
1047 /* Shift it into place */
1048 r2 = expand_binop (DImode, ashl_optab, r1, GEN_INT (32),
1049 subtarget, 0, OPTAB_WIDEN);
1051 if (subtarget == 0 && d1 == d3 && d2 == d4)
1052 r1 = expand_binop (DImode, add_optab, r1, r2, subtarget, 0, OPTAB_WIDEN);
1057 /* Add in the low word */
1059 r1 = expand_binop (DImode, add_optab, r1, GEN_INT (d2),
1060 subtarget, 0, OPTAB_WIDEN);
1062 r1 = expand_binop (DImode, add_optab, r1, GEN_INT (d1),
1063 subtarget, 0, OPTAB_WIDEN);
1067 r1 = copy_to_suggested_reg(r1, target, DImode);
1071 #endif /* HOST_BITS_PER_WIDE_INT == 64 */
1073 /* Rewrite a comparison against zero CMP of the form
1074 (CODE (cc0) (const_int 0)) so it can be written validly in
1075 a conditional move (if_then_else CMP ...).
1076 If both of the operands that set cc0 are non-zero we must emit
1077 an insn to perform the compare (it can't be done within
1078 the conditional move). */
1080 alpha_emit_conditional_move (cmp, mode)
1082 enum machine_mode mode;
1084 enum rtx_code code = GET_CODE (cmp);
1085 enum rtx_code cmov_code = NE;
1086 rtx op0 = alpha_compare_op0;
1087 rtx op1 = alpha_compare_op1;
1088 enum machine_mode cmp_mode
1089 = (GET_MODE (op0) == VOIDmode ? DImode : GET_MODE (op0));
1090 enum machine_mode cmp_op_mode = alpha_compare_fp_p ? DFmode : DImode;
1093 if (alpha_compare_fp_p != FLOAT_MODE_P (mode))
1096 /* We may be able to use a conditional move directly.
1097 This avoids emitting spurious compares. */
1098 if (signed_comparison_operator (cmp, cmp_op_mode)
1099 && (op0 == CONST0_RTX (cmp_mode) || op1 == CONST0_RTX (cmp_mode)))
1100 return gen_rtx (code, VOIDmode, op0, op1);
1102 /* We can't put the comparison insides a conditional move;
1103 emit a compare instruction and put that inside the
1104 conditional move. Make sure we emit only comparisons we have;
1105 swap or reverse as necessary. */
1109 case EQ: case LE: case LT: case LEU: case LTU:
1110 /* We have these compares: */
1114 /* This must be reversed. */
1115 code = reverse_condition (code);
1119 case GE: case GT: case GEU: case GTU:
1120 /* These must be swapped. Make sure the new first operand is in
1122 code = swap_condition (code);
1123 tem = op0, op0 = op1, op1 = tem;
1124 op0 = force_reg (cmp_mode, op0);
1131 tem = gen_reg_rtx (cmp_op_mode);
1132 emit_move_insn (tem, gen_rtx (code, cmp_op_mode, op0, op1));
1133 return gen_rtx (cmov_code, VOIDmode, tem, CONST0_RTX (cmp_op_mode));
1136 /* Adjust the cost of a scheduling dependency. Return the new cost of
1137 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
1140 alpha_adjust_cost (insn, link, dep_insn, cost)
1148 /* If the dependence is an anti-dependence, there is no cost. For an
1149 output dependence, there is sometimes a cost, but it doesn't seem
1150 worth handling those few cases. */
1152 if (REG_NOTE_KIND (link) != 0)
1155 /* EV5 costs are as given in alpha.md; exceptions are given here. */
1156 if (alpha_cpu == PROCESSOR_EV5)
1158 /* And the lord DEC sayeth: "A special bypass provides an effective
1159 latency of 0 cycles for an ICMP or ILOG insn producing the test
1160 operand of an IBR or CMOV insn." */
1161 if (recog_memoized (dep_insn) >= 0
1162 && (get_attr_type (dep_insn) == TYPE_ICMP
1163 || get_attr_type (dep_insn) == TYPE_ILOG)
1164 && recog_memoized (insn) >= 0
1165 && (get_attr_type (insn) == TYPE_IBR
1166 || (get_attr_type (insn) == TYPE_CMOV
1167 && !((set = single_set (dep_insn)) != 0
1168 && GET_CODE (PATTERN (insn)) == SET
1169 && GET_CODE (SET_SRC (PATTERN (insn))) == IF_THEN_ELSE
1170 && (rtx_equal_p (SET_DEST (set),
1171 XEXP (SET_SRC (PATTERN (insn)), 1))
1172 || rtx_equal_p (SET_DEST (set),
1173 XEXP (SET_SRC (PATTERN (insn)), 2)))))))
1178 /* If INSN is a store insn and DEP_INSN is setting the data being stored,
1179 we can sometimes lower the cost. */
1181 if (recog_memoized (insn) >= 0 && get_attr_type (insn) == TYPE_ST
1182 && (set = single_set (dep_insn)) != 0
1183 && GET_CODE (PATTERN (insn)) == SET
1184 && rtx_equal_p (SET_DEST (set), SET_SRC (PATTERN (insn))))
1185 switch (get_attr_type (dep_insn))
1188 /* No savings here. */
1193 /* In these cases, we save one cycle. */
1197 /* In all other cases, we save two cycles. */
1198 return MAX (0, cost - 4);
1201 /* Another case that needs adjustment is an arithmetic or logical
1202 operation. It's cost is usually one cycle, but we default it to
1203 two in the MD file. The only case that it is actually two is
1204 for the address in loads and stores. */
1206 if (recog_memoized (dep_insn) >= 0
1207 && (get_attr_type (dep_insn) == TYPE_IADD
1208 || get_attr_type (dep_insn) == TYPE_ILOG))
1209 switch (get_attr_type (insn))
1219 /* The final case is when a compare feeds into an integer branch. The cost
1220 is only one cycle in that case. */
1222 if (recog_memoized (dep_insn) >= 0
1223 && get_attr_type (dep_insn) == TYPE_ICMP
1224 && recog_memoized (insn) >= 0
1225 && get_attr_type (insn) == TYPE_IBR)
1228 /* Otherwise, return the default cost. */
1233 /* Print an operand. Recognize special options, documented below. */
1236 print_operand (file, x, code)
1246 /* Generates fp-rounding mode suffix: nothing for normal, 'c' for
1247 chopped, 'm' for minus-infinity, and 'd' for dynamic rounding
1248 mode. alpha_fprm controls which suffix is generated. */
1251 case ALPHA_FPRM_NORM:
1253 case ALPHA_FPRM_MINF:
1256 case ALPHA_FPRM_CHOP:
1259 case ALPHA_FPRM_DYN:
1266 /* Generates trap-mode suffix for instructions that accept the su
1267 suffix only (cmpt et al). */
1268 if (alpha_tp == ALPHA_TP_INSN)
1273 /* Generates trap-mode suffix for instructions that accept the u, su,
1274 and sui suffix. This is the bulk of the IEEE floating point
1275 instructions (addt et al). */
1286 case ALPHA_FPTM_SUI:
1287 fputs ("sui", file);
1293 /* Generates trap-mode suffix for instructions that accept the sui
1294 suffix (cvtqt and cvtqs). */
1297 case ALPHA_FPTM_N: case ALPHA_FPTM_U:
1298 case ALPHA_FPTM_SU: /* cvtqt/cvtqs can't cause underflow */
1300 case ALPHA_FPTM_SUI:
1301 fputs ("sui", file);
1307 /* Generates single precision instruction suffix. */
1308 fprintf (file, "%c", (TARGET_FLOAT_VAX?'f':'s'));
1312 /* Generates double precision instruction suffix. */
1313 fprintf (file, "%c", (TARGET_FLOAT_VAX?'g':'t'));
1317 /* If this operand is the constant zero, write it as "$31". */
1318 if (GET_CODE (x) == REG)
1319 fprintf (file, "%s", reg_names[REGNO (x)]);
1320 else if (x == CONST0_RTX (GET_MODE (x)))
1321 fprintf (file, "$31");
1323 output_operand_lossage ("invalid %%r value");
1328 /* Similar, but for floating-point. */
1329 if (GET_CODE (x) == REG)
1330 fprintf (file, "%s", reg_names[REGNO (x)]);
1331 else if (x == CONST0_RTX (GET_MODE (x)))
1332 fprintf (file, "$f31");
1334 output_operand_lossage ("invalid %%R value");
1339 /* Write the 1's complement of a constant. */
1340 if (GET_CODE (x) != CONST_INT)
1341 output_operand_lossage ("invalid %%N value");
1343 fprintf (file, "%ld", ~ INTVAL (x));
1347 /* Write 1 << C, for a constant C. */
1348 if (GET_CODE (x) != CONST_INT)
1349 output_operand_lossage ("invalid %%P value");
1351 fprintf (file, "%ld", (HOST_WIDE_INT) 1 << INTVAL (x));
1355 /* Write the high-order 16 bits of a constant, sign-extended. */
1356 if (GET_CODE (x) != CONST_INT)
1357 output_operand_lossage ("invalid %%h value");
1359 fprintf (file, "%ld", INTVAL (x) >> 16);
1363 /* Write the low-order 16 bits of a constant, sign-extended. */
1364 if (GET_CODE (x) != CONST_INT)
1365 output_operand_lossage ("invalid %%L value");
1367 fprintf (file, "%ld", (INTVAL (x) & 0xffff) - 2 * (INTVAL (x) & 0x8000));
1371 /* Write mask for ZAP insn. */
1372 if (GET_CODE (x) == CONST_DOUBLE)
1374 HOST_WIDE_INT mask = 0;
1375 HOST_WIDE_INT value;
1377 value = CONST_DOUBLE_LOW (x);
1378 for (i = 0; i < HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR;
1383 value = CONST_DOUBLE_HIGH (x);
1384 for (i = 0; i < HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR;
1387 mask |= (1 << (i + sizeof (int)));
1389 fprintf (file, "%ld", mask & 0xff);
1392 else if (GET_CODE (x) == CONST_INT)
1394 HOST_WIDE_INT mask = 0, value = INTVAL (x);
1396 for (i = 0; i < 8; i++, value >>= 8)
1400 fprintf (file, "%ld", mask);
1403 output_operand_lossage ("invalid %%m value");
1407 /* 'b', 'w', or 'l' as the value of the constant. */
1408 if (GET_CODE (x) != CONST_INT
1409 || (INTVAL (x) != 8 && INTVAL (x) != 16 && INTVAL (x) != 32))
1410 output_operand_lossage ("invalid %%M value");
1412 fprintf (file, "%s",
1413 INTVAL (x) == 8 ? "b" : INTVAL (x) == 16 ? "w" : "l");
1417 /* Similar, except do it from the mask. */
1418 if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xff)
1419 fprintf (file, "b");
1420 else if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xffff)
1421 fprintf (file, "w");
1422 #if HOST_BITS_PER_WIDE_INT == 32
1423 else if (GET_CODE (x) == CONST_DOUBLE
1424 && CONST_DOUBLE_HIGH (x) == 0
1425 && CONST_DOUBLE_LOW (x) == -1)
1426 fprintf (file, "l");
1428 else if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xffffffff)
1429 fprintf (file, "l");
1432 output_operand_lossage ("invalid %%U value");
1436 /* Write the constant value divided by 8. */
1437 if (GET_CODE (x) != CONST_INT
1438 && (unsigned HOST_WIDE_INT) INTVAL (x) >= 64
1439 && (INTVAL (x) & 7) != 8)
1440 output_operand_lossage ("invalid %%s value");
1442 fprintf (file, "%ld", INTVAL (x) / 8);
1446 /* Same, except compute (64 - c) / 8 */
1448 if (GET_CODE (x) != CONST_INT
1449 && (unsigned HOST_WIDE_INT) INTVAL (x) >= 64
1450 && (INTVAL (x) & 7) != 8)
1451 output_operand_lossage ("invalid %%s value");
1453 fprintf (file, "%ld", (64 - INTVAL (x)) / 8);
1456 case 'C': case 'D': case 'c': case 'd':
1457 /* Write out comparison name. */
1459 enum rtx_code c = GET_CODE (x);
1461 if (GET_RTX_CLASS (c) != '<')
1462 output_operand_lossage ("invalid %%C value");
1465 c = reverse_condition (c);
1466 else if (code == 'c')
1467 c = swap_condition (c);
1468 else if (code == 'd')
1469 c = swap_condition (reverse_condition (c));
1472 fprintf (file, "ule");
1474 fprintf (file, "ult");
1476 fprintf (file, "%s", GET_RTX_NAME (c));
1481 /* Write the divide or modulus operator. */
1482 switch (GET_CODE (x))
1485 fprintf (file, "div%s", GET_MODE (x) == SImode ? "l" : "q");
1488 fprintf (file, "div%su", GET_MODE (x) == SImode ? "l" : "q");
1491 fprintf (file, "rem%s", GET_MODE (x) == SImode ? "l" : "q");
1494 fprintf (file, "rem%su", GET_MODE (x) == SImode ? "l" : "q");
1497 output_operand_lossage ("invalid %%E value");
1503 /* Write "_u" for unaligned access. */
1504 if (GET_CODE (x) == MEM && GET_CODE (XEXP (x, 0)) == AND)
1505 fprintf (file, "_u");
1509 if (GET_CODE (x) == REG)
1510 fprintf (file, "%s", reg_names[REGNO (x)]);
1511 else if (GET_CODE (x) == MEM)
1512 output_address (XEXP (x, 0));
1514 output_addr_const (file, x);
1518 output_operand_lossage ("invalid %%xn code");
1522 /* Do what is necessary for `va_start'. The argument is ignored;
1523 We look at the current function to determine if stdarg or varargs
1524 is used and fill in an initial va_list. A pointer to this constructor
1528 alpha_builtin_saveregs (arglist)
1531 rtx block, addr, argsize;
1532 tree fntype = TREE_TYPE (current_function_decl);
1533 int stdarg = (TYPE_ARG_TYPES (fntype) != 0
1534 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype)))
1535 != void_type_node));
1537 /* Compute the current position into the args, taking into account
1538 both registers and memory. Both of these are already included in
1539 current_function_args_info. */
1541 argsize = GEN_INT (CURRENT_FUNCTION_ARGS_INFO * UNITS_PER_WORD);
1543 /* For Unix, SETUP_INCOMING_VARARGS moves the starting address base up by 48,
1544 storing fp arg registers in the first 48 bytes, and the integer arg
1545 registers in the next 48 bytes. This is only done, however, if any
1546 integer registers need to be stored.
1548 If no integer registers need be stored, then we must subtract 48 in
1549 order to account for the integer arg registers which are counted in
1550 argsize above, but which are not actually stored on the stack. */
1552 if (TARGET_OPEN_VMS)
1553 addr = plus_constant (virtual_incoming_args_rtx,
1554 CURRENT_FUNCTION_ARGS_INFO <= 5 + stdarg
1555 ? UNITS_PER_WORD : - 6 * UNITS_PER_WORD);
1557 addr = (CURRENT_FUNCTION_ARGS_INFO <= 5 + stdarg
1558 ? plus_constant (virtual_incoming_args_rtx,
1560 : plus_constant (virtual_incoming_args_rtx,
1561 - (6 * UNITS_PER_WORD)));
1563 /* For VMS, we include the argsize, while on Unix, it's handled as
1564 a separate field. */
1565 if (TARGET_OPEN_VMS)
1566 addr = plus_constant (addr, INTVAL (argsize));
1568 addr = force_operand (addr, NULL_RTX);
1570 #ifdef POINTERS_EXTEND_UNSIGNED
1571 addr = convert_memory_address (ptr_mode, addr);
1574 if (TARGET_OPEN_VMS)
1578 /* Allocate the va_list constructor */
1579 block = assign_stack_local (BLKmode, 2 * UNITS_PER_WORD, BITS_PER_WORD);
1580 RTX_UNCHANGING_P (block) = 1;
1581 RTX_UNCHANGING_P (XEXP (block, 0)) = 1;
1583 /* Store the address of the first integer register in the __base
1586 emit_move_insn (change_address (block, ptr_mode, XEXP (block, 0)), addr);
1588 /* Store the argsize as the __va_offset member. */
1590 (change_address (block, TYPE_MODE (integer_type_node),
1591 plus_constant (XEXP (block, 0),
1592 POINTER_SIZE/BITS_PER_UNIT)),
1595 /* Return the address of the va_list constructor, but don't put it in a
1596 register. Doing so would fail when not optimizing and produce worse
1597 code when optimizing. */
1598 return XEXP (block, 0);
1602 /* This page contains routines that are used to determine what the function
1603 prologue and epilogue code will do and write them out. */
1605 /* Compute the size of the save area in the stack. */
1612 /* These variables are used for communication between the following functions.
1613 They indicate various things about the current function being compiled
1614 that are used to tell what kind of prologue, epilogue and procedure
1615 descriptior to generate. */
1617 /* Nonzero if we need a stack procedure. */
1618 static int is_stack_procedure;
1620 /* Register number (either FP or SP) that is used to unwind the frame. */
1621 static int unwind_regno;
1623 /* Register number used to save FP. We need not have one for RA since
1624 we don't modify it for register procedures. This is only defined
1625 for register frame procedures. */
1626 static int save_fp_regno;
1628 /* Register number used to reference objects off our PV. */
1629 static int base_regno;
1631 /* Compute register masks for saved registers. */
1634 alpha_sa_mask (imaskP, fmaskP)
1635 unsigned long *imaskP;
1636 unsigned long *fmaskP;
1638 unsigned long imask = 0;
1639 unsigned long fmask = 0;
1642 if (is_stack_procedure)
1643 imask |= (1L << HARD_FRAME_POINTER_REGNUM);
1645 /* One for every register we have to save. */
1647 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1648 if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i])
1653 fmask |= (1L << (i - 32));
1666 HOST_WIDE_INT stack_needed;
1669 /* One for every register we have to save. */
1671 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1672 if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i])
1675 /* Start by assuming we can use a register procedure if we don't make any
1676 calls (REG_RA not used) or need to save any registers and a stack
1677 procedure if we do. */
1678 is_stack_procedure = regs_ever_live[REG_RA] || sa_size != 0;
1680 /* Decide whether to refer to objects off our PV via FP or PV.
1681 If we need need FP for something else or if we receive a nonlocal
1682 goto (which expects PV to contain the value), we must use PV.
1683 Otherwise, start by assuming we can use FP. */
1684 base_regno = (frame_pointer_needed || current_function_has_nonlocal_label
1685 || is_stack_procedure
1686 || current_function_outgoing_args_size
1687 ? REG_PV : HARD_FRAME_POINTER_REGNUM);
1689 /* If we want to copy PV into FP, we need to find some register in which to
1694 if (base_regno == HARD_FRAME_POINTER_REGNUM)
1695 for (i = 0; i < 32; i++)
1696 if (! fixed_regs[i] && call_used_regs[i] && ! regs_ever_live[i])
1699 if (save_fp_regno == -1)
1700 base_regno = REG_PV, is_stack_procedure = 1;
1702 /* Stack unwinding should be done via FP unless we use it for PV. */
1704 = base_regno == REG_PV ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM;
1706 /* If this is a stack procedure, allow space for saving FP and RA. */
1707 if (is_stack_procedure)
1714 alpha_pv_save_size ()
1717 return is_stack_procedure ? 8 : 0;
1724 return unwind_regno == HARD_FRAME_POINTER_REGNUM;
1727 #else /* ! OPEN_VMS */
1735 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1736 if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i])
1739 /* If some registers were saved but not reg 26, reg 26 must also
1740 be saved, so leave space for it. */
1741 if (size != 0 && ! regs_ever_live[26])
1744 /* Our size must be even (multiple of 16 bytes). */
1751 #endif /* ! OPEN_VMS */
1753 /* Return 1 if this function can directly return via $26. */
1758 return (! TARGET_OPEN_VMS && reload_completed && alpha_sa_size () == 0
1759 && get_frame_size () == 0
1760 && current_function_outgoing_args_size == 0
1761 && current_function_pretend_args_size == 0);
1764 /* Write a version stamp. Don't write anything if we are running as a
1765 cross-compiler. Otherwise, use the versions in /usr/include/stamp.h. */
1767 #if !defined(CROSS_COMPILE) && !defined(_WIN32) && !defined(__linux__) && !defined(VMS)
1772 alpha_write_verstamp (file)
1776 fprintf (file, "\t.verstamp %d %d\n", MS_STAMP, LS_STAMP);
1780 /* Write code to add constant C to register number IN_REG (possibly 31)
1781 and put the result into OUT_REG. Use TEMP_REG as a scratch register;
1782 usually this will be OUT_REG, but should not be if OUT_REG is
1783 STACK_POINTER_REGNUM, since it must be updated in a single instruction.
1784 Write the code to FILE. */
1787 add_long_const (file, c, in_reg, out_reg, temp_reg)
1790 int in_reg, out_reg, temp_reg;
1792 HOST_WIDE_INT low = (c & 0xffff) - 2 * (c & 0x8000);
1793 HOST_WIDE_INT tmp1 = c - low;
1794 HOST_WIDE_INT high = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
1795 HOST_WIDE_INT extra = 0;
1797 /* We don't have code to write out constants larger than 32 bits. */
1798 #if HOST_BITS_PER_LONG_INT == 64
1799 if ((unsigned HOST_WIDE_INT) c >> 32 != 0)
1803 /* If HIGH will be interpreted as negative, we must adjust it to do two
1804 ldha insns. Note that we will never be building a negative constant
1811 high = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
1816 int result_reg = (extra == 0 && high == 0) ? out_reg : temp_reg;
1818 if (low >= 0 && low < 255)
1819 fprintf (file, "\taddq $%d,%d,$%d\n", in_reg, low, result_reg);
1821 fprintf (file, "\tlda $%d,%d($%d)\n", result_reg, low, in_reg);
1823 in_reg = result_reg;
1828 int result_reg = (high == 0) ? out_reg : temp_reg;
1830 fprintf (file, "\tldah $%d,%d($%d)\n", result_reg, extra, in_reg);
1831 in_reg = result_reg;
1835 fprintf (file, "\tldah $%d,%d($%d)\n", out_reg, high, in_reg);
1838 /* Write function prologue. */
1843 Quick and dirty vmskrunch routine to ensure symbols are within the
1844 64 bytes limit imposed by VMS.
1846 This is written specifically for GNAT, and may not work for C++.
1848 This routine duplicates every symbol passed to it whether it is too
1849 long or not, which is a waste of space, fix later.
1857 int max = 60; /* Allow for the ..xx extension */
1863 len = tlen = strlen (name);
1864 foo = xstrdup (name);
1866 /* Don't muck with the ..xx extenstion */
1867 if ((foo [tlen-4] == '.') && (foo [tlen-3] == '.'))
1881 int i, j, slen, nlen, xlen, chopchar;
1885 /* Change all _ and . characters to spaces, if thats enough then quit.
1886 For example: "foobar__foo__bar" becomes "foobar foo bar" */
1888 for (i = 0; bar = index (foo, '_'); i++)
1892 for (i = 0; bar = index (foo, '.'); i++)
1896 for (i = 0; bar = index (foo, '$'); i++)
1900 /* Iteratively make blank the rightmost non-blank character on the
1901 longest leftmost substring delmited by blanks, until it's short
1902 enough. For example: "foobar foo bar" becomes, successively:
1921 /* Find first non-blank */
1923 for (i = j; foo[i]==' ' && foo[i]; i++)
1928 for (i = j + 1; foo[i] != ' ' && foo[i]; i++)
1941 foo [chopchar] = ' ';
1945 /* Put the ..xx extension back */
1952 /* Collapse all the blanks */
1954 for (i = 0; foo[i]; i++)
1962 /* Put back the ..xx extension */
1973 /* On vms we have two kinds of functions:
1975 - stack frame (PROC_STACK)
1976 these are 'normal' functions with local vars and which are
1977 calling other functions
1978 - register frame (PROC_REGISTER)
1979 keeps all data in registers, needs no stack
1981 We must pass this to the assembler so it can generate the
1982 proper pdsc (procedure descriptor)
1983 This is done with the '.pdesc' command.
1985 size is the stack size needed for local variables. */
1988 output_prolog (file, size)
1992 unsigned long imask = 0;
1993 unsigned long fmask = 0;
1994 /* Stack space needed for pushing registers clobbered by us. */
1995 HOST_WIDE_INT sa_size;
1996 /* Complete stack size needed. */
1997 HOST_WIDE_INT frame_size;
1998 /* Offset from base reg to register save area. */
2000 /* Offset during register save. */
2002 /* Label for the procedure entry. */
2003 char entry_label[70];
2006 sa_size = alpha_sa_size ();
2008 = ALPHA_ROUND (sa_size
2009 + (is_stack_procedure ? 8 : 0)
2010 + size + current_function_pretend_args_size);
2012 fprintf (file, "# size %d, current_function_pretend_args_size %d, current_function_outgoing_args_size %d\n",
2013 size, current_function_pretend_args_size, current_function_outgoing_args_size);
2014 fprintf (file, "# sa_size %d, frame_size %d\n", sa_size, frame_size);
2016 /* Issue function start and label. */
2017 fprintf (file, "\t.ent ");
2018 assemble_name (file, alpha_function_name);
2019 fprintf (file, "\n");
2020 sprintf (entry_label, "%.64s..en", alpha_function_name);
2021 ASM_OUTPUT_LABEL (file, entry_label);
2022 inside_function = TRUE;
2024 fprintf (file, "\t.base $%d\n", base_regno);
2026 /* Calculate register masks for clobbered registers. */
2028 if (is_stack_procedure)
2029 alpha_sa_mask (&imask, &fmask);
2031 /* Adjust the stack by the frame size. If the frame size is > 4096
2032 bytes, we need to be sure we probe somewhere in the first and last
2033 4096 bytes (we can probably get away without the latter test) and
2034 every 8192 bytes in between. If the frame size is > 32768, we
2035 do this in a loop. Otherwise, we generate the explicit probe
2038 Note that we are only allowed to adjust sp once in the prologue. */
2040 if (frame_size < 32768)
2042 if (frame_size > 4096)
2046 fprintf (file, "\tstq $31,-%d($30)\n", probed);
2048 while (probed + 8192 < frame_size)
2049 fprintf (file, "\tstq $31,-%d($30)\n", probed += 8192);
2051 /* We only have to do this probe if we aren't saving registers. */
2052 if (sa_size == 0 && probed + 4096 < frame_size)
2053 fprintf (file, "\tstq $31,-%d($30)\n", frame_size);
2056 if (frame_size != 0)
2057 fprintf (file, "\tlda $30,-%d($30)\n", frame_size);
2061 /* Here we generate code to set R4 to SP + 4096 and set R23 to the
2062 number of 8192 byte blocks to probe. We then probe each block
2063 in the loop and then set SP to the proper location. If the
2064 amount remaining is > 4096, we have to do one more probe if we
2065 are not saving any registers. */
2067 HOST_WIDE_INT blocks = (frame_size + 4096) / 8192;
2068 HOST_WIDE_INT leftover = frame_size + 4096 - blocks * 8192;
2070 add_long_const (file, blocks, 31, 23, 23);
2072 fprintf (file, "\tlda $22,4096($30)\n");
2074 assemble_name (file, alpha_function_name);
2075 fprintf (file, "..sc:\n");
2077 fprintf (file, "\tstq $31,-8192($22)\n");
2078 fprintf (file, "\tsubq $23,1,$23\n");
2079 fprintf (file, "\tlda $22,-8192($22)\n");
2081 fprintf (file, "\tbne $23,");
2082 assemble_name (file, alpha_function_name);
2083 fprintf (file, "..sc\n");
2085 if (leftover > 4096 && sa_size == 0)
2086 fprintf (file, "\tstq $31,-%d($22)\n", leftover);
2088 fprintf (file, "\tlda $30,-%d($22)\n", leftover);
2091 if (is_stack_procedure)
2093 int reg_offset = rsa_offset;
2095 /* Store R26 (RA) first. */
2096 fprintf (file, "\tstq $26,%d($30)\n", reg_offset);
2099 /* Store integer regs. according to mask. */
2100 for (i = 0; i < 32; i++)
2101 if (imask & (1L<<i))
2103 fprintf (file, "\tstq $%d,%d($30)\n", i, reg_offset);
2107 /* Print the register mask and do floating-point saves. */
2110 fprintf (file, "\t.mask 0x%x,0\n", imask);
2112 for (i = 0; i < 32; i++)
2114 if (fmask & (1L << i))
2116 fprintf (file, "\tstt $f%d,%d($30)\n", i, reg_offset);
2121 /* Print the floating-point mask, if we've saved any fp register. */
2123 fprintf (file, "\t.fmask 0x%x,0\n", fmask);
2125 fprintf (file, "\tstq $27,0($30)\n");
2129 fprintf (file, "\t.fp_save $%d\n", save_fp_regno);
2130 fprintf (file, "\tbis $%d,$%d,$%d\n", HARD_FRAME_POINTER_REGNUM,
2131 HARD_FRAME_POINTER_REGNUM, save_fp_regno);
2134 if (base_regno != REG_PV)
2135 fprintf (file, "\tbis $%d,$%d,$%d\n", REG_PV, REG_PV, base_regno);
2137 if (unwind_regno == HARD_FRAME_POINTER_REGNUM)
2138 fprintf (file, "\tbis $%d,$%d,$%d\n", STACK_POINTER_REGNUM,
2139 STACK_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM);
2141 /* Describe our frame. */
2142 fprintf (file, "\t.frame $%d,%d,$26,%d\n",
2143 unwind_regno, frame_size, rsa_offset);
2145 /* If we have to allocate space for outgoing args, do it now. */
2146 if (current_function_outgoing_args_size != 0)
2147 fprintf (file, "\tlda $%d,%d($%d)\n", STACK_POINTER_REGNUM,
2148 - ALPHA_ROUND (current_function_outgoing_args_size),
2149 HARD_FRAME_POINTER_REGNUM);
2151 fprintf (file, "\t.prologue\n");
2154 fprintf (file, "\t.align 3\n");
2155 ASM_OUTPUT_LABEL (file, alpha_function_name);
2156 fprintf (file, "\t.pdesc ");
2157 assemble_name (file, alpha_function_name);
2158 fprintf (file, "..en,%s\n", is_stack_procedure ? "stack" : "reg");
2159 alpha_need_linkage (alpha_function_name, 1);
2165 /* Write function epilogue. */
2168 output_epilog (file, size)
2172 unsigned long imask = 0;
2173 unsigned long fmask = 0;
2174 /* Stack space needed for pushing registers clobbered by us. */
2175 HOST_WIDE_INT sa_size = alpha_sa_size ();
2176 /* Complete stack size needed. */
2177 HOST_WIDE_INT frame_size
2178 = ALPHA_ROUND (sa_size
2179 + (is_stack_procedure ? 8 : 0)
2180 + size + current_function_pretend_args_size);
2182 rtx insn = get_last_insn ();
2184 /* If the last insn was a BARRIER, we don't have to write anything except
2185 the .end pseudo-op. */
2187 if (GET_CODE (insn) == NOTE)
2188 insn = prev_nonnote_insn (insn);
2190 if (insn == 0 || GET_CODE (insn) != BARRIER)
2192 /* Restore clobbered registers, load FP last. */
2194 if (is_stack_procedure)
2200 if (unwind_regno == HARD_FRAME_POINTER_REGNUM)
2201 fprintf (file, "\tbis $%d,$%d,$%d\n", HARD_FRAME_POINTER_REGNUM,
2202 HARD_FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM);
2204 alpha_sa_mask (&imask, &fmask);
2206 /* Start reloading registers after RA. */
2207 reg_offset = rsa_offset + 8;
2209 for (i = 0; i < 32; i++)
2210 if (imask & (1L<<i))
2212 if (i == HARD_FRAME_POINTER_REGNUM)
2213 fp_offset = reg_offset;
2215 fprintf (file, "\tldq $%d,%d($30)\n",
2220 for (i = 0; i < 32; i++)
2221 if (fmask & (1L << i))
2223 fprintf (file, "\tldt $f%d,%d($30)\n", i, reg_offset);
2227 /* Restore R26 (RA). */
2228 fprintf (file, "\tldq $26,%d($30)\n", rsa_offset);
2230 /* Restore R29 (FP). */
2231 fprintf (file, "\tldq $29,%d($30)\n", fp_offset);
2234 fprintf (file, "\tbis $%d,$%d,$%d\n", save_fp_regno, save_fp_regno,
2235 HARD_FRAME_POINTER_REGNUM);
2237 if (frame_size != 0)
2239 if (frame_size < 32768)
2240 fprintf (file, "\tlda $30,%d($30)\n", frame_size);
2243 long high = frame_size >> 16;
2244 long low = frame_size & 0xffff;
2248 low = -32768 + (low & 0x7fff);
2250 fprintf (file, "\tldah $2,%ld($31)\n", high);
2251 fprintf (file, "\tlda $2,%ld($2)\n", low);
2252 fprintf (file, "\taddq $30,$2,$30\n");
2256 /* Finally return to the caller. */
2257 fprintf (file, "\tret $31,($26),1\n");
2260 /* End the function. */
2261 fprintf (file, "\t.end ");
2262 assemble_name (file, alpha_function_name);
2263 fprintf (file, "\n");
2264 inside_function = FALSE;
2266 /* Show that we know this function if it is called again. */
2267 SYMBOL_REF_FLAG (XEXP (DECL_RTL (current_function_decl), 0)) = 1;
2270 #else /* !OPEN_VMS */
2273 output_prolog (file, size)
2277 HOST_WIDE_INT out_args_size
2278 = ALPHA_ROUND (current_function_outgoing_args_size);
2279 HOST_WIDE_INT sa_size = alpha_sa_size ();
2280 HOST_WIDE_INT frame_size
2281 = (out_args_size + sa_size
2282 + ALPHA_ROUND (size + current_function_pretend_args_size));
2283 HOST_WIDE_INT reg_offset = out_args_size;
2284 HOST_WIDE_INT start_reg_offset = reg_offset;
2285 HOST_WIDE_INT actual_start_reg_offset = start_reg_offset;
2286 int int_reg_save_area_size = 0;
2288 unsigned reg_mask = 0;
2291 /* Ecoff can handle multiple .file directives, so put out file and lineno.
2292 We have to do that before the .ent directive as we cannot switch
2293 files within procedures with native ecoff because line numbers are
2294 linked to procedure descriptors.
2295 Outputting the lineno helps debugging of one line functions as they
2296 would otherwise get no line number at all. Please note that we would
2297 like to put out last_linenum from final.c, but it is not accessible. */
2299 if (write_symbols == SDB_DEBUG)
2301 ASM_OUTPUT_SOURCE_FILENAME (file,
2302 DECL_SOURCE_FILE (current_function_decl));
2303 if (debug_info_level != DINFO_LEVEL_TERSE)
2304 ASM_OUTPUT_SOURCE_LINE (file,
2305 DECL_SOURCE_LINE (current_function_decl));
2308 /* The assembly language programmer's guide states that the second argument
2309 to the .ent directive, the lex_level, is ignored by the assembler,
2310 so we might as well omit it. */
2312 if (!flag_inhibit_size_directive)
2314 fprintf (file, "\t.ent ");
2315 assemble_name (file, alpha_function_name);
2316 fprintf (file, "\n");
2318 ASM_OUTPUT_LABEL (file, alpha_function_name);
2319 inside_function = TRUE;
2321 if (TARGET_IEEE_CONFORMANT && !flag_inhibit_size_directive)
2322 /* Set flags in procedure descriptor to request IEEE-conformant
2323 math-library routines. The value we set it to is PDSC_EXC_IEEE
2324 (/usr/include/pdsc.h). */
2325 fprintf (file, "\t.eflag 48\n");
2327 /* Set up offsets to alpha virtual arg/local debugging pointer. */
2329 alpha_auto_offset = -frame_size + current_function_pretend_args_size;
2330 alpha_arg_offset = -frame_size + 48;
2332 /* If we need a GP (we have a LDSYM insn or a CALL_INSN), load it first.
2333 Even if we are a static function, we still need to do this in case
2334 our address is taken and passed to something like qsort.
2336 We never need a GP for Windows/NT. */
2338 alpha_function_needs_gp = 0;
2340 #ifdef TARGET_PROFILING_NEEDS_GP
2342 alpha_function_needs_gp = 1;
2345 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2346 if ((GET_CODE (insn) == CALL_INSN)
2347 || (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2348 && GET_CODE (PATTERN (insn)) != USE
2349 && GET_CODE (PATTERN (insn)) != CLOBBER
2350 && (get_attr_type (insn) == TYPE_LDSYM
2351 || get_attr_type (insn) == TYPE_ISUBR)))
2353 alpha_function_needs_gp = 1;
2357 if (TARGET_WINDOWS_NT == 0)
2359 if (alpha_function_needs_gp)
2360 fprintf (file, "\tldgp $29,0($27)\n");
2362 /* Put a label after the GP load so we can enter the function at it. */
2363 assemble_name (file, alpha_function_name);
2364 fprintf (file, "..ng:\n");
2367 /* Adjust the stack by the frame size. If the frame size is > 4096
2368 bytes, we need to be sure we probe somewhere in the first and last
2369 4096 bytes (we can probably get away without the latter test) and
2370 every 8192 bytes in between. If the frame size is > 32768, we
2371 do this in a loop. Otherwise, we generate the explicit probe
2374 Note that we are only allowed to adjust sp once in the prologue. */
2376 if (frame_size < 32768)
2378 if (frame_size > 4096)
2382 fprintf (file, "\tstq $31,-%d($30)\n", probed);
2384 while (probed + 8192 < frame_size)
2385 fprintf (file, "\tstq $31,-%d($30)\n", probed += 8192);
2387 /* We only have to do this probe if we aren't saving registers. */
2388 if (sa_size == 0 && probed + 4096 < frame_size)
2389 fprintf (file, "\tstq $31,-%d($30)\n", frame_size);
2392 if (frame_size != 0)
2393 fprintf (file, "\tlda $30,-%d($30)\n", frame_size);
2397 /* Here we generate code to set R4 to SP + 4096 and set R5 to the
2398 number of 8192 byte blocks to probe. We then probe each block
2399 in the loop and then set SP to the proper location. If the
2400 amount remaining is > 4096, we have to do one more probe if we
2401 are not saving any registers. */
2403 HOST_WIDE_INT blocks = (frame_size + 4096) / 8192;
2404 HOST_WIDE_INT leftover = frame_size + 4096 - blocks * 8192;
2406 add_long_const (file, blocks, 31, 5, 5);
2408 fprintf (file, "\tlda $4,4096($30)\n");
2410 assemble_name (file, alpha_function_name);
2411 fprintf (file, "..sc:\n");
2413 fprintf (file, "\tstq $31,-8192($4)\n");
2414 fprintf (file, "\tsubq $5,1,$5\n");
2415 fprintf (file, "\tlda $4,-8192($4)\n");
2417 fprintf (file, "\tbne $5,");
2418 assemble_name (file, alpha_function_name);
2419 fprintf (file, "..sc\n");
2421 if (leftover > 4096 && sa_size == 0)
2422 fprintf (file, "\tstq $31,-%d($4)\n", leftover);
2424 fprintf (file, "\tlda $30,-%d($4)\n", leftover);
2427 /* Describe our frame. */
2428 if (!flag_inhibit_size_directive)
2430 fprintf (file, "\t.frame $%d,%d,$26,%d\n",
2431 (frame_pointer_needed
2432 ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM),
2433 frame_size, current_function_pretend_args_size);
2436 /* Save register 26 if any other register needs to be saved. */
2439 reg_mask |= 1 << 26;
2440 fprintf (file, "\tstq $26,%d($30)\n", reg_offset);
2442 int_reg_save_area_size += 8;
2445 /* Now save any other used integer registers required to be saved. */
2446 for (i = 0; i < 32; i++)
2447 if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i] && i != 26)
2450 fprintf (file, "\tstq $%d,%d($30)\n", i, reg_offset);
2452 int_reg_save_area_size += 8;
2455 /* Print the register mask and do floating-point saves. */
2456 if (reg_mask && !flag_inhibit_size_directive)
2457 fprintf (file, "\t.mask 0x%x,%d\n", reg_mask,
2458 actual_start_reg_offset - frame_size);
2460 start_reg_offset = reg_offset;
2463 for (i = 0; i < 32; i++)
2464 if (! fixed_regs[i + 32] && ! call_used_regs[i + 32]
2465 && regs_ever_live[i + 32])
2468 fprintf (file, "\tstt $f%d,%d($30)\n", i, reg_offset);
2472 /* Print the floating-point mask, if we've saved any fp register. */
2473 if (reg_mask && !flag_inhibit_size_directive)
2474 fprintf (file, "\t.fmask 0x%x,%d\n", reg_mask,
2475 actual_start_reg_offset - frame_size + int_reg_save_area_size);
2477 /* If we need a frame pointer, set it from the stack pointer. Note that
2478 this must always be the last instruction in the prologue. */
2479 if (frame_pointer_needed)
2480 fprintf (file, "\tbis $30,$30,$15\n");
2482 /* End the prologue and say if we used gp. */
2483 if (!flag_inhibit_size_directive)
2484 fprintf (file, "\t.prologue %d\n", alpha_function_needs_gp);
2487 /* Write function epilogue. */
2490 output_epilog (file, size)
2494 rtx insn = get_last_insn ();
2495 HOST_WIDE_INT out_args_size
2496 = ALPHA_ROUND (current_function_outgoing_args_size);
2497 HOST_WIDE_INT sa_size = alpha_sa_size ();
2498 HOST_WIDE_INT frame_size
2499 = (out_args_size + sa_size
2500 + ALPHA_ROUND (size + current_function_pretend_args_size));
2501 HOST_WIDE_INT reg_offset = out_args_size;
2502 HOST_WIDE_INT frame_size_from_reg_save = frame_size - reg_offset;
2504 = frame_pointer_needed && regs_ever_live[HARD_FRAME_POINTER_REGNUM];
2507 /* If the last insn was a BARRIER, we don't have to write anything except
2508 the .end pseudo-op. */
2509 if (GET_CODE (insn) == NOTE)
2510 insn = prev_nonnote_insn (insn);
2511 if (insn == 0 || GET_CODE (insn) != BARRIER)
2515 final_prescan_insn (NULL_RTX, NULL_PTR, 0);
2517 /* If we have a frame pointer, restore SP from it. */
2518 if (frame_pointer_needed)
2519 fprintf (file, "\tbis $15,$15,$30\n");
2521 /* Restore all the registers, starting with the return address
2525 fprintf (file, "\tldq $26,%d($30)\n", reg_offset);
2529 /* Now restore any other used integer registers that that we saved,
2530 except for FP if it is being used as FP, since it must be
2533 for (i = 0; i < 32; i++)
2534 if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i]
2537 if (i == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed)
2538 fp_offset = reg_offset;
2540 fprintf (file, "\tldq $%d,%d($30)\n", i, reg_offset);
2544 for (i = 0; i < 32; i++)
2545 if (! fixed_regs[i + 32] && ! call_used_regs[i + 32]
2546 && regs_ever_live[i + 32])
2548 fprintf (file, "\tldt $f%d,%d($30)\n", i, reg_offset);
2552 /* If the stack size is large and we have a frame pointer, compute the
2553 size of the stack into a register because the old FP restore, stack
2554 pointer adjust, and return are required to be consecutive
2556 if (frame_size > 32767 && restore_fp)
2557 add_long_const (file, frame_size, 31, 1, 1);
2559 /* If we needed a frame pointer and we have to restore it, do it
2560 now. This must be done in one instruction immediately
2561 before the SP update. */
2562 if (restore_fp && fp_offset)
2563 fprintf (file, "\tldq $15,%d($30)\n", fp_offset);
2565 /* Now update the stack pointer, if needed. Only one instruction must
2566 modify the stack pointer. It must be the last instruction in the
2567 sequence and must be an ADDQ or LDA instruction. If the frame
2568 pointer was loaded above, we may only put one instruction here. */
2570 if (frame_size > 32768 && restore_fp)
2571 fprintf (file, "\taddq $1,$30,$30\n");
2573 add_long_const (file, frame_size, 30, 30, 1);
2575 /* Finally return to the caller. */
2576 fprintf (file, "\tret $31,($26),1\n");
2579 /* End the function. */
2580 if (!flag_inhibit_size_directive)
2582 fprintf (file, "\t.end ");
2583 assemble_name (file, alpha_function_name);
2584 fprintf (file, "\n");
2586 inside_function = FALSE;
2588 /* Show that we know this function if it is called again. */
2589 SYMBOL_REF_FLAG (XEXP (DECL_RTL (current_function_decl), 0)) = 1;
2591 #endif /* !OPEN_VMS */
2593 /* Debugging support. */
2597 /* Count the number of sdb related labels are generated (to find block
2598 start and end boundaries). */
2600 int sdb_label_count = 0;
2602 /* Next label # for each statement. */
2604 static int sym_lineno = 0;
2606 /* Count the number of .file directives, so that .loc is up to date. */
2608 static int num_source_filenames = 0;
2610 /* Name of the file containing the current function. */
2612 static char *current_function_file = "";
2614 /* Offsets to alpha virtual arg/local debugging pointers. */
2616 long alpha_arg_offset;
2617 long alpha_auto_offset;
2619 /* Emit a new filename to a stream. */
2622 alpha_output_filename (stream, name)
2626 static int first_time = TRUE;
2627 char ltext_label_name[100];
2632 ++num_source_filenames;
2633 current_function_file = name;
2634 fprintf (stream, "\t.file\t%d ", num_source_filenames);
2635 output_quoted_string (stream, name);
2636 fprintf (stream, "\n");
2637 if (!TARGET_GAS && write_symbols == DBX_DEBUG)
2638 fprintf (stream, "\t#@stabs\n");
2641 else if (write_symbols == DBX_DEBUG)
2643 ASM_GENERATE_INTERNAL_LABEL (ltext_label_name, "Ltext", 0);
2644 fprintf (stream, "%s ", ASM_STABS_OP);
2645 output_quoted_string (stream, name);
2646 fprintf (stream, ",%d,0,0,%s\n", N_SOL, <ext_label_name[1]);
2649 else if (name != current_function_file
2650 && strcmp (name, current_function_file) != 0)
2652 if (inside_function && ! TARGET_GAS)
2653 fprintf (stream, "\t#.file\t%d ", num_source_filenames);
2656 ++num_source_filenames;
2657 current_function_file = name;
2658 fprintf (stream, "\t.file\t%d ", num_source_filenames);
2661 output_quoted_string (stream, name);
2662 fprintf (stream, "\n");
2666 /* Emit a linenumber to a stream. */
2669 alpha_output_lineno (stream, line)
2673 if (write_symbols == DBX_DEBUG)
2675 /* mips-tfile doesn't understand .stabd directives. */
2677 fprintf (stream, "$LM%d:\n\t%s %d,0,%d,$LM%d\n",
2678 sym_lineno, ASM_STABN_OP, N_SLINE, line, sym_lineno);
2681 fprintf (stream, "\n\t.loc\t%d %d\n", num_source_filenames, line);
2684 /* Structure to show the current status of registers and memory. */
2686 struct shadow_summary
2689 unsigned long i : 32; /* Mask of int regs */
2690 unsigned long fp : 32; /* Mask of fp regs */
2691 unsigned long mem : 1; /* mem == imem | fpmem */
2695 /* Summary the effects of expression X on the machine. Update SUM, a pointer
2696 to the summary structure. SET is nonzero if the insn is setting the
2697 object, otherwise zero. */
2700 summarize_insn (x, sum, set)
2702 struct shadow_summary *sum;
2711 switch (GET_CODE (x))
2713 /* ??? Note that this case would be incorrect if the Alpha had a
2714 ZERO_EXTRACT in SET_DEST. */
2716 summarize_insn (SET_SRC (x), sum, 0);
2717 summarize_insn (SET_DEST (x), sum, 1);
2721 summarize_insn (XEXP (x, 0), sum, 1);
2725 summarize_insn (XEXP (x, 0), sum, 0);
2729 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
2730 summarize_insn (XVECEXP (x, 0, i), sum, 0);
2735 int regno = REGNO (x);
2736 unsigned long mask = 1UL << (regno % 32);
2738 if (regno == 31 || regno == 63)
2744 sum->defd.i |= mask;
2746 sum->defd.fp |= mask;
2751 sum->used.i |= mask;
2753 sum->used.fp |= mask;
2764 /* Find the regs used in memory address computation: */
2765 summarize_insn (XEXP (x, 0), sum, 0);
2769 summarize_insn (SUBREG_REG (x), sum, 0);
2772 case CONST_INT: case CONST_DOUBLE:
2773 case SYMBOL_REF: case LABEL_REF: case CONST:
2776 /* Handle common unary and binary ops for efficiency. */
2777 case COMPARE: case PLUS: case MINUS: case MULT: case DIV:
2778 case MOD: case UDIV: case UMOD: case AND: case IOR:
2779 case XOR: case ASHIFT: case ROTATE: case ASHIFTRT: case LSHIFTRT:
2780 case ROTATERT: case SMIN: case SMAX: case UMIN: case UMAX:
2781 case NE: case EQ: case GE: case GT: case LE:
2782 case LT: case GEU: case GTU: case LEU: case LTU:
2783 summarize_insn (XEXP (x, 0), sum, 0);
2784 summarize_insn (XEXP (x, 1), sum, 0);
2787 case NEG: case NOT: case SIGN_EXTEND: case ZERO_EXTEND:
2788 case TRUNCATE: case FLOAT_EXTEND: case FLOAT_TRUNCATE: case FLOAT:
2789 case FIX: case UNSIGNED_FLOAT: case UNSIGNED_FIX: case ABS:
2790 case SQRT: case FFS:
2791 summarize_insn (XEXP (x, 0), sum, 0);
2795 format_ptr = GET_RTX_FORMAT (GET_CODE (x));
2796 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
2797 switch (format_ptr[i])
2800 summarize_insn (XEXP (x, i), sum, 0);
2804 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2805 summarize_insn (XVECEXP (x, i, j), sum, 0);
2814 /* This function is executed just prior to the output of assembler code for
2815 INSN to modify the extracted operands so they will be output differently.
2817 OPVEC is the vector containing the operands extracted from INSN, and
2818 NOPERANDS is the number of elements of the vector which contain meaningful
2819 data for this insn. The contents of this vector are what will be used to
2820 convert the insn template into assembler code, so you can change the
2821 assembler output by changing the contents of the vector.
2823 We use this function to ensure a sufficient number of `trapb' instructions
2824 are in the code when the user requests code with a trap precision of
2825 functions or instructions.
2827 In naive mode, when the user requests a trap-precision of "instruction", a
2828 trapb is needed after every instruction that may generate a trap (and after
2829 jsr/bsr instructions, because called functions may import a trap from the
2830 caller). This ensures that the code is resumption safe but it is also slow.
2832 When optimizations are turned on, we delay issuing a trapb as long as
2833 possible. In this context, a trap shadow is the sequence of instructions
2834 that starts with a (potentially) trap generating instruction and extends to
2835 the next trapb or call_pal instruction (but GCC never generates call_pal by
2836 itself). We can delay (and therefore sometimes omit) a trapb subject to the
2837 following conditions:
2839 (a) On entry to the trap shadow, if any Alpha register or memory location
2840 contains a value that is used as an operand value by some instruction in
2841 the trap shadow (live on entry), then no instruction in the trap shadow
2842 may modify the register or memory location.
2844 (b) Within the trap shadow, the computation of the base register for a
2845 memory load or store instruction may not involve using the result
2846 of an instruction that might generate an UNPREDICTABLE result.
2848 (c) Within the trap shadow, no register may be used more than once as a
2849 destination register. (This is to make life easier for the trap-handler.)
2851 (d) The trap shadow may not include any branch instructions.
2856 final_prescan_insn (insn, opvec, noperands)
2861 static struct shadow_summary shadow = {0, 0, 0, 0, 0};
2863 #define CLOSE_SHADOW \
2866 fputs ("\ttrapb\n", asm_out_file); \
2868 bzero ((char *) &shadow, sizeof shadow); \
2872 if (alpha_tp == ALPHA_TP_PROG)
2879 /* Generate one trapb before epilogue (indicated by INSN==0) */
2885 if (optimize && insn != 0)
2887 struct shadow_summary sum = {0, 0, 0};
2889 switch (GET_CODE(insn))
2892 summarize_insn (PATTERN (insn), &sum, 0);
2894 if ((sum.defd.i & shadow.defd.i)
2895 || (sum.defd.fp & shadow.defd.fp))
2897 /* (c) would be violated */
2902 /* Combine shadow with summary of current insn: */
2903 shadow.used.i |= sum.used.i;
2904 shadow.used.fp |= sum.used.fp;
2905 shadow.used.mem |= sum.used.mem;
2906 shadow.defd.i |= sum.defd.i;
2907 shadow.defd.fp |= sum.defd.fp;
2908 shadow.defd.mem |= sum.defd.mem;
2910 if ((sum.defd.i & shadow.used.i)
2911 || (sum.defd.fp & shadow.used.fp)
2912 || (sum.defd.mem & shadow.used.mem))
2914 /* (a) would be violated (also takes care of (b)). */
2915 if (get_attr_trap (insn) == TRAP_YES
2916 && ((sum.defd.i & sum.used.i)
2917 || (sum.defd.fp & sum.used.fp)))
2940 if (insn != 0 && get_attr_trap (insn) == TRAP_YES)
2942 if (optimize && !trap_pending && GET_CODE (insn) == INSN)
2943 summarize_insn (PATTERN (insn), &shadow, 0);
2948 /* Check a floating-point value for validity for a particular machine mode. */
2950 static char *float_strings[] =
2952 "1.70141173319264430e+38", /* 2^127 (2^24 - 1) / 2^24 */
2953 "-1.70141173319264430e+38",
2954 "2.93873587705571877e-39", /* 2^-128 */
2955 "-2.93873587705571877e-39"
2958 static REAL_VALUE_TYPE float_values[4];
2959 static int inited_float_values = 0;
2962 check_float_value (mode, d, overflow)
2963 enum machine_mode mode;
2968 if (TARGET_IEEE || TARGET_IEEE_CONFORMANT || TARGET_IEEE_WITH_INEXACT)
2971 if (TARGET_FLOAT_VAX)
2974 if (inited_float_values == 0)
2977 for (i = 0; i < 4; i++)
2978 float_values[i] = REAL_VALUE_ATOF (float_strings[i], DFmode);
2980 inited_float_values = 1;
2987 bcopy ((char *) d, (char *) &r, sizeof (REAL_VALUE_TYPE));
2988 if (REAL_VALUES_LESS (float_values[0], r))
2990 bcopy ((char *) &float_values[0], (char *) d,
2991 sizeof (REAL_VALUE_TYPE));
2994 else if (REAL_VALUES_LESS (r, float_values[1]))
2996 bcopy ((char *) &float_values[1], (char *) d,
2997 sizeof (REAL_VALUE_TYPE));
3000 else if (REAL_VALUES_LESS (dconst0, r)
3001 && REAL_VALUES_LESS (r, float_values[2]))
3003 bcopy ((char *) &dconst0, (char *) d, sizeof (REAL_VALUE_TYPE));
3006 else if (REAL_VALUES_LESS (r, dconst0)
3007 && REAL_VALUES_LESS (float_values[3], r))
3009 bcopy ((char *) &dconst0, (char *) d, sizeof (REAL_VALUE_TYPE));
3020 function_arg (cum, mode, type, named)
3021 CUMULATIVE_ARGS *cum;
3022 enum machine_mode mode;
3028 if (mode == VOIDmode) /* final call, return argument information */
3030 return GEN_INT (*cum);
3038 *cum |= (((TARGET_FLOAT_VAX)?1:4) << ((arg * 3)+8)); /* 4 = AI$K_AR_FS, IEEE single */
3041 *cum |= (((TARGET_FLOAT_VAX)?3:5) << ((arg * 3)+8)); /* 5 = AI$K_AR_FT, IEEE double */
3044 *cum |= (7 << ((arg * 3)+8)); /* 5 = AI$K_AR_FT, IEEE double */
3050 return (arg < 6 && ! MUST_PASS_IN_STACK (mode, type)
3051 ? gen_rtx(REG, mode,
3052 (*cum & 0xff) + 16 + ((TARGET_FPREGS
3053 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
3054 || GET_MODE_CLASS (mode) == MODE_FLOAT))
3059 /* Structure to collect function names for final output
3062 enum links_kind {KIND_UNUSED, KIND_LOCAL, KIND_EXTERN};
3065 struct alpha_links {
3066 struct alpha_links *next;
3068 enum links_kind kind;
3071 static struct alpha_links *alpha_links_base = 0;
3073 /* Make (or fake) .linkage entry for function call.
3075 IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */
3078 alpha_need_linkage (name, is_local)
3083 struct alpha_links *lptr, *nptr;
3088 /* Is this name already defined ? */
3090 for (lptr = alpha_links_base; lptr; lptr = lptr->next)
3091 if (strcmp (lptr->name, name) == 0)
3095 /* defined here but external assumed. */
3096 if (lptr->kind == KIND_EXTERN)
3097 lptr->kind = KIND_LOCAL;
3101 /* used here but unused assumed. */
3102 if (lptr->kind == KIND_UNUSED)
3103 lptr->kind = KIND_LOCAL;
3108 nptr = (struct alpha_links *) xmalloc (sizeof (struct alpha_links));
3109 nptr->next = alpha_links_base;
3110 nptr->name = xstrdup (name);
3112 /* Assume external if no definition. */
3113 nptr->kind = (is_local ? KIND_UNUSED : KIND_EXTERN);
3115 alpha_links_base = nptr;
3122 alpha_write_linkage (stream)
3125 struct alpha_links *lptr, *nptr;
3127 readonly_section ();
3129 fprintf (stream, "\t.align 3\n");
3131 for (lptr = alpha_links_base; lptr; lptr = nptr)
3135 if (lptr->kind == KIND_UNUSED
3136 || ! TREE_SYMBOL_REFERENCED (get_identifier (lptr->name)))
3139 fprintf (stream, "%s..lk:\n", lptr->name);
3140 if (lptr->kind == KIND_LOCAL)
3142 /* Local and used, build linkage pair. */
3143 fprintf (stream, "\t.quad %s..en\n", lptr->name);
3144 fprintf (stream, "\t.quad %s\n", lptr->name);
3147 /* External and used, request linkage pair. */
3148 fprintf (stream, "\t.linkage %s\n", lptr->name);
3155 alpha_need_linkage (name, is_local)
3161 #endif /* OPEN_VMS */