1 /* Subroutines used for code generation on the DEC Alpha.
2 Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
41 /* Save information from a "cmpxx" operation until the branch or scc is
44 rtx alpha_compare_op0, alpha_compare_op1;
45 int alpha_compare_fp_p;
47 /* Save the name of the current function as used by the assembler. This
48 is used by the epilogue. */
50 char *alpha_function_name;
52 /* Non-zero if inside of a function, because the Alpha asm can't
53 handle .files inside of functions. */
55 static int inside_function = FALSE;
57 /* Nonzero if the current function needs gp. */
59 int alpha_function_needs_gp;
61 extern char *version_string;
62 extern int rtx_equal_function_value_matters;
64 /* Declarations of static functions. */
65 static void alpha_set_memflags_1 PROTO((rtx, int, int, int));
66 static void add_long_const PROTO((FILE *, HOST_WIDE_INT, int, int, int));
68 /* Returns 1 if VALUE is a mask that contains full bytes of zero or ones. */
76 for (i = 0; i < HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR;
78 if ((value & 0xff) != 0 && (value & 0xff) != 0xff)
84 /* Returns 1 if OP is either the constant zero or a register. If a
85 register, it must be in the proper mode unless MODE is VOIDmode. */
88 reg_or_0_operand (op, mode)
90 enum machine_mode mode;
92 return op == const0_rtx || register_operand (op, mode);
95 /* Return 1 if OP is a constant in the range of 0-63 (for a shift) or
99 reg_or_6bit_operand (op, mode)
101 enum machine_mode mode;
103 return ((GET_CODE (op) == CONST_INT
104 && (unsigned HOST_WIDE_INT) INTVAL (op) < 64)
105 || register_operand (op, mode));
109 /* Return 1 if OP is an 8-bit constant or any register. */
112 reg_or_8bit_operand (op, mode)
114 enum machine_mode mode;
116 return ((GET_CODE (op) == CONST_INT
117 && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100)
118 || register_operand (op, mode));
121 /* Return 1 if OP is an 8-bit constant. */
124 cint8_operand (op, mode)
126 enum machine_mode mode;
128 return (GET_CODE (op) == CONST_INT
129 && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100);
132 /* Return 1 if the operand is a valid second operand to an add insn. */
135 add_operand (op, mode)
137 enum machine_mode mode;
139 if (GET_CODE (op) == CONST_INT)
140 return (CONST_OK_FOR_LETTER_P (INTVAL (op), 'K')
141 || CONST_OK_FOR_LETTER_P (INTVAL (op), 'L')
142 || CONST_OK_FOR_LETTER_P (INTVAL (op), 'O'));
144 return register_operand (op, mode);
147 /* Return 1 if the operand is a valid second operand to a sign-extending
151 sext_add_operand (op, mode)
153 enum machine_mode mode;
155 if (GET_CODE (op) == CONST_INT)
156 return ((unsigned HOST_WIDE_INT) INTVAL (op) < 255
157 || (unsigned HOST_WIDE_INT) (- INTVAL (op)) < 255);
159 return register_operand (op, mode);
162 /* Return 1 if OP is the constant 4 or 8. */
165 const48_operand (op, mode)
167 enum machine_mode mode;
169 return (GET_CODE (op) == CONST_INT
170 && (INTVAL (op) == 4 || INTVAL (op) == 8));
173 /* Return 1 if OP is a valid first operand to an AND insn. */
176 and_operand (op, mode)
178 enum machine_mode mode;
180 if (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == VOIDmode)
181 return (zap_mask (CONST_DOUBLE_LOW (op))
182 && zap_mask (CONST_DOUBLE_HIGH (op)));
184 if (GET_CODE (op) == CONST_INT)
185 return ((unsigned HOST_WIDE_INT) INTVAL (op) < 0x100
186 || (unsigned HOST_WIDE_INT) ~ INTVAL (op) < 0x100
187 || zap_mask (INTVAL (op)));
189 return register_operand (op, mode);
192 /* Return 1 if OP is a valid first operand to an IOR or XOR insn. */
195 or_operand (op, mode)
197 enum machine_mode mode;
199 if (GET_CODE (op) == CONST_INT)
200 return ((unsigned HOST_WIDE_INT) INTVAL (op) < 0x100
201 || (unsigned HOST_WIDE_INT) ~ INTVAL (op) < 0x100);
203 return register_operand (op, mode);
206 /* Return 1 if OP is a constant that is the width, in bits, of an integral
207 mode smaller than DImode. */
210 mode_width_operand (op, mode)
212 enum machine_mode mode;
214 return (GET_CODE (op) == CONST_INT
215 && (INTVAL (op) == 8 || INTVAL (op) == 16 || INTVAL (op) == 32));
218 /* Return 1 if OP is a constant that is the width of an integral machine mode
219 smaller than an integer. */
222 mode_mask_operand (op, mode)
224 enum machine_mode mode;
226 #if HOST_BITS_PER_WIDE_INT == 32
227 if (GET_CODE (op) == CONST_DOUBLE)
228 return CONST_DOUBLE_HIGH (op) == 0 && CONST_DOUBLE_LOW (op) == -1;
231 return (GET_CODE (op) == CONST_INT
232 && (INTVAL (op) == 0xff
233 || INTVAL (op) == 0xffff
234 #if HOST_BITS_PER_WIDE_INT == 64
235 || INTVAL (op) == 0xffffffff
240 /* Return 1 if OP is a multiple of 8 less than 64. */
243 mul8_operand (op, mode)
245 enum machine_mode mode;
247 return (GET_CODE (op) == CONST_INT
248 && (unsigned HOST_WIDE_INT) INTVAL (op) < 64
249 && (INTVAL (op) & 7) == 0);
252 /* Return 1 if OP is the constant zero in floating-point. */
255 fp0_operand (op, mode)
257 enum machine_mode mode;
259 return (GET_MODE (op) == mode
260 && GET_MODE_CLASS (mode) == MODE_FLOAT && op == CONST0_RTX (mode));
263 /* Return 1 if OP is the floating-point constant zero or a register. */
266 reg_or_fp0_operand (op, mode)
268 enum machine_mode mode;
270 return fp0_operand (op, mode) || register_operand (op, mode);
273 /* Return 1 if OP is a register or a constant integer. */
277 reg_or_cint_operand (op, mode)
279 enum machine_mode mode;
281 return GET_CODE (op) == CONST_INT || register_operand (op, mode);
284 /* Return 1 if OP is something that can be reloaded into a register;
285 if it is a MEM, it need not be valid. */
288 some_operand (op, mode)
290 enum machine_mode mode;
292 if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op))
295 switch (GET_CODE (op))
297 case REG: case MEM: case CONST_DOUBLE:
298 case CONST_INT: case LABEL_REF: case SYMBOL_REF: case CONST:
302 return some_operand (SUBREG_REG (op), VOIDmode);
308 /* Return 1 if OP is a valid operand for the source of a move insn. */
311 input_operand (op, mode)
313 enum machine_mode mode;
315 if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op))
318 if (GET_MODE_CLASS (mode) == MODE_FLOAT && GET_MODE (op) != mode)
321 switch (GET_CODE (op))
326 /* This handles both the Windows/NT and OSF cases. */
327 return mode == ptr_mode || mode == DImode;
333 if (register_operand (op, mode))
335 /* ... fall through ... */
337 return mode != HImode && mode != QImode && general_operand (op, mode);
340 return GET_MODE_CLASS (mode) == MODE_FLOAT && op == CONST0_RTX (mode);
343 return mode == QImode || mode == HImode || add_operand (op, mode);
349 /* Return 1 if OP is a SYMBOL_REF for a function known to be in this
353 current_file_function_operand (op, mode)
355 enum machine_mode mode;
357 return (GET_CODE (op) == SYMBOL_REF
358 && ! profile_flag && ! profile_block_flag
359 && (SYMBOL_REF_FLAG (op)
360 || op == XEXP (DECL_RTL (current_function_decl), 0)));
363 /* Return 1 if OP is a valid operand for the MEM of a CALL insn. */
366 call_operand (op, mode)
368 enum machine_mode mode;
373 return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == REG);
376 /* Return 1 if OP is a valid Alpha comparison operator. Here we know which
377 comparisons are valid in which insn. */
380 alpha_comparison_operator (op, mode)
382 enum machine_mode mode;
384 enum rtx_code code = GET_CODE (op);
386 if (mode != GET_MODE (op) || GET_RTX_CLASS (code) != '<')
389 return (code == EQ || code == LE || code == LT
390 || (mode == DImode && (code == LEU || code == LTU)));
393 /* Return 1 if OP is a signed comparison operation. */
396 signed_comparison_operator (op, mode)
398 enum machine_mode mode;
400 switch (GET_CODE (op))
402 case EQ: case NE: case LE: case LT: case GE: case GT:
409 /* Return 1 if this is a divide or modulus operator. */
412 divmod_operator (op, mode)
414 enum machine_mode mode;
416 switch (GET_CODE (op))
418 case DIV: case MOD: case UDIV: case UMOD:
425 /* Return 1 if this memory address is a known aligned register plus
426 a constant. It must be a valid address. This means that we can do
427 this as an aligned reference plus some offset.
429 Take into account what reload will do.
431 We could say that out-of-range stack slots are alignable, but that would
432 complicate get_aligned_mem and it isn't worth the trouble since few
433 functions have large stack space. */
436 aligned_memory_operand (op, mode)
438 enum machine_mode mode;
440 if (GET_CODE (op) == SUBREG)
442 if (GET_MODE (op) != mode)
444 op = SUBREG_REG (op);
445 mode = GET_MODE (op);
448 if (reload_in_progress && GET_CODE (op) == REG
449 && REGNO (op) >= FIRST_PSEUDO_REGISTER)
450 op = reg_equiv_mem[REGNO (op)];
452 if (GET_CODE (op) != MEM || GET_MODE (op) != mode
453 || ! memory_address_p (mode, XEXP (op, 0)))
458 if (GET_CODE (op) == PLUS)
461 return (GET_CODE (op) == REG
462 && REGNO_POINTER_ALIGN (REGNO (op)) >= 4);
465 /* Similar, but return 1 if OP is a MEM which is not alignable. */
468 unaligned_memory_operand (op, mode)
470 enum machine_mode mode;
472 if (GET_CODE (op) == SUBREG)
474 if (GET_MODE (op) != mode)
476 op = SUBREG_REG (op);
477 mode = GET_MODE (op);
480 if (reload_in_progress && GET_CODE (op) == REG
481 && REGNO (op) >= FIRST_PSEUDO_REGISTER)
482 op = reg_equiv_mem[REGNO (op)];
484 if (GET_CODE (op) != MEM || GET_MODE (op) != mode)
489 if (! memory_address_p (mode, op))
492 if (GET_CODE (op) == PLUS)
495 return (GET_CODE (op) != REG
496 || REGNO_POINTER_ALIGN (REGNO (op)) < 4);
499 /* Return 1 if OP is either a register or an unaligned memory location. */
502 reg_or_unaligned_mem_operand (op, mode)
504 enum machine_mode mode;
506 return register_operand (op, mode) || unaligned_memory_operand (op, mode);
509 /* Return 1 if OP is any memory location. During reload a pseudo matches. */
512 any_memory_operand (op, mode)
514 enum machine_mode mode;
516 return (GET_CODE (op) == MEM
517 || (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == REG)
518 || (reload_in_progress && GET_CODE (op) == REG
519 && REGNO (op) >= FIRST_PSEUDO_REGISTER)
520 || (reload_in_progress && GET_CODE (op) == SUBREG
521 && GET_CODE (SUBREG_REG (op)) == REG
522 && REGNO (SUBREG_REG (op)) >= FIRST_PSEUDO_REGISTER));
525 /* REF is an alignable memory location. Place an aligned SImode
526 reference into *PALIGNED_MEM and the number of bits to shift into
530 get_aligned_mem (ref, paligned_mem, pbitnum)
532 rtx *paligned_mem, *pbitnum;
535 HOST_WIDE_INT offset = 0;
537 if (GET_CODE (ref) == SUBREG)
539 offset = SUBREG_WORD (ref) * UNITS_PER_WORD;
540 if (BYTES_BIG_ENDIAN)
541 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (ref)))
542 - MIN (UNITS_PER_WORD,
543 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref)))));
544 ref = SUBREG_REG (ref);
547 if (GET_CODE (ref) == REG)
548 ref = reg_equiv_mem[REGNO (ref)];
550 if (reload_in_progress)
551 base = find_replacement (&XEXP (ref, 0));
553 base = XEXP (ref, 0);
555 if (GET_CODE (base) == PLUS)
556 offset += INTVAL (XEXP (base, 1)), base = XEXP (base, 0);
558 *paligned_mem = gen_rtx (MEM, SImode,
559 plus_constant (base, offset & ~3));
560 MEM_IN_STRUCT_P (*paligned_mem) = MEM_IN_STRUCT_P (ref);
561 MEM_VOLATILE_P (*paligned_mem) = MEM_VOLATILE_P (ref);
562 RTX_UNCHANGING_P (*paligned_mem) = RTX_UNCHANGING_P (ref);
564 *pbitnum = GEN_INT ((offset & 3) * 8);
567 /* Similar, but just get the address. Handle the two reload cases.
568 Add EXTRA_OFFSET to the address we return. */
571 get_unaligned_address (ref, extra_offset)
576 HOST_WIDE_INT offset = 0;
578 if (GET_CODE (ref) == SUBREG)
580 offset = SUBREG_WORD (ref) * UNITS_PER_WORD;
581 if (BYTES_BIG_ENDIAN)
582 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (ref)))
583 - MIN (UNITS_PER_WORD,
584 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref)))));
585 ref = SUBREG_REG (ref);
588 if (GET_CODE (ref) == REG)
589 ref = reg_equiv_mem[REGNO (ref)];
591 if (reload_in_progress)
592 base = find_replacement (&XEXP (ref, 0));
594 base = XEXP (ref, 0);
596 if (GET_CODE (base) == PLUS)
597 offset += INTVAL (XEXP (base, 1)), base = XEXP (base, 0);
599 return plus_constant (base, offset + extra_offset);
602 /* Subfunction of the following function. Update the flags of any MEM
603 found in part of X. */
606 alpha_set_memflags_1 (x, in_struct_p, volatile_p, unchanging_p)
608 int in_struct_p, volatile_p, unchanging_p;
612 switch (GET_CODE (x))
616 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
617 alpha_set_memflags_1 (XVECEXP (x, 0, i), in_struct_p, volatile_p,
622 alpha_set_memflags_1 (PATTERN (x), in_struct_p, volatile_p,
627 alpha_set_memflags_1 (SET_DEST (x), in_struct_p, volatile_p,
629 alpha_set_memflags_1 (SET_SRC (x), in_struct_p, volatile_p,
634 MEM_IN_STRUCT_P (x) = in_struct_p;
635 MEM_VOLATILE_P (x) = volatile_p;
636 RTX_UNCHANGING_P (x) = unchanging_p;
641 /* Given INSN, which is either an INSN or a SEQUENCE generated to
642 perform a memory operation, look for any MEMs in either a SET_DEST or
643 a SET_SRC and copy the in-struct, unchanging, and volatile flags from
644 REF into each of the MEMs found. If REF is not a MEM, don't do
648 alpha_set_memflags (insn, ref)
652 /* Note that it is always safe to get these flags, though they won't
653 be what we think if REF is not a MEM. */
654 int in_struct_p = MEM_IN_STRUCT_P (ref);
655 int volatile_p = MEM_VOLATILE_P (ref);
656 int unchanging_p = RTX_UNCHANGING_P (ref);
658 if (GET_CODE (ref) != MEM
659 || (! in_struct_p && ! volatile_p && ! unchanging_p))
662 alpha_set_memflags_1 (insn, in_struct_p, volatile_p, unchanging_p);
665 /* Try to output insns to set TARGET equal to the constant C if it can be
666 done in less than N insns. Do all computations in MODE. Returns the place
667 where the output has been placed if it can be done and the insns have been
668 emitted. If it would take more than N insns, zero is returned and no
669 insns and emitted. */
672 alpha_emit_set_const (target, mode, c, n)
674 enum machine_mode mode;
678 HOST_WIDE_INT new = c;
680 /* Use a pseudo if highly optimizing and still generating RTL. */
682 = (flag_expensive_optimizations && rtx_equal_function_value_matters
686 #if HOST_BITS_PER_WIDE_INT == 64
687 /* We are only called for SImode and DImode. If this is SImode, ensure that
688 we are sign extended to a full word. This does not make any sense when
689 cross-compiling on a narrow machine. */
692 c = (c & 0xffffffff) - 2 * (c & 0x80000000);
695 /* If this is a sign-extended 32-bit constant, we can do this in at most
696 three insns, so do it if we have enough insns left. We always have
697 a sign-extended 32-bit constant when compiling on a narrow machine.
698 Note that we cannot handle the constant 0x80000000. */
700 if ((HOST_BITS_PER_WIDE_INT != 64
701 || c >> 31 == -1 || c >> 31 == 0)
704 HOST_WIDE_INT low = (c & 0xffff) - 2 * (c & 0x8000);
705 HOST_WIDE_INT tmp1 = c - low;
707 = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
708 HOST_WIDE_INT extra = 0;
710 /* If HIGH will be interpreted as negative but the constant is
711 positive, we must adjust it to do two ldha insns. */
713 if ((high & 0x8000) != 0 && c >= 0)
717 high = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
720 if (c == low || (low == 0 && extra == 0))
721 return copy_to_suggested_reg (GEN_INT (c), target, mode);
722 else if (n >= 2 + (extra != 0)
723 /* We can't do this when SImode if HIGH required adjustment.
724 This is because the code relies on an implicit overflow
725 which is invisible to the RTL. We can thus get incorrect
726 code if the two ldah instructions are combined. */
727 && ! (mode == SImode && extra != 0))
729 temp = copy_to_suggested_reg (GEN_INT (low), subtarget, mode);
732 temp = expand_binop (mode, add_optab, temp, GEN_INT (extra << 16),
733 subtarget, 0, OPTAB_WIDEN);
735 return expand_binop (mode, add_optab, temp, GEN_INT (high << 16),
736 target, 0, OPTAB_WIDEN);
740 /* If we couldn't do it that way, try some other methods. But if we have
741 no instructions left, don't bother. Likewise, if this is SImode and
742 we can't make pseudos, we can't do anything since the expand_binop
743 and expand_unop calls will widen and try to make pseudos. */
746 || (mode == SImode && ! rtx_equal_function_value_matters))
749 #if HOST_BITS_PER_WIDE_INT == 64
750 /* First, see if can load a value into the target that is the same as the
751 constant except that all bytes that are 0 are changed to be 0xff. If we
752 can, then we can do a ZAPNOT to obtain the desired constant. */
754 for (i = 0; i < 64; i += 8)
755 if ((new & ((HOST_WIDE_INT) 0xff << i)) == 0)
756 new |= (HOST_WIDE_INT) 0xff << i;
758 /* We are only called for SImode and DImode. If this is SImode, ensure that
759 we are sign extended to a full word. */
762 new = (new & 0xffffffff) - 2 * (new & 0x80000000);
765 && (temp = alpha_emit_set_const (subtarget, mode, new, n - 1)) != 0)
766 return expand_binop (mode, and_optab, temp, GEN_INT (c | ~ new),
767 target, 0, OPTAB_WIDEN);
770 /* Next, see if we can load a related constant and then shift and possibly
771 negate it to get the constant we want. Try this once each increasing
774 for (i = 1; i < n; i++)
776 /* First try complementing. */
777 if ((temp = alpha_emit_set_const (subtarget, mode, ~ c, i)) != 0)
778 return expand_unop (mode, one_cmpl_optab, temp, target, 0);
780 /* Next try to form a constant and do a left shift. We can do this
781 if some low-order bits are zero; the exact_log2 call below tells
782 us that information. The bits we are shifting out could be any
783 value, but here we'll just try the 0- and sign-extended forms of
784 the constant. To try to increase the chance of having the same
785 constant in more than one insn, start at the highest number of
786 bits to shift, but try all possibilities in case a ZAPNOT will
789 if ((bits = exact_log2 (c & - c)) > 0)
790 for (; bits > 0; bits--)
791 if ((temp = (alpha_emit_set_const
793 (unsigned HOST_WIDE_INT) c >> bits, i))) != 0
794 || ((temp = (alpha_emit_set_const
796 ((unsigned HOST_WIDE_INT) c) >> bits, i)))
798 return expand_binop (mode, ashl_optab, temp, GEN_INT (bits),
799 target, 0, OPTAB_WIDEN);
801 /* Now try high-order zero bits. Here we try the shifted-in bits as
802 all zero and all ones. Be careful to avoid shifting outside the
803 mode and to avoid shifting outside the host wide int size. */
805 if ((bits = (MIN (HOST_BITS_PER_WIDE_INT, GET_MODE_SIZE (mode) * 8)
806 - floor_log2 (c) - 1)) > 0)
807 for (; bits > 0; bits--)
808 if ((temp = alpha_emit_set_const (subtarget, mode,
810 || ((temp = (alpha_emit_set_const
812 ((c << bits) | (((HOST_WIDE_INT) 1 << bits) - 1)),
815 return expand_binop (mode, lshr_optab, temp, GEN_INT (bits),
816 target, 1, OPTAB_WIDEN);
818 /* Now try high-order 1 bits. We get that with a sign-extension.
819 But one bit isn't enough here. Be careful to avoid shifting outside
820 the mode and to avoid shifting outside the host wide int size. */
822 if ((bits = (MIN (HOST_BITS_PER_WIDE_INT, GET_MODE_SIZE (mode) * 8)
823 - floor_log2 (~ c) - 2)) > 0)
824 for (; bits > 0; bits--)
825 if ((temp = alpha_emit_set_const (subtarget, mode,
827 || ((temp = (alpha_emit_set_const
829 ((c << bits) | (((HOST_WIDE_INT) 1 << bits) - 1)),
832 return expand_binop (mode, ashr_optab, temp, GEN_INT (bits),
833 target, 0, OPTAB_WIDEN);
839 /* Adjust the cost of a scheduling dependency. Return the new cost of
840 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
843 alpha_adjust_cost (insn, link, dep_insn, cost)
851 /* If the dependence is an anti-dependence, there is no cost. For an
852 output dependence, there is sometimes a cost, but it doesn't seem
853 worth handling those few cases. */
855 if (REG_NOTE_KIND (link) != 0)
858 /* If INSN is a store insn and DEP_INSN is setting the data being stored,
859 we can sometimes lower the cost. */
861 if (recog_memoized (insn) >= 0 && get_attr_type (insn) == TYPE_ST
862 && (set = single_set (dep_insn)) != 0
863 && GET_CODE (PATTERN (insn)) == SET
864 && rtx_equal_p (SET_DEST (set), SET_SRC (PATTERN (insn))))
865 switch (get_attr_type (dep_insn))
868 /* No savings here. */
873 /* In these cases, we save one cycle. */
877 /* In all other cases, we save two cycles. */
878 return MAX (0, cost - 4);
881 /* Another case that needs adjustment is an arithmetic or logical
882 operation. It's cost is usually one cycle, but we default it to
883 two in the MD file. The only case that it is actually two is
884 for the address in loads and stores. */
886 if (recog_memoized (dep_insn) >= 0
887 && get_attr_type (dep_insn) == TYPE_IADDLOG)
888 switch (get_attr_type (insn))
898 /* The final case is when a compare feeds into an integer branch. The cost
899 is only one cycle in that case. */
901 if (recog_memoized (dep_insn) >= 0
902 && get_attr_type (dep_insn) == TYPE_ICMP
903 && recog_memoized (insn) >= 0
904 && get_attr_type (insn) == TYPE_IBR)
907 /* Otherwise, return the default cost. */
912 /* Print an operand. Recognize special options, documented below. */
915 print_operand (file, x, code)
925 /* If this operand is the constant zero, write it as "$31". */
926 if (GET_CODE (x) == REG)
927 fprintf (file, "%s", reg_names[REGNO (x)]);
928 else if (x == CONST0_RTX (GET_MODE (x)))
929 fprintf (file, "$31");
931 output_operand_lossage ("invalid %%r value");
936 /* Similar, but for floating-point. */
937 if (GET_CODE (x) == REG)
938 fprintf (file, "%s", reg_names[REGNO (x)]);
939 else if (x == CONST0_RTX (GET_MODE (x)))
940 fprintf (file, "$f31");
942 output_operand_lossage ("invalid %%R value");
947 /* Write the 1's complement of a constant. */
948 if (GET_CODE (x) != CONST_INT)
949 output_operand_lossage ("invalid %%N value");
951 fprintf (file, "%ld", ~ INTVAL (x));
955 /* Write 1 << C, for a constant C. */
956 if (GET_CODE (x) != CONST_INT)
957 output_operand_lossage ("invalid %%P value");
959 fprintf (file, "%ld", (HOST_WIDE_INT) 1 << INTVAL (x));
963 /* Write the high-order 16 bits of a constant, sign-extended. */
964 if (GET_CODE (x) != CONST_INT)
965 output_operand_lossage ("invalid %%h value");
967 fprintf (file, "%ld", INTVAL (x) >> 16);
971 /* Write the low-order 16 bits of a constant, sign-extended. */
972 if (GET_CODE (x) != CONST_INT)
973 output_operand_lossage ("invalid %%L value");
975 fprintf (file, "%ld", (INTVAL (x) & 0xffff) - 2 * (INTVAL (x) & 0x8000));
979 /* Write mask for ZAP insn. */
980 if (GET_CODE (x) == CONST_DOUBLE)
982 HOST_WIDE_INT mask = 0;
985 value = CONST_DOUBLE_LOW (x);
986 for (i = 0; i < HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR;
991 value = CONST_DOUBLE_HIGH (x);
992 for (i = 0; i < HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR;
995 mask |= (1 << (i + sizeof (int)));
997 fprintf (file, "%ld", mask & 0xff);
1000 else if (GET_CODE (x) == CONST_INT)
1002 HOST_WIDE_INT mask = 0, value = INTVAL (x);
1004 for (i = 0; i < 8; i++, value >>= 8)
1008 fprintf (file, "%ld", mask);
1011 output_operand_lossage ("invalid %%m value");
1015 /* 'b', 'w', or 'l' as the value of the constant. */
1016 if (GET_CODE (x) != CONST_INT
1017 || (INTVAL (x) != 8 && INTVAL (x) != 16 && INTVAL (x) != 32))
1018 output_operand_lossage ("invalid %%M value");
1020 fprintf (file, "%s",
1021 INTVAL (x) == 8 ? "b" : INTVAL (x) == 16 ? "w" : "l");
1025 /* Similar, except do it from the mask. */
1026 if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xff)
1027 fprintf (file, "b");
1028 else if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xffff)
1029 fprintf (file, "w");
1030 #if HOST_BITS_PER_WIDE_INT == 32
1031 else if (GET_CODE (x) == CONST_DOUBLE
1032 && CONST_DOUBLE_HIGH (x) == 0
1033 && CONST_DOUBLE_LOW (x) == -1)
1034 fprintf (file, "l");
1036 else if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xffffffff)
1037 fprintf (file, "l");
1040 output_operand_lossage ("invalid %%U value");
1044 /* Write the constant value divided by 8. */
1045 if (GET_CODE (x) != CONST_INT
1046 && (unsigned HOST_WIDE_INT) INTVAL (x) >= 64
1047 && (INTVAL (x) & 7) != 8)
1048 output_operand_lossage ("invalid %%s value");
1050 fprintf (file, "%ld", INTVAL (x) / 8);
1054 /* Same, except compute (64 - c) / 8 */
1056 if (GET_CODE (x) != CONST_INT
1057 && (unsigned HOST_WIDE_INT) INTVAL (x) >= 64
1058 && (INTVAL (x) & 7) != 8)
1059 output_operand_lossage ("invalid %%s value");
1061 fprintf (file, "%ld", (64 - INTVAL (x)) / 8);
1065 /* Write out comparison name. */
1066 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
1067 output_operand_lossage ("invalid %%C value");
1069 if (GET_CODE (x) == LEU)
1070 fprintf (file, "ule");
1071 else if (GET_CODE (x) == LTU)
1072 fprintf (file, "ult");
1074 fprintf (file, "%s", GET_RTX_NAME (GET_CODE (x)));
1078 /* Similar, but write reversed code. We can't get an unsigned code
1080 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
1081 output_operand_lossage ("invalid %%D value");
1083 fprintf (file, "%s", GET_RTX_NAME (reverse_condition (GET_CODE (x))));
1087 /* Similar to `c', but swap. We can't get unsigned here either. */
1088 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
1089 output_operand_lossage ("invalid %%D value");
1091 fprintf (file, "%s", GET_RTX_NAME (swap_condition (GET_CODE (x))));
1095 /* Similar, but reverse and swap. We can't get unsigned here either. */
1096 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
1097 output_operand_lossage ("invalid %%D value");
1099 fprintf (file, "%s",
1100 GET_RTX_NAME (swap_condition (reverse_condition ((GET_CODE (x))))));
1104 /* Write the divide or modulus operator. */
1105 switch (GET_CODE (x))
1108 fprintf (file, "div%s", GET_MODE (x) == SImode ? "l" : "q");
1111 fprintf (file, "div%su", GET_MODE (x) == SImode ? "l" : "q");
1114 fprintf (file, "rem%s", GET_MODE (x) == SImode ? "l" : "q");
1117 fprintf (file, "rem%su", GET_MODE (x) == SImode ? "l" : "q");
1120 output_operand_lossage ("invalid %%E value");
1126 /* Write "_u" for unaligned access. */
1127 if (GET_CODE (x) == MEM && GET_CODE (XEXP (x, 0)) == AND)
1128 fprintf (file, "_u");
1132 if (GET_CODE (x) == REG)
1133 fprintf (file, "%s", reg_names[REGNO (x)]);
1134 else if (GET_CODE (x) == MEM)
1135 output_address (XEXP (x, 0));
1137 output_addr_const (file, x);
1141 output_operand_lossage ("invalid %%xn code");
1145 /* Do what is necessary for `va_start'. The argument is ignored;
1146 We look at the current function to determine if stdarg or varargs
1147 is used and fill in an initial va_list. A pointer to this constructor
1151 alpha_builtin_saveregs (arglist)
1154 rtx block, addr, argsize;
1155 tree fntype = TREE_TYPE (current_function_decl);
1156 int stdarg = (TYPE_ARG_TYPES (fntype) != 0
1157 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype)))
1158 != void_type_node));
1160 /* Compute the current position into the args, taking into account
1161 both registers and memory. Both of these are already included in
1162 current_function_args_info. */
1164 argsize = GEN_INT (current_function_args_info * UNITS_PER_WORD);
1166 /* SETUP_INCOMING_VARARGS moves the starting address base up by 48,
1167 storing fp arg registers in the first 48 bytes, and the integer arg
1168 registers in the next 48 bytes. This is only done, however, if any
1169 integer registers need to be stored.
1171 If no integer registers need be stored, then we must subtract 48 in
1172 order to account for the integer arg registers which are counted in
1173 argsize above, but which are not actually stored on the stack. */
1175 addr = (current_function_args_info <= 5 + stdarg
1176 ? plus_constant (virtual_incoming_args_rtx, 6 * UNITS_PER_WORD)
1177 : plus_constant (virtual_incoming_args_rtx, - (6 * UNITS_PER_WORD)));
1179 addr = force_operand (addr, NULL_RTX);
1181 /* Allocate the va_list constructor */
1182 block = assign_stack_local (BLKmode, 2 * UNITS_PER_WORD, BITS_PER_WORD);
1183 RTX_UNCHANGING_P (block) = 1;
1184 RTX_UNCHANGING_P (XEXP (block, 0)) = 1;
1186 /* Store the address of the first integer register in the __base member. */
1188 #ifdef POINTERS_EXTEND_UNSIGNED
1189 addr = convert_memory_address (ptr_mode, addr);
1192 emit_move_insn (change_address (block, ptr_mode, XEXP (block, 0)), addr);
1194 /* Store the argsize as the __va_offset member. */
1195 emit_move_insn (change_address (block, TYPE_MODE (integer_type_node),
1196 plus_constant (XEXP (block, 0),
1197 POINTER_SIZE/BITS_PER_UNIT)),
1200 /* Return the address of the va_list constructor, but don't put it in a
1201 register. Doing so would fail when not optimizing and produce worse
1202 code when optimizing. */
1203 return XEXP (block, 0);
1206 /* This page contains routines that are used to determine what the function
1207 prologue and epilogue code will do and write them out. */
1209 /* Compute the size of the save area in the stack. */
1217 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1218 if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i])
1221 /* If some registers were saved but not reg 26, reg 26 must also
1222 be saved, so leave space for it. */
1223 if (size != 0 && ! regs_ever_live[26])
1226 /* Our size must be even (multiple of 16 bytes). */
1233 /* Return 1 if this function can directly return via $26. */
1238 return (reload_completed && alpha_sa_size () == 0
1239 && get_frame_size () == 0
1240 && current_function_outgoing_args_size == 0
1241 && current_function_pretend_args_size == 0);
1244 /* Write a version stamp. Don't write anything if we are running as a
1245 cross-compiler. Otherwise, use the versions in /usr/include/stamp.h. */
1247 #if !defined(CROSS_COMPILE) && !defined(_WIN32)
1252 alpha_write_verstamp (file)
1256 fprintf (file, "\t.verstamp %d %d\n", MS_STAMP, LS_STAMP);
1260 /* Write code to add constant C to register number IN_REG (possibly 31)
1261 and put the result into OUT_REG. Use TEMP_REG as a scratch register;
1262 usually this will be OUT_REG, but should not be if OUT_REG is
1263 STACK_POINTER_REGNUM, since it must be updated in a single instruction.
1264 Write the code to FILE. */
1267 add_long_const (file, c, in_reg, out_reg, temp_reg)
1270 int in_reg, out_reg, temp_reg;
1272 HOST_WIDE_INT low = (c & 0xffff) - 2 * (c & 0x8000);
1273 HOST_WIDE_INT tmp1 = c - low;
1274 HOST_WIDE_INT high = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
1275 HOST_WIDE_INT extra = 0;
1277 /* We don't have code to write out constants larger than 32 bits. */
1278 #if HOST_BITS_PER_LONG_INT == 64
1279 if ((unsigned HOST_WIDE_INT) c >> 32 != 0)
1283 /* If HIGH will be interpreted as negative, we must adjust it to do two
1284 ldha insns. Note that we will never be building a negative constant
1291 high = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
1296 int result_reg = (extra == 0 && high == 0) ? out_reg : temp_reg;
1298 if (low >= 0 && low < 255)
1299 fprintf (file, "\taddq $%d,%d,$%d\n", in_reg, low, result_reg);
1301 fprintf (file, "\tlda $%d,%d($%d)\n", result_reg, low, in_reg);
1303 in_reg = result_reg;
1308 int result_reg = (high == 0) ? out_reg : temp_reg;
1310 fprintf (file, "\tldah $%d,%d($%d)\n", result_reg, extra, in_reg);
1311 in_reg = result_reg;
1315 fprintf (file, "\tldah $%d,%d($%d)\n", out_reg, high, in_reg);
1318 /* Write function prologue. */
1321 output_prolog (file, size)
1325 HOST_WIDE_INT out_args_size
1326 = ALPHA_ROUND (current_function_outgoing_args_size);
1327 HOST_WIDE_INT sa_size = alpha_sa_size ();
1328 HOST_WIDE_INT frame_size
1329 = (out_args_size + sa_size
1330 + ALPHA_ROUND (size + current_function_pretend_args_size));
1331 HOST_WIDE_INT reg_offset = out_args_size;
1332 HOST_WIDE_INT start_reg_offset = reg_offset;
1333 HOST_WIDE_INT actual_start_reg_offset = start_reg_offset;
1334 int int_reg_save_area_size = 0;
1336 unsigned reg_mask = 0;
1339 /* Ecoff can handle multiple .file directives, so put out file and lineno.
1340 We have to do that before the .ent directive as we cannot switch
1341 files within procedures with native ecoff because line numbers are
1342 linked to procedure descriptors.
1343 Outputting the lineno helps debugging of one line functions as they
1344 would otherwise get no line number at all. Please note that we would
1345 like to put out last_linenum from final.c, but it is not accessible. */
1347 if (write_symbols == SDB_DEBUG)
1349 ASM_OUTPUT_SOURCE_FILENAME (file,
1350 DECL_SOURCE_FILE (current_function_decl));
1351 if (debug_info_level != DINFO_LEVEL_TERSE)
1352 ASM_OUTPUT_SOURCE_LINE (file,
1353 DECL_SOURCE_LINE (current_function_decl));
1356 /* The assembly language programmer's guide states that the second argument
1357 to the .ent directive, the lex_level, is ignored by the assembler,
1358 so we might as well omit it. */
1360 fprintf (file, "\t.ent ");
1361 assemble_name (file, alpha_function_name);
1362 fprintf (file, "\n");
1363 ASM_OUTPUT_LABEL (file, alpha_function_name);
1364 inside_function = TRUE;
1366 /* Set up offsets to alpha virtual arg/local debugging pointer. */
1368 alpha_auto_offset = -frame_size + current_function_pretend_args_size;
1369 alpha_arg_offset = -frame_size + 48;
1371 /* If we need a GP (we have a LDSYM insn or a CALL_INSN), load it first.
1372 Even if we are a static function, we still need to do this in case
1373 our address is taken and passed to something like qsort.
1375 We never need a GP for Windows/NT. */
1377 alpha_function_needs_gp = 0;
1378 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
1379 if ((GET_CODE (insn) == CALL_INSN)
1380 || (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
1381 && GET_CODE (PATTERN (insn)) != USE
1382 && GET_CODE (PATTERN (insn)) != CLOBBER
1383 && (get_attr_type (insn) == TYPE_LDSYM
1384 || get_attr_type (insn) == TYPE_ISUBR)))
1386 alpha_function_needs_gp = 1;
1390 if (WINDOWS_NT == 0)
1392 if (alpha_function_needs_gp)
1393 fprintf (file, "\tldgp $29,0($27)\n");
1395 /* Put a label after the GP load so we can enter the function at it. */
1396 assemble_name (file, alpha_function_name);
1397 fprintf (file, "..ng:\n");
1400 /* Adjust the stack by the frame size. If the frame size is > 4096
1401 bytes, we need to be sure we probe somewhere in the first and last
1402 4096 bytes (we can probably get away without the latter test) and
1403 every 8192 bytes in between. If the frame size is > 32768, we
1404 do this in a loop. Otherwise, we generate the explicit probe
1407 Note that we are only allowed to adjust sp once in the prologue. */
1409 if (frame_size < 32768)
1411 if (frame_size > 4096)
1415 fprintf (file, "\tstq $31,-%d($30)\n", probed);
1417 while (probed + 8192 < frame_size)
1418 fprintf (file, "\tstq $31,-%d($30)\n", probed += 8192);
1420 /* We only have to do this probe if we aren't saving registers. */
1421 if (sa_size == 0 && probed + 4096 < frame_size)
1422 fprintf (file, "\tstq $31,-%d($30)\n", frame_size);
1425 if (frame_size != 0)
1426 fprintf (file, "\tlda $30,-%d($30)\n", frame_size);
1430 /* Here we generate code to set R4 to SP + 4096 and set R5 to the
1431 number of 8192 byte blocks to probe. We then probe each block
1432 in the loop and then set SP to the proper location. If the
1433 amount remaining is > 4096, we have to do one more probe if we
1434 are not saving any registers. */
1436 HOST_WIDE_INT blocks = (frame_size + 4096) / 8192;
1437 HOST_WIDE_INT leftover = frame_size + 4096 - blocks * 8192;
1439 add_long_const (file, blocks, 31, 5, 5);
1441 fprintf (file, "\tlda $4,4096($30)\n");
1443 assemble_name (file, alpha_function_name);
1444 fprintf (file, "..sc:\n");
1446 fprintf (file, "\tstq $31,-8192($4)\n");
1447 fprintf (file, "\tsubq $5,1,$5\n");
1448 fprintf (file, "\tlda $4,-8192($4)\n");
1450 fprintf (file, "\tbne $5,");
1451 assemble_name (file, alpha_function_name);
1452 fprintf (file, "..sc\n");
1454 if (leftover > 4096 && sa_size == 0)
1455 fprintf (file, "\tstq $31,-%d($4)\n", leftover);
1457 fprintf (file, "\tlda $30,-%d($4)\n", leftover);
1460 /* Describe our frame. */
1461 fprintf (file, "\t.frame $%d,%d,$26,%d\n",
1462 (frame_pointer_needed
1463 ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM),
1464 frame_size, current_function_pretend_args_size);
1466 /* Save register 26 if any other register needs to be saved. */
1469 reg_mask |= 1 << 26;
1470 fprintf (file, "\tstq $26,%d($30)\n", reg_offset);
1472 int_reg_save_area_size += 8;
1475 /* Now save any other used integer registers required to be saved. */
1476 for (i = 0; i < 32; i++)
1477 if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i] && i != 26)
1480 fprintf (file, "\tstq $%d,%d($30)\n", i, reg_offset);
1482 int_reg_save_area_size += 8;
1485 /* Print the register mask and do floating-point saves. */
1487 fprintf (file, "\t.mask 0x%x,%d\n", reg_mask,
1488 actual_start_reg_offset - frame_size);
1490 start_reg_offset = reg_offset;
1493 for (i = 0; i < 32; i++)
1494 if (! fixed_regs[i + 32] && ! call_used_regs[i + 32]
1495 && regs_ever_live[i + 32])
1498 fprintf (file, "\tstt $f%d,%d($30)\n", i, reg_offset);
1502 /* Print the floating-point mask, if we've saved any fp register. */
1504 fprintf (file, "\t.fmask 0x%x,%d\n", reg_mask,
1505 actual_start_reg_offset - frame_size + int_reg_save_area_size);
1507 /* If we need a frame pointer, set it from the stack pointer. Note that
1508 this must always be the last instruction in the prologue. */
1509 if (frame_pointer_needed)
1510 fprintf (file, "\tbis $30,$30,$15\n");
1512 /* End the prologue and say if we used gp. */
1513 fprintf (file, "\t.prologue %d\n", alpha_function_needs_gp);
1516 /* Write function epilogue. */
1519 output_epilog (file, size)
1523 rtx insn = get_last_insn ();
1524 HOST_WIDE_INT out_args_size
1525 = ALPHA_ROUND (current_function_outgoing_args_size);
1526 HOST_WIDE_INT sa_size = alpha_sa_size ();
1527 HOST_WIDE_INT frame_size
1528 = (out_args_size + sa_size
1529 + ALPHA_ROUND (size + current_function_pretend_args_size));
1530 HOST_WIDE_INT reg_offset = out_args_size;
1531 HOST_WIDE_INT frame_size_from_reg_save = frame_size - reg_offset;
1533 = frame_pointer_needed && regs_ever_live[HARD_FRAME_POINTER_REGNUM];
1536 /* If the last insn was a BARRIER, we don't have to write anything except
1537 the .end pseudo-op. */
1538 if (GET_CODE (insn) == NOTE)
1539 insn = prev_nonnote_insn (insn);
1540 if (insn == 0 || GET_CODE (insn) != BARRIER)
1544 /* If we have a frame pointer, restore SP from it. */
1545 if (frame_pointer_needed)
1546 fprintf (file, "\tbis $15,$15,$30\n");
1548 /* Restore all the registers, starting with the return address
1552 fprintf (file, "\tldq $26,%d($30)\n", reg_offset);
1556 /* Now restore any other used integer registers that that we saved,
1557 except for FP if it is being used as FP, since it must be
1560 for (i = 0; i < 32; i++)
1561 if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i]
1564 if (i == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed)
1565 fp_offset = reg_offset;
1567 fprintf (file, "\tldq $%d,%d($30)\n", i, reg_offset);
1571 for (i = 0; i < 32; i++)
1572 if (! fixed_regs[i + 32] && ! call_used_regs[i + 32]
1573 && regs_ever_live[i + 32])
1575 fprintf (file, "\tldt $f%d,%d($30)\n", i, reg_offset);
1579 /* If the stack size is large and we have a frame pointer, compute the
1580 size of the stack into a register because the old FP restore, stack
1581 pointer adjust, and return are required to be consecutive
1583 if (frame_size > 32767 && restore_fp)
1584 add_long_const (file, frame_size, 31, 1, 1);
1586 /* If we needed a frame pointer and we have to restore it, do it
1587 now. This must be done in one instruction immediately
1588 before the SP update. */
1589 if (restore_fp && fp_offset)
1590 fprintf (file, "\tldq $15,%d($30)\n", fp_offset);
1592 /* Now update the stack pointer, if needed. Only one instruction must
1593 modify the stack pointer. It must be the last instruction in the
1594 sequence and must be an ADDQ or LDA instruction. If the frame
1595 pointer was loaded above, we may only put one instruction here. */
1597 if (frame_size > 32768 && restore_fp)
1598 fprintf (file, "\taddq $1,$30,$30\n");
1600 add_long_const (file, frame_size, 30, 30, 1);
1602 /* Finally return to the caller. */
1603 fprintf (file, "\tret $31,($26),1\n");
1606 /* End the function. */
1607 fprintf (file, "\t.end ");
1608 assemble_name (file, alpha_function_name);
1609 fprintf (file, "\n");
1610 inside_function = FALSE;
1612 /* Show that we know this function if it is called again. */
1613 SYMBOL_REF_FLAG (XEXP (DECL_RTL (current_function_decl), 0)) = 1;
1616 /* Debugging support. */
1620 /* Count the number of sdb related labels are generated (to find block
1621 start and end boundaries). */
1623 int sdb_label_count = 0;
1625 /* Next label # for each statement. */
1627 static int sym_lineno = 0;
1629 /* Count the number of .file directives, so that .loc is up to date. */
1631 static int num_source_filenames = 0;
1633 /* Name of the file containing the current function. */
1635 static char *current_function_file = "";
1637 /* Offsets to alpha virtual arg/local debugging pointers. */
1639 long alpha_arg_offset;
1640 long alpha_auto_offset;
1642 /* Emit a new filename to a stream. */
1645 alpha_output_filename (stream, name)
1649 static int first_time = TRUE;
1650 char ltext_label_name[100];
1655 ++num_source_filenames;
1656 current_function_file = name;
1657 fprintf (stream, "\t.file\t%d ", num_source_filenames);
1658 output_quoted_string (stream, name);
1659 fprintf (stream, "\n");
1660 if (!TARGET_GAS && write_symbols == DBX_DEBUG)
1661 fprintf (stream, "\t#@stabs\n");
1664 else if (!TARGET_GAS && write_symbols == DBX_DEBUG)
1666 ASM_GENERATE_INTERNAL_LABEL (ltext_label_name, "Ltext", 0);
1667 fprintf (stream, "%s ", ASM_STABS_OP);
1668 output_quoted_string (stream, name);
1669 fprintf (stream, ",%d,0,0,%s\n", N_SOL, <ext_label_name[1]);
1672 else if (name != current_function_file
1673 && strcmp (name, current_function_file) != 0)
1675 if (inside_function && ! TARGET_GAS)
1676 fprintf (stream, "\t#.file\t%d ", num_source_filenames);
1679 ++num_source_filenames;
1680 current_function_file = name;
1681 fprintf (stream, "\t.file\t%d ", num_source_filenames);
1684 output_quoted_string (stream, name);
1685 fprintf (stream, "\n");
1689 /* Emit a linenumber to a stream. */
1692 alpha_output_lineno (stream, line)
1696 if (! TARGET_GAS && write_symbols == DBX_DEBUG)
1698 /* mips-tfile doesn't understand .stabd directives. */
1700 fprintf (stream, "$LM%d:\n\t%s %d,0,%d,$LM%d\n",
1701 sym_lineno, ASM_STABN_OP, N_SLINE, line, sym_lineno);
1704 fprintf (stream, "\n\t.loc\t%d %d\n", num_source_filenames, line);