1 /* Subroutines used for code generation on AMD Am29000.
2 Copyright (C) 1987, 1988, 1990, 1991, 1992, 1993, 1994, 1995, 1997, 1998,
3 1999, 2000 Free Software
5 Contributed by Richard Kenner (kenner@nyu.edu)
7 This file is part of GNU CC.
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING. If not, write to
21 the Free Software Foundation, 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
28 #include "hard-reg-set.h"
30 #include "insn-config.h"
31 #include "conditions.h"
33 #include "insn-attr.h"
43 #include "target-def.h"
45 static int shift_constant_operand PARAMS ((rtx, enum machine_mode, int));
46 static void a29k_set_memflags_1 PARAMS ((rtx, int, int, int, int));
47 static void compute_regstack_size PARAMS ((void));
48 static void check_epilogue_internal_label PARAMS ((FILE *));
50 #define min(A,B) ((A) < (B) ? (A) : (B))
52 /* This gives the size in words of the register stack for the current
55 static int a29k_regstack_size;
57 /* True if the current procedure has a call instruction. */
59 static int a29k_makes_calls;
61 /* This points to the last insn of the insn prologue. It is set when
62 an insn without a filled delay slot is found near the start of the
65 static char *a29k_last_prologue_insn;
67 /* This points to the first insn that will be in the epilogue. It is null if
68 no epilogue is required. */
70 static char *a29k_first_epilogue_insn;
72 /* This is nonzero if a a29k_first_epilogue_insn was put in a delay slot. It
73 indicates that an intermediate label needs to be written. */
75 static int a29k_first_epilogue_insn_used;
77 /* Location to hold the name of the current function. We need this prolog to
78 contain the tag words prior to the declaration. So the name must be stored
81 const char *a29k_function_name;
83 /* Mapping of registers to debug register numbers. The only change is
84 for the frame pointer and the register numbers used for the incoming
87 int a29k_debug_reg_map[FIRST_PSEUDO_REGISTER];
89 /* Save information from a "cmpxx" operation until the branch or scc is
92 rtx a29k_compare_op0, a29k_compare_op1;
93 int a29k_compare_fp_p;
95 /* Initialize the GCC target structure. */
97 struct gcc_target target = TARGET_INITIALIZER;
99 /* Returns 1 if OP is a 8-bit constant. */
102 cint_8_operand (op, mode)
104 enum machine_mode mode ATTRIBUTE_UNUSED;
106 return GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffffff00) == 0;
109 /* Returns 1 if OP is a 16-bit constant. */
112 cint_16_operand (op, mode)
114 enum machine_mode mode ATTRIBUTE_UNUSED;
116 return GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff0000) == 0;
119 /* Returns 1 if OP is a constant that cannot be moved in a single insn. */
122 long_const_operand (op, mode)
124 enum machine_mode mode ATTRIBUTE_UNUSED;
126 if (! CONSTANT_P (op))
129 if (TARGET_29050 && GET_CODE (op) == CONST_INT
130 && (INTVAL (op) & 0xffff) == 0)
133 return (GET_CODE (op) != CONST_INT
134 || ((INTVAL (op) & 0xffff0000) != 0
135 && (INTVAL (op) & 0xffff0000) != 0xffff0000
136 && INTVAL (op) != 0x80000000));
139 /* The following four functions detect constants of 0, 8, 16, and 24 used as
140 a position in ZERO_EXTRACT operations. They can either be the appropriate
141 constant integer or a shift (which will be produced by combine). */
144 shift_constant_operand (op, mode, val)
146 enum machine_mode mode ATTRIBUTE_UNUSED;
149 return ((GET_CODE (op) == CONST_INT && INTVAL (op) == val)
150 || (GET_CODE (op) == ASHIFT
151 && GET_CODE (XEXP (op, 0)) == CONST_INT
152 && INTVAL (XEXP (op, 0)) == val / 8
153 && GET_CODE (XEXP (op, 1)) == CONST_INT
154 && INTVAL (XEXP (op, 1)) == 3));
158 const_0_operand (op, mode)
160 enum machine_mode mode;
162 return shift_constant_operand (op, mode, 0);
166 const_8_operand (op, mode)
168 enum machine_mode mode;
170 return shift_constant_operand (op, mode, 8);
174 const_16_operand (op, mode)
176 enum machine_mode mode;
178 return shift_constant_operand (op, mode, 16);
182 const_24_operand (op, mode)
184 enum machine_mode mode;
186 return shift_constant_operand (op, mode, 24);
189 /* Returns 1 if OP is a floating-point constant of the proper mode. */
192 float_const_operand (op, mode)
194 enum machine_mode mode;
196 return GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == mode;
199 /* Returns 1 if OP is a floating-point constant of the proper mode or a
200 general-purpose register. */
203 gpc_reg_or_float_constant_operand (op, mode)
205 enum machine_mode mode;
207 return float_const_operand (op, mode) || gpc_reg_operand (op, mode);
210 /* Returns 1 if OP is an integer constant of the proper mode or a
211 general-purpose register. */
214 gpc_reg_or_integer_constant_operand (op, mode)
216 enum machine_mode mode;
218 return ((GET_MODE (op) == VOIDmode
219 && (GET_CODE (op) == CONST_INT || GET_CODE (op) == CONST_DOUBLE))
220 || gpc_reg_operand (op, mode));
223 /* Returns 1 if OP is a special machine register. */
226 spec_reg_operand (op, mode)
228 enum machine_mode mode;
230 if (GET_CODE (op) != REG || GET_MODE (op) != mode)
233 switch (GET_MODE_CLASS (mode))
235 case MODE_PARTIAL_INT:
236 return REGNO (op) >= R_BP && REGNO (op) <= R_CR;
238 return REGNO (op) >= R_Q && REGNO (op) <= R_EXO;
244 /* Returns 1 if OP is an accumulator register. */
247 accum_reg_operand (op, mode)
249 enum machine_mode mode ATTRIBUTE_UNUSED;
251 return (GET_CODE (op) == REG
252 && REGNO (op) >= R_ACU (0) && REGNO (op) <= R_ACU (3));
255 /* Returns 1 if OP is a normal data register. */
258 gpc_reg_operand (op, mode)
260 enum machine_mode mode;
264 if (GET_MODE (op) != mode && mode != VOIDmode)
267 if (GET_CODE (op) == REG)
269 else if (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == REG)
271 if (REGNO (SUBREG_REG (op)) < FIRST_PSEUDO_REGISTER)
272 regno = subreg_regno (op);
274 regno = REGNO (SUBREG_REG (op));
279 return (regno >= FIRST_PSEUDO_REGISTER || regno < R_BP
280 || (regno >= R_KR (0) && regno <= R_KR (31)));
283 /* Returns 1 if OP is either an 8-bit constant integer or a general register.
284 If a register, it must be in the proper mode unless MODE is VOIDmode. */
287 srcb_operand (op, mode)
289 enum machine_mode mode;
291 if (GET_CODE (op) == CONST_INT
293 || (INTVAL (op) & 0xffffff00) == 0))
296 if (GET_MODE (op) != mode && mode != VOIDmode)
299 return gpc_reg_operand (op, mode);
303 cmplsrcb_operand (op, mode)
305 enum machine_mode mode;
307 if (GET_CODE (op) == CONST_INT
309 || (INTVAL (op) & 0xffffff00) == 0xffffff00))
312 if (GET_MODE (op) != mode && mode != VOIDmode)
315 return gpc_reg_operand (op, mode);
318 /* Return 1 if OP is either an immediate or a general register. This is used
319 for the input operand of mtsr/mtrsim. */
322 gpc_reg_or_immediate_operand (op, mode)
324 enum machine_mode mode;
326 return gpc_reg_operand (op, mode) || immediate_operand (op, mode);
329 /* Return 1 if OP can be used as the second operand of and AND insn. This
330 includes srcb_operand and a constant whose complement fits in 8 bits. */
333 and_operand (op, mode)
335 enum machine_mode mode;
337 return (srcb_operand (op, mode)
338 || (GET_CODE (op) == CONST_INT
339 && ((unsigned) ((~ INTVAL (op)) & GET_MODE_MASK (mode)) < 256)));
342 /* Return 1 if OP can be used as the second operand of an ADD insn.
343 This is the same as above, except we use negative, rather than
347 add_operand (op, mode)
349 enum machine_mode mode;
351 return (srcb_operand (op, mode)
352 || (GET_CODE (op) == CONST_INT
353 && ((unsigned) ((- INTVAL (op)) & GET_MODE_MASK (mode)) < 256)));
356 /* Return 1 if OP is a valid address in a CALL_INSN. These are a SYMBOL_REF
357 to the current function, all SYMBOL_REFs if TARGET_SMALL_MEMORY, or
358 a sufficiently-small constant. */
361 call_operand (op, mode)
363 enum machine_mode mode ATTRIBUTE_UNUSED;
365 switch (GET_CODE (op))
368 return (TARGET_SMALL_MEMORY
369 || (! TARGET_LARGE_MEMORY
370 && ((GET_CODE (op) == SYMBOL_REF && SYMBOL_REF_FLAG (op))
371 || ! strcmp (XSTR (op, 0), current_function_name))));
374 return (unsigned HOST_WIDE_INT) INTVAL (op) < 0x40000;
381 /* Return 1 if OP can be used as the input operand for a move insn. */
384 in_operand (op, mode)
386 enum machine_mode mode;
388 if (! general_operand (op, mode))
391 while (GET_CODE (op) == SUBREG)
392 op = SUBREG_REG (op);
394 switch (GET_CODE (op))
400 return (GET_MODE_SIZE (mode) >= UNITS_PER_WORD || TARGET_DW_ENABLE);
403 if (GET_MODE_CLASS (mode) != MODE_INT
404 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT)
412 return (GET_MODE (op) == mode
413 || mode == SImode || mode == HImode || mode == QImode);
416 return ((GET_MODE_CLASS (mode) == MODE_FLOAT
417 && mode == GET_MODE (op))
418 || (GET_MODE (op) == VOIDmode
419 && GET_MODE_CLASS (mode) == MODE_INT));
426 /* Return 1 if OP can be used as the output operand for a move insn. */
429 out_operand (op, mode)
431 enum machine_mode mode;
435 if (! general_operand (op, mode))
438 while (GET_CODE (op) == SUBREG)
439 op = SUBREG_REG (op);
441 if (GET_CODE (op) == REG)
442 return (gpc_reg_operand (orig_op, mode)
443 || spec_reg_operand (orig_op, mode)
444 || (GET_MODE_CLASS (mode) == MODE_FLOAT
445 && accum_reg_operand (orig_op, mode)));
447 else if (GET_CODE (op) == MEM)
448 return (GET_MODE_SIZE (mode) >= UNITS_PER_WORD || TARGET_DW_ENABLE);
453 /* Return 1 if OP is an item in memory, given that we are in reload. */
456 reload_memory_operand (op, mode)
458 enum machine_mode mode ATTRIBUTE_UNUSED;
460 int regno = true_regnum (op);
462 return (! CONSTANT_P (op)
464 || (GET_CODE (op) == REG
465 && REGNO (op) >= FIRST_PSEUDO_REGISTER)));
468 /* Given an object for which reload_memory_operand is true, return the address
469 of the operand, taking into account anything that reload may do. */
472 a29k_get_reloaded_address (op)
475 if (GET_CODE (op) == SUBREG)
477 if (SUBREG_BYTE (op) != 0)
480 op = SUBREG_REG (op);
483 if (GET_CODE (op) == REG)
484 op = reg_equiv_mem[REGNO (op)];
486 return find_replacement (&XEXP (op, 0));
489 /* Subfunction of the following function. Update the flags of any MEM
490 found in part of X. */
493 a29k_set_memflags_1 (x, in_struct_p, scalar_p, volatile_p, unchanging_p)
495 int in_struct_p, scalar_p, volatile_p, unchanging_p;
499 switch (GET_CODE (x))
503 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
504 a29k_set_memflags_1 (XVECEXP (x, 0, i), in_struct_p, scalar_p,
505 volatile_p, unchanging_p);
509 a29k_set_memflags_1 (PATTERN (x), in_struct_p, scalar_p, volatile_p,
514 a29k_set_memflags_1 (SET_DEST (x), in_struct_p, scalar_p, volatile_p,
516 a29k_set_memflags_1 (SET_SRC (x), in_struct_p, scalar_p, volatile_p,
521 MEM_IN_STRUCT_P (x) = in_struct_p;
522 MEM_SCALAR_P (x) = scalar_p;
523 MEM_VOLATILE_P (x) = volatile_p;
524 RTX_UNCHANGING_P (x) = unchanging_p;
532 /* Given INSN, which is either an INSN or a SEQUENCE generated to
533 perform a memory operation, look for any MEMs in either a SET_DEST or
534 a SET_SRC and copy the in-struct, unchanging, and volatile flags from
535 REF into each of the MEMs found. If REF is not a MEM, don't do
539 a29k_set_memflags (insn, ref)
543 /* Note that it is always safe to get these flags, though they won't
544 be what we think if REF is not a MEM. */
545 int in_struct_p = MEM_IN_STRUCT_P (ref);
546 int scalar_p = MEM_SCALAR_P (ref);
547 int volatile_p = MEM_VOLATILE_P (ref);
548 int unchanging_p = RTX_UNCHANGING_P (ref);
550 if (GET_CODE (ref) != MEM
551 || (! in_struct_p && ! volatile_p && ! unchanging_p))
554 a29k_set_memflags_1 (insn, in_struct_p, scalar_p, volatile_p, unchanging_p);
557 /* Return 1 if OP is a comparison operator that we have in floating-point. */
560 fp_comparison_operator (op, mode)
562 enum machine_mode mode;
564 return ((mode == VOIDmode || mode == GET_MODE (op))
565 && (GET_CODE (op) == EQ || GET_CODE (op) == GT ||
566 GET_CODE (op) == GE));
569 /* Return 1 if OP is a valid branch comparison. */
572 branch_operator (op, mode)
574 enum machine_mode mode;
576 return ((mode == VOIDmode || mode == GET_MODE (op))
577 && (GET_CODE (op) == GE || GET_CODE (op) == LT));
580 /* Return 1 if OP is a load multiple operation. It is known to be a
581 PARALLEL and the first three sections will be tested. */
584 load_multiple_operation (op, mode)
586 enum machine_mode mode ATTRIBUTE_UNUSED;
588 int count = XVECLEN (op, 0) - 2;
593 /* Perform a quick check so we don't blow up below. */
595 || GET_CODE (XVECEXP (op, 0, 0)) != SET
596 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
597 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
600 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
601 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
603 for (i = 1; i < count; i++)
605 rtx elt = XVECEXP (op, 0, i + 2);
607 if (GET_CODE (elt) != SET
608 || GET_CODE (SET_DEST (elt)) != REG
609 || GET_MODE (SET_DEST (elt)) != SImode
610 || REGNO (SET_DEST (elt)) != dest_regno + i
611 || GET_CODE (SET_SRC (elt)) != MEM
612 || GET_MODE (SET_SRC (elt)) != SImode
613 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
614 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
615 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
616 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4)
623 /* Similar, but tests for store multiple. */
626 store_multiple_operation (op, mode)
628 enum machine_mode mode ATTRIBUTE_UNUSED;
630 int num_special = TARGET_NO_STOREM_BUG ? 2 : 1;
631 int count = XVECLEN (op, 0) - num_special;
636 /* Perform a quick check so we don't blow up below. */
638 || GET_CODE (XVECEXP (op, 0, 0)) != SET
639 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
640 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
643 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
644 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
646 for (i = 1; i < count; i++)
648 rtx elt = XVECEXP (op, 0, i + num_special);
650 if (GET_CODE (elt) != SET
651 || GET_CODE (SET_SRC (elt)) != REG
652 || GET_MODE (SET_SRC (elt)) != SImode
653 || REGNO (SET_SRC (elt)) != src_regno + i
654 || GET_CODE (SET_DEST (elt)) != MEM
655 || GET_MODE (SET_DEST (elt)) != SImode
656 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
657 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
658 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
659 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4)
666 /* Given a special register REG and MASK, a value being masked against a
667 quantity to which the special register is set, return 1 if the masking
668 operation is built-in to the setting of that special register. */
671 masks_bits_for_special (reg, mask)
675 int needed_mask_value;
677 if (GET_CODE (reg) != REG || GET_CODE (mask) != CONST_INT)
684 needed_mask_value = 3;
688 needed_mask_value = 31;
693 needed_mask_value = 255;
697 needed_mask_value = 511;
701 needed_mask_value = 0x3ff;
708 needed_mask_value = 0xffff;
712 needed_mask_value = 0xffff0000;
731 return (INTVAL (mask) & ~ needed_mask_value) == 0;
734 /* Return nonzero if this label is that of the return point, but there is
735 a non-null epilogue. */
738 epilogue_operand (op, mode)
740 enum machine_mode mode ATTRIBUTE_UNUSED;
742 return next_active_insn (op) == 0 && a29k_first_epilogue_insn != 0;
745 /* Return the register class of a scratch register needed to copy IN into
746 or out of a register in CLASS in MODE. If it can be done directly,
747 NO_REGS is returned. */
750 secondary_reload_class (class, mode, in)
751 enum reg_class class;
752 enum machine_mode mode;
756 enum rtx_code code = GET_CODE (in);
758 if (! CONSTANT_P (in))
760 regno = true_regnum (in);
762 /* A pseudo is the same as memory. */
763 if (regno == -1 || regno >= FIRST_PSEUDO_REGISTER)
767 /* If we are transferring between memory and a multi-word mode, we need
770 if (code == MEM && GET_MODE_SIZE (mode) > UNITS_PER_WORD)
773 /* If between memory and a mode smaller than a word without DW being
774 enabled, we need BP. */
776 if (code == MEM && ! TARGET_DW_ENABLE
777 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
780 /* Otherwise, we can place anything into GENERAL_REGS and can put
781 GENERAL_REGS into anything. */
782 if (class == GENERAL_REGS
785 || (regno >= R_KR (0) && regno <= R_KR (31)))))
788 /* We can place 16-bit constants into a special register. */
789 if (code == CONST_INT
790 && (GET_MODE_BITSIZE (mode) <= 16 || (unsigned) INTVAL (in) <= 65535)
791 && (class == BP_REGS || class == Q_REGS || class == SPECIAL_REGS))
794 /* Otherwise, we need GENERAL_REGS. */
798 /* START is the zero-based incoming argument register index used (0 is 160,
799 i.e., the first incoming argument register) and COUNT is the number used.
801 Mark the corresponding incoming registers as neither fixed nor call used.
802 For each register used for incoming arguments, we have one less local
803 register that can be used. So also mark some high-numbered registers as
806 Return the first register number to use for the argument. */
809 incoming_reg (start, count)
815 /* We only use 16 argument registers, so truncate at the end of the
817 if (start + count > 16)
820 if (! TARGET_NO_REUSE_ARGS)
821 /* Mark all the used registers as not fixed and saved over calls. */
822 for (i = R_AR (start); i < R_AR (start + count); i++)
824 fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 0;
825 CLEAR_HARD_REG_BIT (fixed_reg_set, i);
826 CLEAR_HARD_REG_BIT (call_used_reg_set, i);
827 CLEAR_HARD_REG_BIT (call_fixed_reg_set, i);
830 /* Shorten the maximum size of the frame.
831 Remember that R_AR(-1,-2) are place holders for the caller's lr0,lr1.
832 Make sure to keep the frame rounded to an even boundary. Rounding up
833 to an 8 byte boundary will use a slot. Otherwise a frame with 121 local
834 regs and 5 arguments will overrun the stack (121+1 + 5 + 2 > 128). */
835 /* ??? An alternative would be to never allocate one reg. */
836 for (i = (R_AR (0) - 2 - start - count) & ~1; i < R_AR (0) - 2 - start; i++)
838 fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1;
839 SET_HARD_REG_BIT (fixed_reg_set, i);
840 SET_HARD_REG_BIT (call_used_reg_set, i);
841 SET_HARD_REG_BIT (call_fixed_reg_set, i);
847 /* Add CLOBBERs to CALL_INSN_FUNCTION_USAGE chain of INSN indicating
848 that LR2 up to, but not including, OP are clobbered. If OP is
849 zero, indicate all parameter registers are clobbered. */
852 a29k_clobbers_to (insn, op)
860 high_regno = R_LR (18);
861 else if (GET_CODE (op) != REG || REGNO (op) < R_LR (0)
862 || REGNO (op) > R_LR (18))
865 high_regno = REGNO (op);
867 for (i = R_LR (2); i < high_regno; i++)
868 CALL_INSN_FUNCTION_USAGE (insn)
869 = gen_rtx_EXPR_LIST (VOIDmode,
870 gen_rtx_CLOBBER (VOIDmode,
871 gen_rtx (REG, SImode, i)),
872 CALL_INSN_FUNCTION_USAGE (insn));
875 /* These routines are used in finding insns to fill delay slots in the
878 /* Return 1 if the current function will adjust the register stack. */
886 if (frame_pointer_needed)
889 /* If any local register is used, we need to adjust the regstack. */
890 for (i = R_LR (127); i >= R_LR (0); i --)
891 if (regs_ever_live[i])
894 /* We need a register stack if we make any calls. */
895 for (insn = get_insns (); insn; insn = next_insn (insn))
896 if (GET_CODE (insn) == CALL_INSN
897 || (GET_CODE (insn) == INSN
898 && GET_CODE (PATTERN (insn)) == SEQUENCE
899 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN))
902 /* Otherwise, we don't. */
906 /* Return 1 if X uses a local register. */
915 switch (GET_CODE (x))
918 return REGNO (x) >= R_LR (0) && REGNO (x) <= R_FP;
932 fmt = GET_RTX_FORMAT (GET_CODE (x));
933 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
937 if (uses_local_reg_p (XEXP (x, i)))
940 else if (fmt[i] == 'E')
942 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
943 if (uses_local_reg_p (XVECEXP (x, i, j)))
951 /* Returns 1 if this function is known to have a null epilogue. */
956 return (reload_completed && ! needs_regstack_p ()
957 && get_frame_size () == 0
958 && current_function_pretend_args_size == 0);
961 /* Write out the assembler form of an operand. Recognize the following
964 %N means write the low-order 8 bits of the negative of the constant
965 %Q means write a QImode operand (truncate constants to 8 bits)
966 %M means write the low-order 16 bits of the constant
967 %m means write the low-order 16 bits shifted left 16 bits
968 %C means write the low-order 8 bits of the complement of the constant
969 %b means write `f' is this is a reversed condition, `t' otherwise
970 %B means write `t' is this is a reversed condition, `f' otherwise
971 %J means write the 29k opcode part for a comparison operation
972 %e means write the label with an extra `X' is this is the epilogue
973 otherwise the normal label name
974 %E means write nothing if this insn has a delay slot,
975 a nop unless this is the epilogue label, in which case
976 write the first epilogue insn
977 %F means write just the normal operand if the insn has a delay slot;
978 otherwise, this is a recursive call so output the
979 symbol + 4 and write the first prologue insn in the
981 %L means write the register number plus one ("low order" register)
982 or the low-order part of a multi-word constant
983 %O means write the register number plus two
984 %P means write the register number plus three ("low order" of TImode)
985 %S means write the number of words in the mode of the operand,
987 %V means write the number of elements in a PARALLEL minus 1
988 %# means write nothing if we have a delay slot, "\n\tnop" otherwise
989 %* means write the register name for TPC. */
992 print_operand (file, x, code)
999 /* These macros test for integers and extract the low-order bits. */
1001 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
1002 && GET_MODE (X) == VOIDmode)
1004 #define INT_LOWPART(X) \
1005 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
1010 if (GET_CODE (x) == REG)
1012 else if (! INT_P (x))
1013 output_operand_lossage ("invalid %%Q value");
1014 fprintf (file, "%d", INT_LOWPART (x) & 0xff);
1019 output_operand_lossage ("invalid %%C value");
1020 fprintf (file, "%d", (~ INT_LOWPART (x)) & 0xff);
1025 output_operand_lossage ("invalid %%N value");
1026 fprintf (file, "%d", (- INT_LOWPART (x)) & 0xff);
1031 output_operand_lossage ("invalid %%M value");
1032 fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
1037 output_operand_lossage ("invalid %%m value");
1038 fprintf (file, "%d", (INT_LOWPART (x) & 0xffff) << 16);
1042 if (GET_CODE (x) == GE)
1043 fprintf (file, "f");
1045 fprintf (file, "t");
1049 if (GET_CODE (x) == GE)
1050 fprintf (file, "t");
1052 fprintf (file, "f");
1056 /* It so happens that the RTX names for the conditions are the same as
1057 the 29k's insns except for "ne", which requires "neq". */
1058 fprintf (file, GET_RTX_NAME (GET_CODE (x)));
1059 if (GET_CODE (x) == NE)
1060 fprintf (file, "q");
1064 if (optimize && flag_delayed_branch
1065 && a29k_last_prologue_insn == 0 && epilogue_operand (x, VOIDmode)
1066 && dbr_sequence_length () == 0)
1068 /* We need to output the label number of the last label in the
1069 function, which is not necessarily X since there might be
1070 a USE insn in between. First go forward to the last insn, then
1071 back up to a label. */
1072 while (NEXT_INSN (x) != 0)
1075 while (GET_CODE (x) != CODE_LABEL)
1078 ASM_GENERATE_INTERNAL_LABEL (buf, "LX", CODE_LABEL_NUMBER (x));
1079 assemble_name (file, buf);
1082 output_asm_label (x);
1086 if (dbr_sequence_length ())
1088 else if (a29k_last_prologue_insn)
1090 fprintf (file, "\n\t%s", a29k_last_prologue_insn);
1091 free (a29k_last_prologue_insn);
1092 a29k_last_prologue_insn = 0;
1094 else if (optimize && flag_delayed_branch
1095 && epilogue_operand (x, VOIDmode))
1097 fprintf (file, "\n\t%s", a29k_first_epilogue_insn);
1098 a29k_first_epilogue_insn_used = 1;
1101 fprintf (file, "\n\tnop");
1105 output_addr_const (file, x);
1106 if (dbr_sequence_length () == 0)
1108 /* If this doesn't have its delay slot filled, see if we need to
1109 put the last insn of the prolog in it. If not, see if this is
1110 a recursive call. If so, we can put the first insn of its
1111 prolog in the delay slot. Otherwise, write a nop. */
1112 if (a29k_last_prologue_insn)
1114 fprintf (file, "\n\t%s", a29k_last_prologue_insn);
1115 free (a29k_last_prologue_insn);
1116 a29k_last_prologue_insn = 0;
1118 else if (GET_CODE (x) == SYMBOL_REF
1119 && ! strcmp (XSTR (x, 0), current_function_name))
1120 fprintf (file, "+4\n\t%s,%d",
1121 a29k_regstack_size >= 64 ? "const gr121" : "sub gr1,gr1",
1122 a29k_regstack_size * 4);
1124 fprintf (file, "\n\tnop");
1129 if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode)
1131 union real_extract u;
1133 memcpy ((char *) &u, (char *) &CONST_DOUBLE_LOW (x), sizeof u);
1134 fprintf (file, "$double1(%.20e)", u.d);
1136 else if (GET_CODE (x) == REG)
1137 fprintf (file, "%s", reg_names[REGNO (x) + 1]);
1139 output_operand_lossage ("invalid %%L value");
1143 if (GET_CODE (x) != REG)
1144 output_operand_lossage ("invalid %%O value");
1145 fprintf (file, "%s", reg_names[REGNO (x) + 2]);
1149 if (GET_CODE (x) != REG)
1150 output_operand_lossage ("invalid %%P value");
1151 fprintf (file, "%s", reg_names[REGNO (x) + 3]);
1155 fprintf (file, "%d", (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD)-1);
1159 if (GET_CODE (x) != PARALLEL)
1160 output_operand_lossage ("invalid %%V value");
1161 fprintf (file, "%d", XVECLEN (x, 0) - 2);
1165 if (dbr_sequence_length () == 0)
1167 if (a29k_last_prologue_insn)
1169 fprintf (file, "\n\t%s", a29k_last_prologue_insn);
1170 free (a29k_last_prologue_insn);
1171 a29k_last_prologue_insn = 0;
1174 fprintf (file, "\n\tnop");
1179 fprintf (file, "%s", reg_names [R_TPC]);
1183 if (GET_CODE (x) == REG)
1184 fprintf (file, "%s", reg_names [REGNO (x)]);
1186 else if (GET_CODE (x) == MEM)
1187 output_address (XEXP (x, 0));
1189 else if (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == SUBREG
1190 && GET_CODE (SUBREG_REG (XEXP (x, 0))) == CONST_DOUBLE)
1192 union real_extract u;
1194 if (GET_MODE (SUBREG_REG (XEXP (x, 0))) == SFmode)
1195 fprintf (file, "$float");
1197 fprintf (file, "$double%d",
1198 (SUBREG_BYTE (XEXP (x, 0)) / GET_MODE_SIZE (GET_MODE (x))));
1199 memcpy ((char *) &u,
1200 (char *) &CONST_DOUBLE_LOW (SUBREG_REG (XEXP (x, 0))), sizeof u);
1201 fprintf (file, "(%.20e)", u.d);
1204 else if (GET_CODE (x) == CONST_DOUBLE
1205 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1207 union real_extract u;
1209 memcpy ((char *) &u, (char *) &CONST_DOUBLE_LOW (x), sizeof u);
1210 fprintf (file, "$%s(%.20e)",
1211 GET_MODE (x) == SFmode ? "float" : "double0", u.d);
1215 output_addr_const (file, x);
1218 /* This page contains routines to output function prolog and epilog code. */
1220 /* Compute the size of the register stack, and determine if there are any
1221 call instructions. */
1224 compute_regstack_size ()
1229 /* See if we make any calls. We need to set lr1 if so. */
1230 a29k_makes_calls = 0;
1231 for (insn = get_insns (); insn; insn = next_insn (insn))
1232 if (GET_CODE (insn) == CALL_INSN
1233 || (GET_CODE (insn) == INSN
1234 && GET_CODE (PATTERN (insn)) == SEQUENCE
1235 && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == CALL_INSN))
1237 a29k_makes_calls = 1;
1241 /* Find the highest local register used. */
1242 for (i = R_LR (127); i >= R_LR (0); i--)
1243 if (regs_ever_live[i])
1246 a29k_regstack_size = i - (R_LR (0) - 1);
1248 /* If calling routines, ensure we count lr0 & lr1. */
1249 if (a29k_makes_calls && a29k_regstack_size < 2)
1250 a29k_regstack_size = 2;
1252 /* Count frame pointer and align to 8 byte boundary (even number of
1254 a29k_regstack_size += frame_pointer_needed;
1255 if (a29k_regstack_size & 1) a29k_regstack_size++;
1258 /* Sets register names for incoming arguments and frame pointer.
1259 This can't be computed until after register allocation. */
1262 a29k_compute_reg_names ()
1266 compute_regstack_size ();
1268 /* Set the names and numbers of the frame pointer and incoming argument
1271 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1272 a29k_debug_reg_map[i] = i;
1274 reg_names[FRAME_POINTER_REGNUM] = reg_names[R_LR (a29k_regstack_size - 1)];
1275 a29k_debug_reg_map[FRAME_POINTER_REGNUM] = R_LR (a29k_regstack_size - 1);
1277 for (i = 0; i < 16; i++)
1279 reg_names[R_AR (i)] = reg_names[R_LR (a29k_regstack_size + i + 2)];
1280 a29k_debug_reg_map[R_AR (i)] = R_LR (a29k_regstack_size + i + 2);
1283 /* If using kernel register map, swap numbers for kernel and user
1285 if (TARGET_KERNEL_REGISTERS)
1286 for (i = 0; i < 32; i++)
1288 int tem = a29k_debug_reg_map[i];
1289 a29k_debug_reg_map[i] = a29k_debug_reg_map[R_KR (i)];
1290 a29k_debug_reg_map[R_KR (i)] = tem;
1294 /* Output function prolog code to file FILE. Memory stack size is SIZE. */
1297 output_prolog (file, size)
1304 unsigned int tag_word;
1306 /* See how many incoming arguments we have in registers. */
1307 for (i = R_AR (0); i < R_AR (16); i++)
1308 if (! fixed_regs[i])
1311 /* The argument count includes the caller's lr0 and lr1. */
1314 /* Compute memory stack size. Add in number of bytes that the we should
1315 push and pretend the caller did and the size of outgoing arguments.
1316 Then round to a doubleword boundary. */
1317 size += (current_function_pretend_args_size
1318 + current_function_outgoing_args_size);
1319 size = (size + 7) & ~7;
1321 /* Write header words. See if one or two word form. */
1322 tag_word = (frame_pointer_needed ? 0x400000 : 0) + (arg_count << 16);
1324 if (size / 8 > 0xff)
1325 fprintf (file, "\t.word %d, 0x%0x\n", (size / 8) << 2,
1326 0x800000 + tag_word);
1328 fprintf (file, "\t.word 0x%0x\n", tag_word + ((size / 8) << 3));
1330 /* Define the function name. */
1331 assemble_name (file, a29k_function_name);
1332 fprintf (file, ":\n");
1334 /* Push the register stack by the proper amount. There are two possible
1336 if (a29k_regstack_size >= 256/4)
1337 fprintf (file, "\tconst %s,%d\n\tsub gr1,gr1,%s\n",
1338 reg_names[R_TAV], a29k_regstack_size * 4, reg_names[R_TAV]);
1339 else if (a29k_regstack_size)
1340 fprintf (file, "\tsub gr1,gr1,%d\n", a29k_regstack_size * 4);
1342 /* Test that the registers are available. */
1343 if (a29k_regstack_size)
1344 fprintf (file, "\tasgeu V_%sSPILL,gr1,%s\n",
1345 TARGET_KERNEL_REGISTERS ? "K" : "", reg_names[R_RAB]);
1347 /* Set up frame pointer, if one is needed. */
1348 if (frame_pointer_needed)
1349 fprintf (file, "\tsll %s,%s,0\n", reg_names[FRAME_POINTER_REGNUM],
1352 /* Make room for any frame space. There are three ways to do this. */
1355 fprintf (file, "\tconst %s,%d\n", reg_names[R_TAV], size);
1357 fprintf (file, "\tconsth %s,%d\n", reg_names[R_TAV], size);
1358 if (TARGET_STACK_CHECK)
1359 fprintf (file, "\tcall %s,__msp_check\n", reg_names[R_TPC]);
1360 fprintf (file, "\tsub %s,%s,%s\n",
1361 reg_names[R_MSP], reg_names[R_MSP], reg_names[R_TAV]);
1365 if (TARGET_STACK_CHECK)
1366 fprintf (file, "\tcall %s,__msp_check\n", reg_names[R_TPC]);
1367 fprintf (file, "\tsub %s,%s,%d\n",
1368 reg_names[R_MSP], reg_names[R_MSP], size);
1371 /* If this routine will make calls, set lr1. If we see an insn that
1372 can use a delay slot before a call or jump, save this insn for that
1373 slot (this condition is equivalent to seeing if we have an insn that
1374 needs delay slots before an insn that has a filled delay slot). */
1375 a29k_last_prologue_insn = 0;
1376 if (a29k_makes_calls)
1378 i = (a29k_regstack_size + arg_count) * 4;
1380 fprintf (file, "\tconst %s,%d\n\tadd lr1,gr1,%s\n",
1381 reg_names[R_TAV], i, reg_names[R_TAV]);
1384 if (optimize && flag_delayed_branch)
1385 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
1387 if (GET_CODE (insn) == CODE_LABEL
1388 || (GET_CODE (insn) == INSN
1389 && GET_CODE (PATTERN (insn)) == SEQUENCE))
1392 if (GET_CODE (insn) == NOTE
1393 || (GET_CODE (insn) == INSN
1394 && (GET_CODE (PATTERN (insn)) == USE
1395 || GET_CODE (PATTERN (insn)) == CLOBBER)))
1398 if (num_delay_slots (insn) > 0)
1400 a29k_last_prologue_insn = (char *) xmalloc (100);
1401 sprintf (a29k_last_prologue_insn, "add lr1,gr1,%d", i);
1406 if (a29k_last_prologue_insn == 0)
1407 fprintf (file, "\tadd lr1,gr1,%d\n", i);
1411 /* Compute the first insn of the epilogue. */
1412 a29k_first_epilogue_insn_used = 0;
1414 if (size == 0 && a29k_regstack_size == 0 && ! frame_pointer_needed)
1415 a29k_first_epilogue_insn = 0;
1417 a29k_first_epilogue_insn = (char *) xmalloc (100);
1419 if (frame_pointer_needed)
1420 sprintf (a29k_first_epilogue_insn, "sll %s,%s,0",
1421 reg_names[R_MSP], reg_names[FRAME_POINTER_REGNUM]);
1422 else if (a29k_regstack_size)
1424 if (a29k_regstack_size >= 256 / 4)
1425 sprintf (a29k_first_epilogue_insn, "const %s,%d",
1426 reg_names[R_TAV], a29k_regstack_size * 4);
1428 sprintf (a29k_first_epilogue_insn, "add gr1,gr1,%d",
1429 a29k_regstack_size * 4);
1434 sprintf (a29k_first_epilogue_insn, "const %s,%d",
1435 reg_names[R_TAV], size);
1437 sprintf (a29k_first_epilogue_insn, "add %s,%s,%d",
1438 reg_names[R_MSP], reg_names[R_MSP], size);
1442 /* Call this after writing what might be the first instruction of the
1443 epilogue. If that first insn was used in a delay slot, an intermediate
1444 label is written. */
1447 check_epilogue_internal_label (file)
1452 if (! a29k_first_epilogue_insn_used)
1455 for (insn = get_last_insn ();
1456 GET_CODE (insn) != CODE_LABEL;
1457 insn = PREV_INSN (insn))
1460 ASM_OUTPUT_INTERNAL_LABEL (file, "LX", CODE_LABEL_NUMBER (insn));
1461 a29k_first_epilogue_insn_used = 0;
1464 /* Output the epilog of the last procedure to file FILE. SIZE is the memory
1465 stack size. The register stack size is in the variable
1466 A29K_REGSTACK_SIZE. */
1469 output_epilog (file, size)
1474 int locals_unavailable = 0; /* True until after first insn
1475 after gr1 update. */
1477 /* If we hit a BARRIER before a real insn or CODE_LABEL, we don't
1478 need to do anything because we are never jumped to. */
1479 insn = get_last_insn ();
1480 if (GET_CODE (insn) == NOTE)
1481 insn = prev_nonnote_insn (insn);
1483 if (insn && GET_CODE (insn) == BARRIER)
1486 /* If a frame pointer was needed we must restore the memory stack pointer
1487 before adjusting the register stack. */
1488 if (frame_pointer_needed)
1490 fprintf (file, "\tsll %s,%s,0\n",
1491 reg_names[R_MSP], reg_names[FRAME_POINTER_REGNUM]);
1492 check_epilogue_internal_label (file);
1495 /* Restore the register stack. There are two ways to do this. */
1496 if (a29k_regstack_size)
1498 if (a29k_regstack_size >= 256/4)
1500 fprintf (file, "\tconst %s,%d\n",
1501 reg_names[R_TAV], a29k_regstack_size * 4);
1502 check_epilogue_internal_label (file);
1503 fprintf (file, "\tadd gr1,gr1,%s\n", reg_names[R_TAV]);
1507 fprintf (file, "\tadd gr1,gr1,%d\n", a29k_regstack_size * 4);
1508 check_epilogue_internal_label (file);
1510 locals_unavailable = 1;
1513 /* Restore the memory stack pointer if there is no frame pointer.
1514 Adjust the size to include any pretend arguments and pushed
1515 arguments and round to doubleword boundary. */
1516 size += (current_function_pretend_args_size
1517 + current_function_outgoing_args_size);
1518 size = (size + 7) & ~7;
1520 if (size && ! frame_pointer_needed)
1524 fprintf (file, "\tconst %s,%d\n", reg_names[R_TAV], size);
1525 check_epilogue_internal_label (file);
1526 locals_unavailable = 0;
1528 fprintf (file, "\tconsth %s,%d\n", reg_names[R_TAV], size);
1529 fprintf (file, "\tadd %s,%s,%s\n",
1530 reg_names[R_MSP], reg_names[R_MSP], reg_names[R_TAV]);
1534 fprintf (file, "\tadd %s,%s,%d\n",
1535 reg_names[R_MSP], reg_names[R_MSP], size);
1536 check_epilogue_internal_label (file);
1537 locals_unavailable = 0;
1541 if (locals_unavailable)
1543 /* If we have an insn for this delay slot, write it. */
1544 if (current_function_epilogue_delay_list)
1545 final_scan_insn (XEXP (current_function_epilogue_delay_list, 0),
1548 fprintf (file, "\tnop\n");
1551 fprintf (file, "\tjmpi lr0\n");
1552 if (a29k_regstack_size)
1553 fprintf (file, "\tasleu V_%sFILL,lr1,%s\n",
1554 TARGET_KERNEL_REGISTERS ? "K" : "", reg_names[R_RFB]);
1555 else if (current_function_epilogue_delay_list)
1556 final_scan_insn (XEXP (current_function_epilogue_delay_list, 0),
1559 fprintf (file, "\tnop\n");
1561 if (a29k_first_epilogue_insn)
1562 free (a29k_first_epilogue_insn);
1563 a29k_first_epilogue_insn = 0;