fr32_vector_add_svv() passed test.

diff --git a/algorithm_vector/.gdbinit b/algorithm_vector/.gdbinit
new file mode 100644 (file)
index 0000000..cfa7aa8
--- /dev/null
+++ b/algorithm_vector/.gdbinit
@@ -0,0 +1,2 @@
+target sim
+load a.out
\ No newline at end of file

diff --git a/algorithm_vector/Makefile b/algorithm_vector/Makefile
index 1979294..bf577d7 100644 (file)
--- a/algorithm_vector/Makefile
+++ b/algorithm_vector/Makefile
@@ -2,7 +2,7 @@ CC            = bfin-elf-gcc
 LDFLAGS      = -msim
 CCFLAGS       =  -O0 -g
 LIBS             = -lm
-OBJS          = main.o fx32_vector.o fr32_vector_add.o fx_vector_test.o
+OBJS          = main.o fx32_vector.o fr32_vector_add.o fx_vector_test.o fr32_vector_add_svv.o
 
 all:   a.out
 

diff --git a/algorithm_vector/fr32_vector_add_svv.S b/algorithm_vector/fr32_vector_add_svv.S
new file mode 100644 (file)
index 0000000..3b3802d
--- /dev/null
+++ b/algorithm_vector/fr32_vector_add_svv.S
@@ -0,0 +1,67 @@
+/*
+* 32bit vector & scolar addition implementation.
+*
+* function prototype
+* void fr32_vector_add(
+*        const fract32 a[],
+*        const fract32 b,
+*        fract32 c[],
+*        int count);
+*
+* parameters
+*   FP+20      -       int count
+*   FP+16      R2      const fr32 c[] : as result
+*      FP+12   R1      const fr32 b[]
+*      FP+ 8   R0      const fr32 a
+*
+* return
+*      none
+*
+* side effect
+*   out[] : obtain output data
+*
+
+* register layout
+*   P2 : out
+*      P3 : count : loop counter's initial value
+*   I0 : none
+*      I1 : a[]
+*   I2 : c[]
+*   R0 : a
+*   R1 : b[i]
+*      R3 : a[i]+b
+*/
+
+       .text
+       .align 4
+       .global _fr32_vector_add_svv;
+       .type _fr32_vector_add_svv, STT_FUNC;
+
+_fr32_vector_add_svv:
+       link    0;
+       [--sp] = (r7:4, p5:3);          // save all preserved register
+
+               /* Set up registers */
+       i1 = r1;
+       i2 = r2;
+       p3 = [fp+20];                           // load count
+       p3 += -2;
+
+               /* outer loop */
+               r1 = [i1++];
+               r3 = r0 + r1(s) || r1 = [i1++];
+       loop count lc0 = p3;    // Todo : can be 3 parallel instruction. But seems to be simulator bug in 2013RC1RC
+       loop_begin count;
+               [i2++] = r3;
+               r3 = r1 + r0(s) ||      r1 = [i1++] ;
+       loop_end count;
+               [i2++] = r3;
+               r3 = r0 + r1(s);
+               [i2++] = r3;
+               /* end of outer loop */
+
+
+       (r7:4, p5:3) = [sp++];          // restore all preserved register
+       unlink;
+       rts;
+       .size   _fr32_vector_add_svv, .-_fr32_vector_add_svv

diff --git a/algorithm_vector/fx32_vector.h b/algorithm_vector/fx32_vector.h
index df6ddc3..162e8c8 100644 (file)
--- a/algorithm_vector/fx32_vector.h
+++ b/algorithm_vector/fx32_vector.h
@@ -48,6 +48,36 @@ void fr32_vector_sub(
         fract32 c[],
         int count);
 
+/**
+ * \brief vector addition A+B => C
+ * \param a input scalar A
+ * \param b input vector B
+ * \param c input vector C
+ * \count length of vector
+ * \details
+ * Add the 32bit fixed point scalar A to vector B, then, store the result to vector C.
+ */
+void fr32_vector_add_svv(
+    const fract32 a,
+    const fract32 b[],
+    fract32 c[],
+    int count);
+
+/**
+ * \brief vector Sbutraction A-B => C
+ * \param a input scalar A
+ * \param b input vector B
+ * \param c input vector C
+ * \count length of vector
+ * \details
+ * Subtract the 32bit fixed point vector B from scalar A , then, store the result to vector C.
+ */
+void fr32_vector_sub_svv(
+    const fract32 a,
+    const fract32 b[],
+    fract32 c[],
+    int count);
+
     /**
      * \brief vector multiplying A*B => C
      * \param a input vector A
@@ -64,21 +94,6 @@ void fr32_vector_mult(
         int count);
 
     /**
-     * \brief vector addition A+B => C
-     * \param a input vector A
-     * \param b input scalar B
-     * \param c input vector C
-     * \count length of vector
-     * \details
-     * Add the 32bit fixed point scalar B to vector A, then, store the result to vector C.
-     */
-void fr32_vector_add_vsv(
-        const fract32 a[],
-        const fract32 b,
-        fract32 c[],
-        int count);
-
-    /**
      * \brief vector multiplying A*B => C
      * \param a input vector A
      * \param b input scalar B

diff --git a/algorithm_vector/fx_vector_test.c b/algorithm_vector/fx_vector_test.c
index cde0a24..a9fd931 100644 (file)
--- a/algorithm_vector/fx_vector_test.c
+++ b/algorithm_vector/fx_vector_test.c
@@ -16,7 +16,7 @@ void clearBuffer ( fract32 buf[], int count)
 }
 
 /*
- * Basic test to see the continuity of HH and HL&LH product.
+ * Basic test to see vector + vector addition.
  */
 #define NUMSAMPLE_01 4
 
@@ -68,3 +68,51 @@ void test_01_fr32_vector_add()
 
 #undef TAPS_01
 #undef NUMSAMPLE_01
+
+/*
+ * Basic test to see vector + vector addition.
+ */
+#define NUMSAMPLE_02 4
+
+fract32 buf_a_02[NUMSAMPLE_02]=
+    {
+        0x08000000,     //
+        0x7FFFFFFF,     //
+        0x02000000,
+        0x20000000
+    };
+
+
+fract32 desired_02[NUMSAMPLE_02] =
+    {
+        0x09000000,         // Simple addition
+        0x7FFFFFFF,         // Saturated
+        0x03000000,         // dummy
+        0x00000000,         // 0 for count test
+    };
+
+void test_02_fr32_vector_add_svv()
+{
+    fract32 output[NUMSAMPLE_02];
+    int i;
+
+
+        // clear output buffer
+    clearBuffer( output, NUMSAMPLE_02);
+        // test addition. Sample is less than NUMSAMPLE_02 to test the count parameter
+    fr32_vector_add_svv( 0x01000000, buf_a_02, output, NUMSAMPLE_02-1);
+
+    for ( i=0; i<NUMSAMPLE_02; i++)
+    {
+        if ( output[i] != desired_02[i] )
+        {
+            printf( "test02 NG :output[%2d] = 0x%08X but should be 0x%08X\n", i, output[i], desired_02[i] );
+            return;
+        }
+    }
+    printf ("test02 OK\n");
+}
+
+#undef TAPS_02
+#undef NUMSAMPLE_02
+

diff --git a/algorithm_vector/fx_vector_test.h b/algorithm_vector/fx_vector_test.h
index 72c792d..fc4c622 100644 (file)
--- a/algorithm_vector/fx_vector_test.h
+++ b/algorithm_vector/fx_vector_test.h
@@ -15,5 +15,6 @@
 
 
 void test_01_fr32_vector_add();
+void test_02_fr32_vector_add_svv();
 
 #endif /* FX_VECTOR_TEST_H_ */

diff --git a/algorithm_vector/main.c b/algorithm_vector/main.c
index 4bae9e9..f104386 100644 (file)
--- a/algorithm_vector/main.c
+++ b/algorithm_vector/main.c
@@ -18,6 +18,7 @@ int main()
 {
 
     test_01_fr32_vector_add();
+    test_02_fr32_vector_add_svv();
 
 
     return 0;