v206

diff --git a/ADDON/ANS_COMPLEMENT.asm b/ADDON/ANS_COMPLEMENT.asm
index a8bcb6e..ea9c99b 100644 (file)
--- a/ADDON/ANS_COMPLEMENT.asm
+++ b/ADDON/ANS_COMPLEMENT.asm
@@ -189,13 +189,6 @@ DOTPAREN    mDOCOL
             MOV     &SOURCE_ADR,0(PSP)
             mNEXT
 
-;https://forth-standard.org/standard/core/toBODY
-; >BODY     -- PFA      leave PFA of created word
-            FORTHWORD ">BODY"
-            ADD     #4,TOS
-            mNEXT
-
-
 ;https://forth-standard.org/standard/core/toIN
 ;C >IN     -- a-addr       holds offset in input stream
             FORTHWORD ">IN"

diff --git a/ADDON/ARITHMETIC.asm b/ADDON/ARITHMETIC.asm
index 061ae82..5730b2f 100644 (file)
--- a/ADDON/ARITHMETIC.asm
+++ b/ADDON/ARITHMETIC.asm
@@ -64,11 +64,13 @@ u1n2MSTAR   CMP     #0,TOS          ; n2 <= -1 ?
             JGE     u1u2MSTAR       ; no
             XOR     #-1,TOS         ; y: n2 --> u2 
             ADD     #1,TOS          ;
-u1u2MSTAR   .word   151Dh           ;           PUSHM IP,S (1+1 push,IP=0Dh)
+u1u2MSTAR   ;.word   151Dh           ;           PUSHM IP,S (1+1 push,IP=0Dh)
+            PUSHM   #2,IP
             ASMtoFORTH
             .word UMSTAR            ; UMSTAR use S,T,W,X,Y
             FORTHtoASM
-            .word   171Ch           ;           POPM S,IP (1+1 pop,S=0Ch)
+;            .word   171Ch           ;           POPM S,IP (1+1 pop,S=0Ch)
+            POPM  #2,IP
             CMP     #0,S            ; result > -1 ?
             JGE     MSTARend        ; yes
             XOR     #-1,0(PSP)      ; no : ud --> d
@@ -96,10 +98,12 @@ d1u2SMSLASHREM                  ;   -- d1 u2
             ADD #1,2(PSP)       ;4           d1lo+1
             ADDC #0,0(PSP)      ;4           d1hi+C
 ud1u2SMSLASHREM                 ;   -- ud1 u2
-           .word 151Ch          ;4          PUSHM S,T (1+1 push,S=0Ch)
+;           .word 151Ch          ;4          PUSHM S,T (1+1 push,S=0Ch)
+            PUSHM  #2,S
             CALL #MUSMOD
             MOV @PSP+,TOS
-           .word 171Bh          ;4          POPM T,S (1+1 pop,T=0Bh)
+;           .word 171Bh          ;4          POPM T,S (1+1 pop,T=0Bh)
+            POPM  #2,S
             CMP #0,T            ;1  -- ur uq  T=rem_sign>=0?
             JGE SMSLASHREMnruq  ;2           yes
             XOR #-1,0(PSP)      ;3

diff --git a/ADDON/FixPoint.asm b/ADDON/FixPoint.asm
index 4886b7a..8184c50 100644 (file)
--- a/ADDON/FixPoint.asm
+++ b/ADDON/FixPoint.asm
@@ -61,7 +61,7 @@ FDIV2
 ;            MOV 4(PSP),T   ; DVDlo
 ;            MOV 2(PSP),Y   ; DVDhi
 ;            MOV #0,X       ; REMlo = 0
-Q6432       .word 1537h     ; PUSHM R7,R4
+Q6432       PUSHM  #4,R7    ; PUSHM R7,R4
             MOV #0,W        ; REMhi = 0
             MOV @PSP,R6     ; DIVlo
             MOV #32,R5      ; init loop count
@@ -91,7 +91,7 @@ Q6432END
     
             MOV R7,0(PSP)   ; QUOTlo
             MOV R4,TOS      ; QUOThi
-            .word 1734h     ; POPM R4,R7
+            POPM  #4,R7     ; POPM R4 R5 R6 R7
 ;            MOV @IP+,PC    ; 33 words
 
 FDIVSGN AND #-1,S       ; clear V, set N
@@ -162,7 +162,7 @@ FNUMS       MOV @PSP,X              ; -- Qlo Qhi    X = Qlo
             CMP #10,&BASE
             JNZ FNUMS2
             ADD #1,TOS              ;                   TOS = limit for base 10
-FNUMS2      .word 151Eh             ;                   PUSHM TOS,IP  TOS=limit IP count
+FNUMS2      PUSHM  #2,TOS           ;                   PUSHM TOS,IP  TOS=limit IP count
             MOV #FNUMSNEXT,IP       ; -- Qhi Qlo limit
             MOV #0,S
 FNUMSLOOP   PUSH S                  ;                   R-- limit IP count
@@ -179,7 +179,7 @@ FNUMS2CHAR  ADD #30h,TOS
             ADD #1,S                ;                       count+1
             CMP 2(RSP),S            ;3                      count=limit ?
             JLO FNUMSLOOP           ;                       no
-            .word 171Dh             ; -- Qhi Qlorem limit   POPM IP,TOS ;
+            POPM  #2,TOS            ; -- Qhi Qlorem limit   POPM IP,TOS
             MOV #0,0(PSP)           ; -- Qhi 0 limit
             MOV #HOLDS_ORG,X        ; -- Qhi 0 len          X= org
             JMP HOLDS1
@@ -188,7 +188,7 @@ FNUMS2CHAR  ADD #30h,TOS
 ; don't use S reg (keep sign)
         FORTHWORD "UDM*"
 UDMT    PUSH IP         ; 3
-        .word 1537h     ; 6 PUSHM R7,R4     save R7 ~ R4 regs
+        PUSHM  #4,R7     ; 6 PUSHM R7,R4     save R7 ~ R4 regs
         MOV 4(PSP),IP   ; 3 MDlo
         MOV 2(PSP),T    ; 3 MDhi
         MOV @PSP,W      ; 2 MRlo
@@ -219,7 +219,7 @@ UDMT4   ADD IP,IP       ; 1 (RLA LSBs) MDlo *2
         JLO UDMT1       ; 2 IF BIT IN CARRY: FINISHED    32 * 16~ (average loop)
         MOV R6,0(PSP)   ; 3
         MOV R7,TOS      ; 1 high result in TOS
-        .word 1734h     ; 6  POPM R4,R7  restore R4 ~ R7 regs
+        POPM  #4,R7     ; 6  POPM R4 R5 R6 R7
         MOV @RSP+,IP    ; 2
         MOV @IP+,PC
 

diff --git a/ADDON/SD_TOOLS.asm b/ADDON/SD_TOOLS.asm
index 62783f2..a0d26c1 100644 (file)
--- a/ADDON/SD_TOOLS.asm
+++ b/ADDON/SD_TOOLS.asm
@@ -147,7 +147,7 @@ Clust_ClustProcess
 ; ----------------------------------;
             FORTHWORD "DIR"         ; Display DIR sector of CurrentHdl or CurrentDir sector by default 
 ; ----------------------------------;
-    SUB     #4,PSP                  ;
+    SUB     #4,PSP                  ;           Make room for result
     MOV     TOS,2(PSP)              ;           save TOS
     MOV     &DIRClusterL,&ClusterL  ;
     MOV     &DIRClusterH,&ClusterH  ;

diff --git a/CHIPSTICK_FR2433_16MHz_115200bds.txt b/CHIPSTICK_FR2433_16MHz_115200bds.txt
index 59b6796..299768b 100644 (file)
--- a/CHIPSTICK_FR2433_16MHz_115200bds.txt
+++ b/CHIPSTICK_FR2433_16MHz_115200bds.txt
@@ -1,6 +1,8 @@
 @1800
-10 00 66 C8 80 3E 80 04 05 00 18 00 AC DF 54 D6
-2C C8 3E C8 00 00 00 00
+10 00 08 00 A1 F7 80 3E 05 00 18 00 6E DF 3E D6
+24 C8 36 C8 00 00 00 00 00 00
+@2400
+00 00
 @C400
 2F 83 8F 4E 00 00 3E 41 2E 4E 30 4D 2F 83 8F 4E
 00 00 3E 41 0D 12 3D 4E 30 4D 00 00 04 45 58 49
@@ -36,7 +38,7 @@ F9 3F 64 C5 02 30 3E 00 1E 93 EE 37 F4 3F 00 00
 50 00 F5 3F 00 00 01 49 2F 83 8F 4E 00 00 2E 41
 1E 81 02 00 30 4D 16 C5 01 4A 2F 83 8F 4E 00 00
 1E 41 04 00 1E 81 06 00 30 4D 06 C5 02 42 4C 00
-85 12 20 00 1C C6 04 42 41 53 45 00 85 12 E2 21
+85 12 20 00 1C C6 04 42 41 53 45 00 85 12 DC 21
 C0 C4 05 53 54 41 54 45 85 12 BE 21 7E C5 02 3C
 23 00 B2 40 B2 21 B2 21 30 4D EA C5 06 55 4D 2F
 4D 4F 44 00 30 12 5A C4 0B 4E 2E 4F 1C 4F 02 00
@@ -44,7 +46,7 @@ C0 C4 05 53 54 41 54 45 85 12 BE 21 7E C5 02 3C
 09 43 0A 9B 01 28 0A 8B 09 69 08 68 14 83 07 30
 0C 5C 0E 6E 0A 6A F5 2B 0A 8B 12 D3 F5 3F 34 40
 0C C4 8F 4A 02 00 8F 49 00 00 0E 48 30 41 26 C6
-01 23 1B 42 E2 21 2C 4F 2F 83 B0 12 60 C6 BF 4F
+01 23 1B 42 DC 21 2C 4F 2F 83 B0 12 60 C6 BF 4F
 00 00 7A 90 0A 00 02 28 3A 50 07 00 3A 50 30 00
 92 83 B2 21 18 42 B2 21 C8 4A 00 00 30 4D A0 C6
 02 23 53 00 0D 12 87 12 A2 C6 DC C6 2D 83 09 93
@@ -53,398 +55,394 @@ E2 23 0E 93 E0 23 3D 41 30 4D D0 C6 02 23 3E 00
 04 48 4F 4C 44 00 0A 4E 3E 4F DA 3F 32 C6 04 53
 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00 D1 33 30 4D
 4C C6 02 55 2E 00 0D 12 87 12 42 C6 2C C4 00 00
-D4 C6 F0 C6 40 C9 08 C9 22 C4 3E C5 02 44 2E 00
+D4 C6 F0 C6 24 C9 EC C8 22 C4 3E C5 02 44 2E 00
 0D 12 87 12 42 C6 70 C4 82 C4 44 C5 D4 C6 92 C4
-14 C7 F0 C6 40 C9 08 C9 22 C4 7C C4 01 2E 0E 93
+14 C7 F0 C6 24 C9 EC C8 22 C4 7C C4 01 2E 0E 93
 E2 37 2F 83 8F 4E 00 00 3E 43 EA 3F 00 C7 04 48
-45 52 45 00 2F 83 8F 4E 00 00 1E 42 CC 21 30 4D
-F0 C4 05 41 4C 4C 4F 54 82 5E CC 21 3E 4F 30 4D
-EC C6 02 43 2C 00 1A 42 CC 21 CA 4E 00 00 92 53
-CC 21 3E 4F 30 4D 6E C7 05 28 4B 45 59 29 18 42
-0C 05 2F 83 8F 4E 00 00 B0 12 2C C8 92 B3 1C 05
-FD 27 1E 42 0C 05 B0 12 3E C8 30 4D 08 C6 03 4B
-45 59 30 40 AE C7 3F 80 06 00 8F 4E 04 00 3E 40
-54 00 BF 40 3C 21 00 00 AF 4F 02 00 05 3C 82 C7
-06 41 43 43 45 50 54 00 3C 40 A4 C8 3B 40 6E C8
-2D 15 0A 4E 2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00
-3D 40 98 C8 92 B3 1C 05 05 24 18 42 0C 05 38 90
-0A 00 04 20 21 53 39 40 52 C8 4D 15 A2 B3 1C 05
-FD 27 B2 40 11 00 0E 05 E2 C2 22 02 30 41 B2 40
-13 00 0E 05 E2 D2 22 02 30 41 00 00 05 53 4C 45
-45 50 30 40 60 C8 00 00 07 28 53 4C 45 45 50 29
-12 D2 0A 18 F6 3F 21 52 3A 17 58 42 0C 05 48 9C
-08 2C 48 9B E4 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 1C 05
-FD 27 82 48 0E 05 30 4D 9A C8 2D 83 92 B3 1C 05
-E4 23 FC 27 B2 40 18 00 0A 18 82 93 E4 21 02 24
-92 53 E4 21 3E 8F 3D 41 30 4D A8 C7 06 28 45 4D
-49 54 29 00 08 4E 3E 4F E1 3F 3C C7 04 45 4D 49
-54 00 30 40 C4 C8 CC C8 04 45 43 48 4F 00 B2 40
-82 48 92 C8 82 43 E4 21 30 4D 5C C7 06 4E 4F 45
-43 48 4F 00 B2 40 30 4D 92 C8 92 43 E4 21 30 4D
-0E C7 05 53 50 41 43 45 2F 83 8F 4E 00 00 3E 40
-20 00 DF 3F 02 C9 06 53 50 41 43 45 53 00 0E 93
-09 24 0D 12 3D 40 2A C9 EF 3F 2C C9 2D 83 1E 83
-EB 23 3D 41 3E 4F 30 4D 22 C7 04 54 59 50 45 00
-0E 93 0F 24 1E 15 3D 40 56 C9 28 4F 7E 48 8F 48
-00 00 2F 83 BE 3F 58 C9 2D 83 91 83 02 00 F5 23
-1D 17 2F 53 3E 4F 30 4D BC C8 04 28 43 52 29 00
-0D 12 87 12 88 C9 02 0D 0A 00 40 C9 22 C4 92 C7
-02 43 52 00 30 40 70 C9 2F 82 8F 4E 02 00 7E 4D
-8F 4D 00 00 0D 5E 1D B3 0D 63 30 4D 80 C9 07 43
-41 50 53 5F 4F 4E B2 43 B4 21 30 4D 9E C9 08 43
-41 50 53 5F 4F 46 46 00 82 43 B4 21 30 4D 16 C9
-82 53 22 00 0D 12 87 12 2C C4 88 C9 30 CC B8 C9
-2C C4 22 00 0C CA A6 C9 DA C9 3D 41 6E 4E 1E 83
-82 5E CC 21 3E 4F 92 B3 CC 21 A2 63 CC 21 30 4D
-EC C8 82 2E 22 00 0D 12 87 12 C4 C9 2C C4 40 C9
-30 CC 22 C4 00 00 04 57 4F 52 44 00 3C 40 C6 21
-39 4C 3A 4C 09 5A 3A 5C 28 4C 09 9A 1C 24 7E 9A
-FC 27 1A 83 3B 40 60 00 C8 4C 00 00 09 9A 0F 24
-7C 4A 4E 9C 0C 24 18 53 4B 9C F6 2F 82 93 B4 21
-F3 27 7C 90 7B 00 F0 2F 7C 80 20 00 ED 3F 1A 82
-C8 21 82 4A CA 21 1E 42 CC 21 08 8E CE 48 00 00
-30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
-74 40 80 00 3B 40 D0 21 3E 4B 0E 93 1E 24 58 4C
-01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
-F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C 1A 53
-FA 99 00 00 F2 23 58 83 FA 23 19 B3 09 63 0C 49
-6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
-00 C4 34 40 0C C4 30 4D 8C C5 07 3E 4E 55 4D 42
-45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 E2 21 6A 4C
-7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
-0A 00 13 28 0A 9B 11 2C 82 49 D0 04 82 48 D2 04
-82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A 08 63
-1C 53 1E 83 E4 23 8F 48 02 00 8F 4C 00 00 8F 49
-04 00 30 4D 0C 43 1B 42 E2 21 32 C0 00 02 2D 15
-09 43 08 43 3D 40 74 CB 3F 82 8F 4E 06 00 0C 4E
-7E 4C 6A 4C 7A 80 2C 00 10 2C 5A 83 2B 43 7A 52
-07 24 3B 52 6A 53 04 24 3B 40 10 00 5A 83 BF 23
-1C 53 1E 83 6A 4C 7A 80 2C 00 5A 93 B8 23 B1 43
-02 00 CE 3F 76 CB 0E 93 32 24 32 B0 00 02 2F 20
-32 D0 00 02 FC 90 2E 00 00 00 02 20 2D 83 C0 3F
-FC 90 2C 00 00 00 23 20 0A 4E 09 43 8F 49 02 00
-5A 83 09 4A 09 5C 69 49 39 80 30 00 79 90 0A 00
-05 28 79 80 07 00 79 90 0A 00 0A 28 09 9B 08 2C
-8F 49 00 00 0E 4B 2C 15 B0 12 58 C6 2A 17 E6 3F
-9F 4F 04 00 02 00 AF 4F 04 00 0E 4A 4E 93 2B 17
-0E 4C 82 4B E2 21 04 24 3F 50 06 00 0E F3 30 4D
-2F 53 9F 4F 02 00 04 00 BF 4F 00 00 3E E3 09 20
-3E E3 BF E3 02 00 BF E3 00 00 9F 53 02 00 8F 63
-00 00 32 B0 00 02 01 20 2F 53 30 4D D8 C8 07 45
-58 45 43 55 54 45 0A 4E 3E 4F 00 4A 1E C5 01 2C
-1A 42 CC 21 A2 53 CC 21 8A 4E 00 00 3E 4F 30 4D
-2E CC 87 4C 49 54 45 52 41 4C 82 93 BE 21 0F 24
-1A 42 CC 21 A2 52 CC 21 BA 40 2C C4 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 F1 23 30 4D
-AE C9 05 43 4F 55 4E 54 2F 83 1E 53 8F 4E 00 00
-5E 4E FF FF 30 4D 82 43 CA 21 82 4E C6 21 B2 4F
-C8 21 3E 4F 30 4D 0D 12 87 12 86 CC 20 C6 0C CA
-A2 CC 3D 40 AA CC E1 22 44 3E AC CC 0A 4E 3E 4F
-3D 40 C2 CC 37 27 3D 40 9C CC 1A E2 BE 21 B8 27
-B2 23 C4 CC 3E 4F 3D 40 9C CC BF 23 DE 53 00 00
-68 4E 08 5E F8 40 3F 00 00 00 3D 40 52 CF CC 3F
-1E CC 08 45 56 41 4C 55 41 54 45 00 39 40 C6 21
-3C 49 3B 49 3A 49 3D 15 87 12 96 CC FE CC B2 41
-CA 21 B2 41 C8 21 B2 41 C6 21 3D 41 30 4D 94 C5
-04 51 55 49 54 00 31 40 E0 20 B2 40 00 20 00 20
-82 43 BE 21 82 43 08 18 87 12 88 C9 05 0D 0A 6F
-6B 20 40 C9 D6 C7 08 C9 96 CC D6 C4 68 C5 88 C9
-0D 73 74 61 63 6B 20 65 6D 70 74 79 21 20 C8 CD
-2C C4 30 FF 74 C7 A4 C5 88 C9 0B 46 52 41 4D 20
-66 75 6C 6C 21 20 C8 CD 38 C6 EA C4 B0 C5 2A CD
-88 C9 05 0D 0A 20 20 20 AC C5 32 CD F0 C7 05 41
-42 4F 52 54 3F 40 80 20 C6 3F B2 40 B8 D4 16 D5
-B2 40 60 C8 54 C8 B2 40 C4 C8 D4 C8 B2 40 70 C9
-86 C9 B2 40 AE C7 D4 C7 82 43 DA DC 82 43 E6 DC
-82 43 F2 DC 82 43 22 DD 82 43 2E DD 82 43 3A DD
-B2 40 0A 00 E2 21 30 41 8F 93 02 00 03 20 2F 52
-3E 4F 30 4D B2 40 82 48 92 C8 B0 12 96 CD A2 B3
-1C 05 FD 27 B2 40 11 00 0E 05 E2 C2 22 02 92 C3
-1C 05 38 40 A0 AA 39 42 03 43 19 83 FD 23 18 83
-FA 23 92 B3 1C 05 F3 23 0D 12 87 12 88 C9 04 1B
-5B 37 6D 00 40 C9 2C C4 E4 21 EA C4 4C C4 B0 C5
-32 CE 88 C9 05 6C 69 6E 65 3A 40 C9 38 C5 26 C7
-DE C8 40 C9 88 C9 04 1B 5B 30 6D 00 40 C9 2E D4
-A6 C9 84 CD 7E CD 86 41 42 4F 52 54 22 00 0D 12
-87 12 C4 C9 2C C4 C8 CD 30 CC 22 C4 64 CA 01 27
-0D 12 87 12 20 C6 0C CA 6A CA B0 C5 70 CE 22 C4
-CC CC 3E C6 81 5C 92 42 C6 21 CA 21 30 4D 00 00
-81 5B 82 43 BE 21 30 4D 74 CE 01 5D B2 43 BE 21
-30 4D 80 CE 83 5B 27 5D 0D 12 87 12 60 CE 2C C4
-2C C4 30 CC 30 CC 22 C4 BE 4F 02 00 3E 4F 30 4D
-6A C9 82 49 53 00 0D 12 87 12 38 C6 EA C4 B0 C5
-CC CE 98 CE 2C C4 A8 CE 30 CC 22 C4 60 CE A8 CE
-22 C4 B2 CE 09 49 4D 4D 45 44 49 41 54 45 1A 42
-B6 21 FA D0 80 00 00 00 30 4D C0 C9 87 52 45 43
-55 52 53 45 19 42 CC 21 99 42 BA 21 00 00 A2 53
-CC 21 30 4D 10 CD 88 50 4F 53 54 50 4F 4E 45 00
-0D 12 87 12 20 C6 0C CA 6A CA 4C C4 B0 C5 70 CE
-68 C5 B0 C5 32 CF 2C C4 2C C4 30 CC 30 CC 2C C4
-30 CC 30 CC 22 C4 82 9F BC 21 2C 25 0D 12 87 12
-88 C9 0F 73 74 61 63 6B 20 6D 69 73 6D 61 74 63
-68 21 D4 CD 94 CE 81 3B 82 93 BE 21 8C 27 0D 12
-87 12 2C C4 22 C4 30 CC 36 CF 82 CE 22 C4 BA 40
-0D 12 FC FF BA 40 87 12 FE FF B2 43 BE 21 82 4F
-BC 21 30 4D 56 CF 01 3A 30 12 6E CF 0D 12 87 12
-E6 C9 20 C6 0C CA 98 CF 08 4E 7A 4E 5A D3 5A 53
-0A 58 19 42 E0 21 6E 4E 3E F0 1E 00 09 5E 3E 4F
-3D 41 82 48 B6 21 82 49 B8 21 82 4A BA 21 2A 52
-82 4A CC 21 30 41 06 CA 08 56 41 52 49 41 42 4C
-45 00 B0 12 8C CF BA 40 86 12 FC FF DF 3C 72 CC
-08 43 4F 4E 53 54 41 4E 54 00 B0 12 8C CF BA 40
-85 12 FC FF 8A 4E FE FF 3E 4F D0 3C E0 CF 06 43
-52 45 41 54 45 00 B0 12 8C CF BA 40 85 12 FC FF
-8A 4A FE FF C3 3C E2 CC 05 44 4F 45 53 3E 1A 42
-BA 21 BA 40 84 12 00 00 8A 4D 02 00 3D 41 30 4D
-18 D0 05 44 45 46 45 52 B0 12 8C CF BA 40 30 40
-FC FF BA 40 2E D0 FE FF A9 3C FE CF 07 43 4F 4D
-50 41 52 45 0C 4E 38 4F 3B 4F 39 4F 0E 4B 0E 5C
-0C 24 1B 83 07 30 1C 83 07 30 19 53 F9 98 FF FF
-F5 27 02 2C 3E 43 30 4D 1E 43 30 4D 86 CF 86 5B
-54 48 45 4E 5D 00 30 4D 7E D0 86 5B 45 4C 53 45
-5D 00 0D 12 87 12 2C C4 01 00 20 C6 0C CA 78 CC
-3C C4 B0 C5 FE D0 82 C4 82 C4 88 C9 04 5B 49 46
-5D 00 54 D0 BA C5 C0 D0 62 C9 2E C5 AC C5 F6 D0
-82 C4 82 C4 88 C9 06 5B 45 4C 53 45 5D 00 54 D0
-BA C5 E4 D0 62 C9 38 C5 3C C4 B0 C5 F6 D0 2E C5
-AC C5 F6 D0 88 C9 06 5B 54 48 45 4E 5D 00 54 D0
-BA C5 F6 D0 38 C5 4C C4 BA C5 9A D0 22 C4 62 C9
-88 C9 05 0D 0A 6B 6F 20 40 C9 D6 C7 86 CC AC C5
-9A D0 8A D0 84 5B 49 46 5D 00 0E 93 3E 4F B9 27
-30 4D 14 D1 8B 5B 55 4E 44 45 46 49 4E 45 44 5D
-0D 12 87 12 20 C6 0C CA 6A CA 64 C4 5C C5 22 C4
-24 D1 89 5B 44 45 46 49 4E 45 44 5D 0D 12 87 12
-20 C6 0C CA 6A CA 64 C4 22 C4 5C D1 3D 41 B2 4E
-0E 18 A2 4E 0C 18 3E 4F 6C 3D 42 CC 06 4D 41 52
-4B 45 52 00 B0 12 8C CF BA 40 84 12 FC FF BA 40
-5A D1 FE FF 9A 42 CE 21 00 00 28 83 8A 48 02 00
-A2 52 CC 21 18 42 B6 21 19 42 B8 21 A8 49 FE FF
-89 48 00 00 30 4D D4 CE 82 49 46 00 2F 83 8F 4E
-00 00 1E 42 CC 21 A2 52 CC 21 BE 40 B0 C5 00 00
-2E 53 30 4D 32 D0 84 45 4C 53 45 00 A2 52 CC 21
-1A 42 CC 21 BA 40 AC C5 FC FF 8E 4A 00 00 2A 83
-0E 4A 30 4D 3A C9 84 54 48 45 4E 00 9E 42 CC 21
-00 00 3E 4F 30 4D 4C D0 85 42 45 47 49 4E 30 40
-74 C7 E6 D1 85 55 4E 54 49 4C 39 40 B0 C5 A2 52
-CC 21 1A 42 CC 21 8A 49 FC FF 8A 4E FE FF 3E 4F
-30 4D 46 CE 85 41 47 41 49 4E 39 40 AC C5 EF 3F
-C8 CF 85 57 48 49 4C 45 0D 12 87 12 AC D1 70 C4
-22 C4 EC CE 86 52 45 50 45 41 54 00 0D 12 87 12
-2A D2 EC D1 22 C4 C6 D1 82 44 4F 00 2F 83 8F 4E
-00 00 A2 53 CC 21 1E 42 CC 21 BE 40 C0 C5 FE FF
-A2 53 00 20 1A 42 00 20 8A 43 00 00 30 4D 6C D1
-84 4C 4F 4F 50 00 39 40 E2 C5 A2 52 CC 21 1A 42
-CC 21 8A 49 FC FF 8A 4E FE FF 1E 42 00 20 A2 83
-00 20 2E 4E 0E 93 03 24 8E 4A 00 00 F6 3F 3E 4F
-30 4D CE C7 85 2B 4C 4F 4F 50 39 40 D0 C5 E5 3F
-80 D2 85 4C 45 41 56 45 1A 42 CC 21 BA 40 F2 C5
-00 00 BA 40 AC C5 02 00 B2 50 06 00 CC 21 A2 53
-00 20 2A 52 19 42 00 20 89 4A 00 00 30 4D C2 D2
-04 4D 4F 56 45 00 0A 4E 38 4F 39 4F 3E 4F 0A 93
-11 24 08 99 0F 24 06 2C F8 49 00 00 18 53 1A 83
-FB 23 30 4D 08 5A 09 5A 19 83 18 83 E8 49 00 00
-1A 83 FA 23 30 4D 32 D2 0A 56 4F 43 41 42 55 4C
-41 52 59 00 0D 12 87 12 06 D0 2C C4 10 00 2C C4
-00 00 C0 C5 2C C4 00 00 30 CC E2 C5 44 D3 74 C7
-2C C4 CE 21 3C C4 EA C4 30 CC F2 C4 1E D0 2C C4
-D0 21 F2 C4 22 C4 5E CE 05 46 4F 52 54 48 84 12
-5E D3 AE DD 72 D6 24 DF 68 D3 58 D6 B4 D2 EC DE
-18 DE 36 DE 6C D4 FA DE 40 DE 00 00 A2 DD 8A CE
-2C DE 00 00 24 D2 04 41 4C 53 4F 00 3A 40 0E 00
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diff --git a/CHIPSTICK_FR2433_16MHz_5Mbds.txt b/CHIPSTICK_FR2433_16MHz_5Mbds.txt
index 8d138b9..bf24ed1 100644 (file)
--- a/CHIPSTICK_FR2433_16MHz_5Mbds.txt
+++ b/CHIPSTICK_FR2433_16MHz_5Mbds.txt
@@ -1,6 +1,8 @@
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diff --git a/CHIPSTICK_FR2433_16MHz_921600bds.txt b/CHIPSTICK_FR2433_16MHz_921600bds.txt
index 78e5dce..bb6d1ca 100644 (file)
--- a/CHIPSTICK_FR2433_16MHz_921600bds.txt
+++ b/CHIPSTICK_FR2433_16MHz_921600bds.txt
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+50 00 39 40 E2 C5 A2 52 C6 21 1A 42 C6 21 8A 49
+FC FF 8A 4E FE FF 1E 42 00 20 A2 83 00 20 2E 4E
+0E 93 03 24 8E 4A 00 00 F6 3F 3E 4F 30 4D A8 C7
+85 2B 4C 4F 4F 50 39 40 D0 C5 E5 3F 7C D2 85 4C
+45 41 56 45 1A 42 C6 21 BA 40 F2 C5 00 00 BA 40
+AC C5 02 00 B2 50 06 00 C6 21 A2 53 00 20 2A 52
+19 42 00 20 89 4A 00 00 30 4D BE D2 04 4D 4F 56
+45 00 0A 4E 38 4F 39 4F 3E 4F 0A 93 11 24 08 99
+0F 24 06 2C F8 49 00 00 18 53 1A 83 FB 23 30 4D
+08 5A 09 5A 19 83 18 83 E8 49 00 00 1A 83 FA 23
+30 4D 2E D2 0A 56 4F 43 41 42 55 4C 41 52 59 00
+0D 12 87 12 08 D0 2C C4 10 00 2C C4 00 00 C0 C5
+2C C4 00 00 0C CC E2 C5 40 D3 74 C7 2C C4 C8 21
+3C C4 EA C4 0C CC F2 C4 20 D0 2C C4 CA 21 F2 C4
+22 C4 32 CE 05 46 4F 52 54 48 84 12 5A D3 70 DD
+E6 D6 E6 DE 64 D3 42 D6 B0 D2 AE DE DA DD F8 DD
+68 D4 BC DE 02 DE 00 00 64 DD 5E CE EE DD 00 00
+20 D2 04 41 4C 53 4F 00 3A 40 0C 00 39 40 CA 21
+38 40 CC 21 B5 3F DA CE 08 50 52 45 56 49 4F 55
+53 00 3A 40 0E 00 39 40 CC 21 38 40 CA 21 A2 3F
+CE C9 04 4F 4E 4C 59 00 82 43 CC 21 30 4D 54 D2
+0B 44 45 46 49 4E 49 54 49 4F 4E 53 92 42 CA 21
+DA 21 30 4D 6A D3 C8 D3 DC D3 EC D3 3A 4E 82 4A
+C8 21 2E 4E 82 4E C6 21 3D 40 10 00 09 4A 08 49
+29 83 18 48 FE FF 0E 98 FC 2B 89 48 00 00 1D 83
+F6 23 2A 4A 0A 93 F0 23 3E 4F 3D 41 30 4D A8 D3
+09 50 57 52 5F 53 54 41 54 45 84 12 E4 D3 3E D6
+6E DF 40 D2 09 52 53 54 5F 53 54 41 54 45 92 42
+0E 18 2E D4 92 42 0C 18 30 D4 EF 3F 20 D4 08 50
+57 52 5F 48 45 52 45 00 92 42 C8 21 2E D4 92 42
+C6 21 30 D4 30 4D 34 D4 08 52 53 54 5F 48 45 52
+45 00 92 42 C8 21 0E 18 92 42 C6 21 0C 18 EC 3F
+24 D3 04 57 49 50 45 00 39 40 10 00 29 83 B9 43
+80 FF FC 23 B0 12 66 CD B2 40 6E DF 0C 18 B2 40
+3E D6 0E 18 CC 3F 82 D4 04 57 41 52 4D 00 30 40
+B2 D4 1E 42 08 18 0D 12 87 12 64 C9 06 0D 1B 5B
+37 6D 23 00 24 C9 5E C7 64 C9 1F 46 61 73 74 46
+6F 72 74 68 20 56 32 30 36 20 28 43 29 4A 2E 4D
+2E 54 68 6F 6F 72 65 6E 73 20 24 C9 2C C4 30 FF
+74 C7 20 C5 26 C7 64 C9 0B 62 79 74 65 73 20 66
+72 65 65 20 AE CD F4 D1 04 43 4F 4C 44 00 B2 40
+04 A5 20 01 B2 40 88 5A CC 01 B2 43 02 02 B2 D3
+06 02 F2 D0 06 00 24 02 F2 D3 26 02 F2 40 FD 00
+22 02 F2 40 A5 00 A1 01 F2 40 10 00 A0 01 D2 43
+A1 01 B2 40 00 A5 60 01 B2 40 29 01 80 01 B2 40
+0B 00 82 01 B2 40 E9 01 84 01 39 40 00 01 B2 D0
+10 00 86 01 92 D2 5E 01 08 18 38 40 59 14 18 83
+FE 23 19 83 FA 23 39 40 26 00 29 83 B9 40 14 D5
+DA FF FB 23 B2 40 54 C8 E4 FF B2 40 18 00 0A 18
+39 40 00 10 29 83 89 43 00 20 FC 23 31 40 E0 20
+3F 40 80 20 37 40 22 C4 36 40 B4 C4 35 40 00 C4
+34 40 0C C4 B2 40 0A 00 DC 21 B2 43 B4 21 92 C3
+30 01 18 42 08 18 F2 B0 10 00 00 02 04 20 38 E3
+18 53 82 48 08 18 B2 40 81 00 00 05 92 42 02 18
+06 05 92 42 04 18 08 05 F2 D0 30 00 0A 02 92 C3
+00 05 92 D3 1A 05 3D 40 0C D6 38 90 0A 00 44 27
+38 90 16 00 41 2F 28 93 1A 23 0F 27 AE D4 92 D3
+09 41 53 53 45 4D 42 4C 45 52 84 12 5A D3 3E DC
+AC DC F2 DB 16 DD B8 DB 3E DD D2 D8 00 00 AE DB
+62 DC 10 DC 50 DC E2 D9 00 00 00 00 4E DD 8E D3
+A4 D1 85 48 49 32 4C 4F 0D 12 87 12 74 C7 BC D1
+0C CC 56 CE 98 D3 1A D6 22 C4 08 D5 04 43 4F 44
+45 00 B0 12 82 CF A2 82 C6 21 0D 12 87 12 74 CF
+AC C5 54 D6 00 00 07 45 4E 44 43 4F 44 45 0D 12
+87 12 B2 D3 0A CF 22 C4 10 D6 03 41 53 4D 92 42
+DA 21 E0 21 B2 40 1E D6 DA 21 E3 3F 76 D6 06 45
+4E 44 41 53 4D 00 92 42 E0 21 DA 21 E8 3F 00 00
+05 43 4F 4C 4F 4E 1A 42 C6 21 BA 40 0D 12 00 00
+BA 40 87 12 02 00 A2 52 C6 21 B2 43 BE 21 30 40
+B2 D3 00 00 05 4C 4F 32 48 49 A2 83 C6 21 1A 42
+C6 21 EE 3F 5C D6 07 43 4F 44 45 4E 4E 4D 0D 12
+87 12 4C CF 56 CE F8 D6 3D 41 2A 82 82 4A C6 21
+B4 3F 38 40 C0 21 39 48 2A 48 09 5A 1A 52 C4 21
+09 9A 03 24 7E 9A FC 27 1A 83 0E 4A 2A 88 82 4A
+C4 21 30 4D 1C 15 87 12 E8 C9 46 CA BA C5 38 D7
+00 CB B0 C5 44 CE 5A D7 3A D7 29 4E 39 90 86 12
+02 20 2E 53 0A 3C 39 90 85 12 03 20 1E 4E 02 00
+04 3C 39 90 84 12 01 20 2E 52 1B 17 30 41 3E 40
+28 00 B0 12 24 D7 19 42 C6 21 A2 53 C6 21 89 4E
+00 00 3E 40 29 00 1C 15 12 12 C4 21 92 53 C4 21
+87 12 E8 C9 00 CB B0 C5 96 D7 8C D7 21 53 3E 90
+10 00 84 2D E2 2B 98 D7 B2 41 C4 21 DE 3F 0D 12
+87 12 20 C6 02 D7 A8 D7 0C 43 1B 42 C6 21 A2 53
+C6 21 0A 4E 3E 4F FA 90 23 00 00 00 2D 20 92 53
+C4 21 B0 12 24 D7 0E 93 03 20 3C 40 00 03 21 3C
+1E 93 03 20 3C 40 10 03 1C 3C 2E 93 03 20 3C 40
+20 03 17 3C 2E 92 03 20 3C 40 20 02 12 3C 3E 92
+03 20 3C 40 30 02 0D 3C 3E 93 03 20 3C 40 30 03
+08 3C 3C 40 30 00 19 42 C6 21 A2 53 C6 21 89 4E
+00 00 3E 4F 3D 41 30 4D FA 90 26 00 00 00 07 20
+3C 40 10 02 92 53 C4 21 B0 12 24 D7 EC 3F FA 90
+40 00 00 00 16 20 3C 40 20 00 92 53 C4 21 B0 12
+76 D7 0C 20 3C 50 10 00 3E 40 2B 00 B0 12 76 D7
+92 92 C0 21 C4 21 02 24 92 53 C4 21 8E 10 0C 5E
+D8 3F B0 12 76 D7 FA 23 3C 50 10 00 B0 12 5E D7
+EF 3F 0D 12 87 12 20 C6 02 D7 7C D8 FE 90 26 00
+00 00 3E 40 20 00 03 20 3C 50 82 00 CB 3F B0 12
+76 D7 E5 23 3C 50 80 00 B0 12 5E D7 E0 3F 44 C8
+04 52 45 54 49 00 0D 12 87 12 2C C4 00 13 0C CC
+22 C4 2C C4 2C 00 9E D7 72 D8 BC D8 2E 4E 0E DC
+09 4B A5 3F D4 D6 03 4D 4F 56 84 12 B2 D8 00 40
+C6 D8 05 4D 4F 56 2E 42 84 12 B2 D8 40 40 00 00
+03 41 44 44 84 12 B2 D8 00 50 E0 D8 05 41 44 44
+2E 42 84 12 B2 D8 40 50 EC D8 04 41 44 44 43 00
+84 12 B2 D8 00 60 FA D8 06 41 44 44 43 2E 42 00
+84 12 B2 D8 40 60 A0 D8 04 53 55 42 43 00 84 12
+B2 D8 00 70 18 D9 06 53 55 42 43 2E 42 00 84 12
+B2 D8 40 70 26 D9 03 53 55 42 84 12 B2 D8 00 80
+36 D9 05 53 55 42 2E 42 84 12 B2 D8 40 80 B0 D6
+03 43 4D 50 84 12 B2 D8 00 90 50 D9 05 43 4D 50
+2E 42 84 12 B2 D8 40 90 9E D6 04 44 41 44 44 00
+84 12 B2 D8 00 A0 6A D9 06 44 41 44 44 2E 42 00
+84 12 B2 D8 40 A0 5C D9 03 42 49 54 84 12 B2 D8
+00 B0 88 D9 05 42 49 54 2E 42 84 12 B2 D8 40 B0
+94 D9 03 42 49 43 84 12 B2 D8 00 C0 A2 D9 05 42
+49 43 2E 42 84 12 B2 D8 40 C0 AE D9 03 42 49 53
+84 12 B2 D8 00 D0 BC D9 05 42 49 53 2E 42 84 12
+B2 D8 40 D0 00 00 03 58 4F 52 84 12 B2 D8 00 E0
+D6 D9 05 58 4F 52 2E 42 84 12 B2 D8 40 E0 08 D9
+03 41 4E 44 84 12 B2 D8 00 F0 F0 D9 05 41 4E 44
+2E 42 84 12 B2 D8 40 F0 20 C6 9E D7 0E DA 0A 4C
+3C F0 70 00 8A 10 3A F0 0F 00 0C DA 4F 3F 42 D9
+03 52 52 43 84 12 08 DA 00 10 20 DA 05 52 52 43
+2E 42 84 12 08 DA 40 10 2C DA 04 53 57 50 42 00
+84 12 08 DA 80 10 3A DA 03 52 52 41 84 12 08 DA
+00 11 48 DA 05 52 52 41 2E 42 84 12 08 DA 40 11
+54 DA 03 53 58 54 84 12 08 DA 80 11 00 00 04 50
+55 53 48 00 84 12 08 DA 00 12 6E DA 06 50 55 53
+48 2E 42 00 84 12 08 DA 40 12 C8 D9 04 43 41 4C
+4C 00 84 12 08 DA 80 12 1A 53 0E 4A 0D 12 87 12
+5E C7 64 C9 0D 6F 75 74 20 6F 66 20 62 6F 75 6E
+64 73 A8 CD 20 C6 02 D7 BA DA 0C 43 1B 42 C6 21
+A2 53 C6 21 92 53 C4 21 3E 40 2C 00 1C 15 87 12
+E8 C9 00 CB B0 C5 44 CE DA DA 1B 17 87 12 72 D8
+E2 DA 0A 4E 3E 4F 1A 83 D7 33 29 4E 59 0E 0A 28
+08 4C 59 0A 01 28 0C 8A 08 8A 38 90 10 00 CC 2F
+5A 0E 8B 3F 2A 92 C8 2F 8A 10 5A 06 86 3F 62 DA
+04 52 52 43 4D 00 84 12 B4 DA 50 00 10 DB 04 52
+52 41 4D 00 84 12 B4 DA 50 01 1E DB 04 52 4C 41
+4D 00 84 12 B4 DA 50 02 2C DB 04 52 52 55 4D 00
+84 12 B4 DA 50 03 7C DA 05 50 55 53 48 4D 84 12
+B4 DA 00 15 48 DB 04 50 4F 50 4D 00 84 12 B4 DA
+00 17 85 12 00 3C 3A DB 03 53 3E 3D 85 12 00 38
+68 DB 02 53 3C 00 85 12 00 34 56 DB 03 30 3E 3D
+85 12 00 30 7C DB 02 30 3C 00 85 12 00 30 00 00
+02 55 3C 00 85 12 00 2C 90 DB 03 55 3E 3D 85 12
+00 28 86 DB 03 30 3C 3E 85 12 00 24 A4 DB 02 30
+3D 00 85 12 00 20 00 00 02 49 46 00 1A 42 C6 21
+8A 4E 00 00 A2 53 C6 21 0E 4A 30 4D 9A DB 04 54
+48 45 4E 00 1A 42 C6 21 08 4E 3E 4F 09 48 29 53
+0A 89 0A 11 3A 90 00 02 58 2F 88 DA 00 00 30 4D
+78 D9 04 45 4C 53 45 00 1A 42 C6 21 BA 40 00 3C
+00 00 A2 53 C6 21 2F 83 8F 4A 00 00 E3 3F CE DB
+05 55 4E 54 49 4C 3A 4F 08 4E 3E 4F 19 42 C6 21
+2A 83 0A 89 0A 11 3A 90 00 FE 37 3B 3A F0 FF 03
+08 DA 89 48 00 00 A2 53 C6 21 30 4D FC D9 05 41
+47 41 49 4E 0D 12 87 12 62 DB 16 DC 22 C4 00 00
+05 57 48 49 4C 45 0D 12 87 12 BC DB 70 C4 22 C4
+72 DB 06 52 45 50 45 41 54 00 0D 12 87 12 62 DB
+16 DC D4 DB 22 C4 78 DC 3D 41 2E 4E 08 4E 3E 4F
+2A 48 0A 93 88 43 00 00 C7 23 98 42 C6 21 00 00
+30 4D 8C DA 03 42 57 31 84 12 76 DC E2 21 94 DC
+03 42 57 32 84 12 76 DC E4 21 A0 DC 03 42 57 33
+84 12 76 DC E6 21 B8 DC 3D 41 1A 42 C6 21 2E 4E
+28 4E 8E 43 00 00 08 93 88 23 BA 4F 00 00 A2 53
+C6 21 8E 4A 00 00 3E 4F 30 4D 00 00 03 46 57 31
+84 12 B6 DC E8 21 DC DC 03 46 57 32 84 12 B6 DC
+EA 21 E8 DC 03 46 57 33 84 12 B6 DC EC 21 3E 90
 00 30 07 24 3E E0 00 04 3E B0 00 10 02 24 3E E0
-00 08 30 4D 34 DD 04 47 4F 54 4F 00 0D 12 87 12
-A2 DB 60 CE 26 CC 22 C4 00 00 05 3F 47 4F 54 4F
-0D 12 87 12 3E DD 60 CE 26 CC 22 C4 00 00 03 4A
-4D 50 0D 12 87 12 60 CE 84 DC 22 C4 6A DD 04 3F
-4A 4D 50 00 0D 12 87 12 3E DD 60 CE 70 C4 56 DC
-22 C4 42 D1 07 7B 54 4F 4F 4C 53 7D 30 4D A2 D6
-03 41 4E 44 3E FF 30 4D C6 D3 02 2E 53 00 8F 4E
+00 08 30 4D F4 DC 04 47 4F 54 4F 00 0D 12 87 12
+62 DB 34 CE 02 CC 22 C4 00 00 05 3F 47 4F 54 4F
+0D 12 87 12 FE DC 34 CE 02 CC 22 C4 00 00 03 4A
+4D 50 0D 12 87 12 34 CE 44 DC 22 C4 2A DD 04 3F
+4A 4D 50 00 0D 12 87 12 FE DC 34 CE 70 C4 16 DC
+22 C4 40 D1 07 7B 54 4F 4F 4C 53 7D 30 4D 8A D6
+03 41 4E 44 3E FF 30 4D C2 D3 02 2E 53 00 8F 4E
 FE FF 0E 4F 2E 83 8F 4E FA FF 3E 40 80 20 2E 83
 8F 4E FC FF 3F 80 06 00 2E 8F 0E 11 0D 12 87 12
-2C C4 3C 00 D2 C8 5E C7 2C C4 08 00 D2 C8 2C C4
-3E 00 D2 C8 08 C9 82 C4 82 C4 8E C5 BA C5 06 DE
+2C C4 3C 00 B0 C8 5E C7 2C C4 08 00 B0 C8 2C C4
+3E 00 B0 C8 EC C8 82 C4 82 C4 8E C5 BA C5 C6 DD
 5A C4 5A C4 22 C4 C0 C5 F8 C5 EA C4 26 C7 2C C4
-02 00 D0 C5 08 DE 22 C4 BA DD 03 2E 52 53 8F 4E
-FE FF 8F 41 FA FF 3E 40 E0 20 D2 3F CA CA 01 3F
-2E 4E 30 40 26 C7 52 D4 03 50 41 44 85 12 E4 20
-0E D5 05 57 4F 52 44 53 0D 12 87 12 84 C9 2C C4
-03 00 1E C9 2C C4 D0 21 EA C4 3C DE 2C C4 10 00
-3C C4 18 C5 F6 D2 2C C4 00 00 3C C4 2C C4 10 00
-3C C4 18 C5 2C C4 00 00 C0 C5 3C C4 F8 C5 3C DE
-18 C5 EA C4 A4 C5 B0 C5 98 DE 5A C4 5A C4 F8 C5
-3C C4 3C DE 18 C5 EA C4 2C C4 02 00 D0 C5 7A DE
-4C C4 B0 C5 DA DE 3C C4 2C C4 02 00 20 C5 EA C4
-92 C4 3C DE 18 C5 F2 C4 3C C4 78 CC 2C C4 7F 00
-B4 DD 40 C9 00 C5 2C C4 0F 00 B4 DD 2C C4 10 00
-70 C4 20 C5 1E C9 AC C5 66 DE 5A C4 22 C4 F0 D2
-03 4D 41 58 2E 9F 07 38 2F 53 30 4D E0 DE 03 4D
-49 4E 2E 9F F9 3B 3E 4F 30 4D 04 D2 03 55 2E 52
+02 00 D0 C5 C8 DD 22 C4 7A DD 03 2E 52 53 8F 4E
+FE FF 8F 41 FA FF 3E 40 E0 20 D2 3F 42 D0 01 3F
+2E 4E 30 40 26 C7 4E D4 03 50 41 44 85 12 E4 20
+A8 D4 05 57 4F 52 44 53 0D 12 87 12 52 C9 2C C4
+03 00 02 C9 2C C4 CA 21 EA C4 FC DD 2C C4 10 00
+3C C4 18 C5 F2 D2 2C C4 00 00 3C C4 2C C4 10 00
+3C C4 18 C5 2C C4 00 00 C0 C5 3C C4 F8 C5 FC DD
+18 C5 EA C4 A4 C5 B0 C5 58 DE 5A C4 5A C4 F8 C5
+3C C4 FC DD 18 C5 EA C4 2C C4 02 00 D0 C5 3A DE
+4C C4 B0 C5 9A DE 3C C4 2C C4 02 00 20 C5 EA C4
+92 C4 FC DD 18 C5 F2 C4 3C C4 54 CC 2C C4 7F 00
+74 DD 24 C9 00 C5 2C C4 0F 00 74 DD 2C C4 10 00
+70 C4 20 C5 02 C9 AC C5 26 DE 5A C4 22 C4 EC D2
+03 4D 41 58 2E 9F 07 38 2F 53 30 4D A0 DE 03 4D
+49 4E 2E 9F F9 3B 3E 4F 30 4D 00 D2 03 55 2E 52
 0D 12 87 12 A8 C4 42 C6 2C C4 00 00 A2 C6 D4 C6
-F0 C6 B4 C4 82 C4 20 C5 2C C4 00 00 E4 DE 1E C9
-40 C9 22 C4 D4 D3 04 44 55 4D 50 00 0D 12 12 12
-E2 21 B2 40 10 00 E2 21 2E 5F 87 12 70 C4 82 C4
+F0 C6 B4 C4 82 C4 20 C5 2C C4 00 00 A4 DE 02 C9
+24 C9 22 C4 D0 D3 04 44 55 4D 50 00 0D 12 12 12
+DC 21 B2 40 10 00 DC 21 2E 5F 87 12 70 C4 82 C4
 82 C4 26 C7 2C C4 01 00 20 C5 26 C7 2C C4 FE FF
-B4 DD C0 C5 84 C9 F8 C5 2C C4 07 00 00 DF 08 C9
+74 DD C0 C5 52 C9 F8 C5 2C C4 07 00 C0 DE EC C8
 F8 C5 2C C4 10 00 18 C5 F8 C5 C0 C5 F8 C5 00 C5
-2C C4 03 00 00 DF E2 C5 6C DF 08 C9 08 C9 F8 C5
+2C C4 03 00 C0 DE E2 C5 2C DF EC C8 EC C8 F8 C5
 2C C4 10 00 18 C5 F8 C5 C0 C5 F8 C5 00 C5 2C C4
-7E 00 F2 DE 20 C6 E4 DE D2 C8 E2 C5 8A DF 2C C4
-10 00 D0 C5 54 DF B4 C4 2C C6 F2 C4 22 C4
+7E 00 B2 DE 20 C6 A4 DE B0 C8 E2 C5 4A DF 2C C4
+10 00 D0 C5 14 DF B4 C4 2C C6 F2 C4 22 C4
 @FFFE
-26 D5
+14 D5
 q

diff --git a/Target.inc b/Device.inc
similarity index 99%
rename from Target.inc
rename to Device.inc
index d75906d..ab7c555 100644 (file)
--- a/Target.inc
+++ b/Device.inc
@@ -138,3 +138,5 @@ UCB1_SD
     .ENDIF
 
 
+
+

diff --git a/FastForth.fr.odt b/FastForth.fr.odt
index 3db1920..de1c12c 100644 (file)
Binary files a/FastForth.fr.odt and b/FastForth.fr.odt differ

diff --git a/FastForth.fr.pdf b/FastForth.fr.pdf
index 5fc766d..2f16196 100644 (file)
Binary files a/FastForth.fr.pdf and b/FastForth.fr.pdf differ

diff --git a/FastForth.odt b/FastForth.odt
index 5aba8bc..818885b 100644 (file)
Binary files a/FastForth.odt and b/FastForth.odt differ

diff --git a/FastForth.pdf b/FastForth.pdf
index 0c0cc17..970cc97 100644 (file)
Binary files a/FastForth.pdf and b/FastForth.pdf differ

diff --git a/FastForthWords.txt b/FastForthWords.txt
index d15f4d4..d0869d7 100644 (file)
--- a/FastForthWords.txt
+++ b/FastForthWords.txt
@@ -1,22 +1,22 @@
 
 FORTH vocabulary
 ----------------
-COLD            WARM            (WARM)          WIPE            RST_HERE        PWR_HERE        RST_STATE       
-PWR_STATE       MOVE            LEAVE           +LOOP           LOOP            DO              REPEAT          
-WHILE           AGAIN           UNTIL           BEGIN           THEN            ELSE            IF              
+COLD            WARM            WIPE            RST_HERE        PWR_HERE        RST_STATE       PWR_STATE       
+MOVE            LEAVE           +LOOP           LOOP            DO              REPEAT          WHILE           
+AGAIN           UNTIL           BEGIN           THEN            ELSE            IF              >BODY           
 DEFER           DOES>           CREATE          CONSTANT        VARIABLE        :               ;               
 POSTPONE        RECURSE         IMMEDIATE       IS              [']             ]               [               
 \               '               ABORT"          ABORT           QUIT            EVALUATE        COUNT           
 LITERAL         ,               EXECUTE         >NUMBER         FIND            WORD            ."              
-S"              CR              (CR)            TYPE            SPACES          SPACE           NOECHO          
-ECHO            EMIT            (EMIT)          ACCEPT          KEY             (KEY)           C,              
-ALLOT           HERE            .               D.              U.              SIGN            HOLD            
-#>              #S              #               UM/MOD          <#              STATE           BASE            
-BL              J               I               UNLOOP          U<              0>              >               
-<               =               0<              0=              DABS            1-              1+              
-1-              1+              -               +               C!              C@              !               
-@               DEPTH           R@              R>              >R              ROT             OVER            
-SWAP            NIP             DROP            ?DUP            DUP             LIT             EXIT
+S"              CR              TYPE            SPACES          SPACE           NOECHO          ECHO            
+EMIT            ACCEPT          KEY             C,              ALLOT           HERE            .               
+D.              U.              SIGN            HOLD            #>              #S              #               
+UM/MOD          <#              STATE           BASE            BL              J               I               
+UNLOOP          U<              0>              >               <               =               0<              
+0=              DABS            1-              1+              1-              1+              -               
++               C!              C@              !               @               DEPTH           R@              
+R>              >R              ROT             OVER            SWAP            NIP             DROP            
+?DUP            DUP             LIT             EXIT
 
 
 ASSEMBLER vocabulary
@@ -31,8 +31,7 @@ RRA.B           RRA             SWPB            RRC.B           RRC
 XOR.B           XOR             BIS.B           BIS             BIC.B           BIC             BIT.B           
 BIT             DADD.B          DADD            CMP.B           CMP             SUB.B           SUB             
 SUBC.B          SUBC            ADDC.B          ADDC            ADD.B           ADD             MOV.B           
-MOV             RETI            LO2HI           COLON           ENDASM          ENDCODE         (SLEEP)         
-SLEEP
+MOV             RETI            LO2HI           COLON           ENDASM          ENDCODE         SLEEP
 
 ASM             CODE            HI2LO           (added in forth vocabulary)
 
@@ -49,7 +48,7 @@ DEFINITIONS     ONLY            PREVIOUS        ALSO            ASSEMBLER
 
 ANS_COMPLEMENT ADD-ON
 ---------------------
-PAD             >BODY           SOURCE          .(              (               DECIMAL         HEX             
+PAD             SOURCE          .(              (               DECIMAL         HEX             
 FILL            [CHAR]          CHAR            +!              MIN             MAX             2/              
 2*              RSHIFT          LSHIFT          XOR             OR              AND             INVERT          
 2OVER           2SWAP           2DROP           2DUP            2!              2@              S>D             
@@ -60,7 +59,7 @@ M*              UM*             {ANS_COMP}
 
 SD_CARD_LOADER ADD-ON
 ---------------------
-LOAD"           CIB             (ACCEPT)        {SD_LOAD}
+LOAD"           CIB
 
 
 SD_CARD_READ_WRITE ADD-ON
@@ -69,9 +68,17 @@ TERM2SD"        SD_EMIT         WRITE           READ            CLOSE
 READ"
 
 
-UTILITY ADD-ON
---------------
-DUMP            U.R             WORDS           ?               .RS             .S              {TOOLS}       
+SD_CARD_READ_WRITE ADD-ON
+-------------------------
+TERM2SD"        SD_EMIT         WRITE           READ            CLOSE           DEL"            WRITE"          
+READ"
+
+
+UTILITY BOOTLOADER
+------------------
+BOOT
+
+QUIT becomes a DEFERed word
 
 
 SD_TOOLS ADD-ON
@@ -80,7 +87,6 @@ DIR             FAT             CLUSTER         SECTOR          {SD_TOOLS}
 
 
 ; a word within brackets [] is an immediate word. (other words may also be immediate)
-; a word doubled with another word between parentheses () is a DEFERred word, the first being initialised with the second.
 ; when ADD-ONs are compiled into the kernel, their respective MARKER word identified with braces {} does nothing.
 ; when ADD-ONs are downloaded, their respective MARKER word identified with braces {} removes all ADD-ONs words.
 
@@ -89,9 +95,7 @@ FORTH WORDS
 
 COLD            Software reset
 
-WARM            DEFERed word, initially executes (WARM)
-
-(WARM)          performs a hot start
+WARM            DEFERed word, performs a hot start
 
 WIPE            resets the program memory to its original state (Deep_RST has same effect).
 
@@ -148,16 +152,12 @@ S"              https://forth-standard.org/standard/core/Sq
 TYPE            https://forth-standard.org/standard/core/TYPE
 SPACES          https://forth-standard.org/standard/core/SPACES
 SPACE           https://forth-standard.org/standard/core/SPACE
-CR              DEFERed word, initially executes (CR)
-(CR)            https://forth-standard.org/standard/core/CR
+CR              DEFERed word, https://forth-standard.org/standard/core/CR
 NOECHO          stop display on output 
 ECHO            start display on output
-EMIT            DEFERed word, initially executes (EMIT)
-(EMIT)          https://forth-standard.org/standard/core/EMIT
-ACCEPT          DEFERed word, initially executes (ACCEPT)
-(ACCEPT)        https://forth-standard.org/standard/core/ACCEPT
-KEY             DEFERed word, initially executes (KEY)
-(KEY)           https://forth-standard.org/standard/core/KEY
+EMIT            DEFERed word, https://forth-standard.org/standard/core/EMIT
+ACCEPT          DEFERed word, https://forth-standard.org/standard/core/ACCEPT
+KEY             DEFERed word, https://forth-standard.org/standard/core/KEY
 C,              https://forth-standard.org/standard/core/CComma
 ALLOT           https://forth-standard.org/standard/core/ALLOT
 HERE            https://forth-standard.org/standard/core/HERE
@@ -251,16 +251,23 @@ LO2HI           switches compilation between low level and high level modes with
 COLON           pushes IP then performs LO2HI, used as: CODE <word> ... assembler instr ... COLON ... FORTH words ... ;
 ENDASM          to end an ASM definition.
 ENDCODE         to end a CODE definition.
-SLEEP           DEFERed word which enables to create a background task, initially executes (SLEEP).
-(SLEEP)         the default SLEEP definition: MOV #GIE+LPM0,SR
+SLEEP           DEFERed word which enables to create a background task, default SLEEP definition: MOV #GIE+LPM0,SR
+
+next assembler words are set in FORTH vocabulary:
 
-next assembler words are in FORTH vocabulary:
+CODE <word>     creates a word written in assembler.
+                this defined <word> must be ended with ENDCODE unless COLON or LO2HI use.
 
-CODE <word>     creates a FORTH word written in assembler.
-                this defined <word> must be ended with ENDCODE.
+DFRCODE <word>  creates a DEFERed word with its default execute part ready to be written in assembler.
+                this defined <word> must be ended with ENDCODE unless COLON or LO2HI use.
+                if we write: DFRCODE truc
+                             COLON ;
+                we obtain same as: DEFER truc
+                                   :NONAME ; IS truc
 
 ASM <word>      creates a word written in assembler but not interpretable by FORTH (because ended by RET instr.).
-                this defined <word> must be ended with ENDASM. This word will be called only in assembler mode. 
+                this defined <word> must be ended with ENDASM. 
+                This word will be recognized only in assembler mode. 
 
 HI2LO           used to switch compilation from high level (FORTH) to low level (assembler).
 
@@ -271,8 +278,8 @@ RRUM            http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=218
 RLAM            http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=208
 RRAM            http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=211
 RRCM            http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=214
-POPM            http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=204    syntax: POPM X,S    to pop X,W,T,S
-PUSHM           http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=205    syntax: PUSHM S,X   to push S,T,W,X
+POPM            http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=204
+PUSHM           http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=205
 
 CALL            http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=142
 PUSH.B  PUSH    http://www.ti.com/lit/ug/slau272d/slau272d.pdf#page=168
@@ -368,10 +375,9 @@ UM*             https://forth-standard.org/standard/core/UMTimes
 SD_CARD_LOADER ADD-ON
 ---------------------
 LOAD"           LOAD" SD_TEST.4TH" loads and compile source file SD_TEST.4TH.
-CIB             Currrent Input Buffer
-(ACCEPT)        init value for ACCEPT
-{SD_LOAD}
+CIB             Currrent Input Buffer, TIB by default.
 
+ACCEPT becomes a DEFERed word
 
 SD_CARD_READ_WRITE ADD-ON
 -------------------------

diff --git a/MSP430-FORTH/ANS_COMP.f b/MSP430-FORTH/ANS_COMP.f
index 0194e14..c2af146 100644 (file)
--- a/MSP430-FORTH/ANS_COMP.f
+++ b/MSP430-FORTH/ANS_COMP.f
@@ -2,9 +2,29 @@
 ; ANS_COMP.f                               words complement to pass CORETEST.4th
 ; ------------------------------------------------------------------------------
 
-\ TARGET SELECTION
+\ TARGET SELECTION (used by preprocessor GEMA to load \config\gema\TARGET.pat)
 \ MSP_EXP430FR5739  MSP_EXP430FR5969    MSP_EXP430FR5994    MSP_EXP430FR6989
 \ MSP_EXP430FR2433  MSP_EXP430FR4133    MSP_EXP430FR2355    CHIPSTICK_FR2433
+\ MY_MSP430FR5738_1 MY_MSP430FR5738     MY_MSP430FR5948     MY_MSP430FR5948_1   
+\ JMJ_BOX
+
+\ REGISTERS USAGE
+\ rDODOES to rEXIT must be saved before use and restored after
+\ scratch registers Y to S are free for use
+\ under interrupt, IP is free for use
+
+\ PUSHM order : PSP,TOS, IP,  S,  T,  W,  X,  Y, rEXIT, rDOVAR, rDOCON, rDODOES
+\ example : PUSHM #6,IP pushes IP,S,T,W,X,Y registers to return stack
+\
+\ POPM  order :  rDODOES, rDOCON, rDOVAR, rEXIT,  Y,  X,  W,  T,  S, IP,TOS,PSP
+\ example : POPM #6,IP   pulls Y,X,W,T,S,IP registers from return stack
+
+\ FORTH conditionnals:  unary{ 0= 0< 0> }, binary{ = < > U< }
+
+\ ASSEMBLER conditionnal usage with IF UNTIL WHILE  S<  S>=  U<   U>=  0=  0<>  0>=
+
+\ ASSEMBLER conditionnal usage with ?JMP ?GOTO      S<  S>=  U<   U>=  0=  0<>  <0
+
     \
 PWR_STATE
     \
@@ -12,7 +32,7 @@ PWR_STATE
     \
 [UNDEFINED] ASM [IF]
 ECHO 
-ASM ; assembler is required! 
+ASM \ assembler is required! 
 [THEN]
     \
 [UNDEFINED] {ANS_COMP} [IF]
@@ -140,11 +160,12 @@ S< IF
     XOR #-1,TOS     \ n2 --> u2 
     ADD #1,TOS      \
 THEN
-PUSHM IP,S          \ UMSTAR use S,T,W,X,Y
+\ PUSHM IP,S          \ UMSTAR use S,T,W,X,Y
+PUSHM #2,IP         \ UMSTAR use S,T,W,X,Y
 LO2HI               \ -- ud1 u2
 UM*       
 HI2LO
-POPM S,IP
+POPM #2,IP           \ pop S,IP
 CMP #0,S            \ sign of result > -1 ?
 S< IF
     XOR #-1,0(PSP)  \ ud --> d
@@ -178,6 +199,8 @@ ENDCODE
 [THEN]
     \
 
+HERE
+
 \ https://forth-standard.org/standard/core/SMDivREM
 \ SM/REM   d1lo d1hi n2 -- r3 q4  symmetric signed div
 CODE SM/REM
@@ -195,11 +218,13 @@ S< IF               \
     ADD #1,2(PSP)   \           d1lo+1
     ADDC #0,0(PSP)  \           d1hi+C
 THEN                \ -- uDVDlo uDVDhi uDIVlo
-PUSHM IP,T          \           save IP,S,T
+\ PUSHM IP,T          \           save IP,S,T
+PUSHM #3,IP         \           save IP,S,T
 LO2HI
     UM/MOD          \ -- uREMlo uQUOTlo
 HI2LO
-POPM T,IP           \           restore T,S,IP
+\ POPM T,IP           \           restore T,S,IP
+POPM #3,IP          \           restore T,S,IP
 CMP #0,T            \           T=rem_sign
 S< IF
     XOR #-1,0(PSP)
@@ -217,6 +242,8 @@ MOV @IP+,PC
 ENDCODE
     \
 
+HERE OVER - DUMP
+
 \ https://forth-standard.org/standard/core/NEGATE
 \ C NEGATE   x1 -- x2            two's complement
 CODE NEGATE
@@ -526,14 +553,6 @@ MOV @IP+,PC
 ENDCODE
     \
 
-\ https://forth-standard.org/standard/core/toBODY
-\ >BODY     -- PFA      leave PFA of created word
-CODE >BODY
-ADD #4,TOS
-MOV @IP+,PC
-ENDCODE
-    \
-
 \ https://forth-standard.org/standard/core/toIN
 \ C >IN     -- a-addr       holds offset in input stream
 TOIN CONSTANT >IN
@@ -542,12 +561,13 @@ TOIN CONSTANT >IN
 [UNDEFINED] PAD [IF]
 
 \ https://forth-standard.org/standard/core/PAD
-\  PAD           --  pad address
+\  PAD           --  addr
 PAD_ORG CONSTANT PAD
 
 [THEN]
 
     \
 RST_HERE
+[THEN]
+
     \
-ECHO 

diff --git a/MSP430-FORTH/CHNGBAUD.f b/MSP430-FORTH/CHNGBAUD.f
new file mode 100644 (file)
index 0000000..e343605
--- /dev/null
+++ b/MSP430-FORTH/CHNGBAUD.f
@@ -0,0 +1,81 @@
+\ CHNGBAUD.f
+
+\ TARGET SELECTION
+\ MSP_EXP430FR5739  MSP_EXP430FR5969    MSP_EXP430FR5994    MSP_EXP430FR6989
+\ MSP_EXP430FR4133  MSP_EXP430FR2433    MSP_EXP430FR2355    CHIPSTICK_FR2433
+
+
+: BAD_MHz
+    1 ABORT"  only for 8,16,24 MHz! "
+;
+
+: CHNGBAUD                  \ only for 8, 16, 24 MHz
+    PWR_STATE               \ to skip created words (garbage collector)
+    ECHO CR
+    ."    choose your baudrate:" CR
+    ."    0 --> 5 MBds" CR
+    ."    1 --> 921600 Bds" CR
+    ."    2 --> 115200 Bds" CR
+    ."    other --> abort, your choice: "
+    KEY
+
+    FREQ_KHZ @  >R      \ target MCLCK frequency --> RSP 
+
+    48 - ?DUP 0=                \ select 5MBds ?
+    IF  ." 5 MBds"              \ add this to the current line
+        R@ 8000 =               \ 8MHz ?
+        IF 1 ABORT"  with MCLK=8MHz? don't dream! "
+        THEN                    \ no return attempted...
+        R@ 16000 =              \ 16MHz ?
+        IF  3                   \ UCAxBRW value for TERMBRW_RST
+            $2100               \ UCAxMCTLW value for TERMMCTLW_RST
+        ELSE R@ 24000 =         \ 24 MHz ?
+            IF  4
+                $EE00
+            ELSE BAD_MHz        \ add your MCLCK value here...
+            THEN
+        THEN
+        
+    ELSE 1 - ?DUP 0=            \ select 921600 ?
+        IF  ." 921600 Bds"
+            R@ 8000 =
+            IF  8
+                $D600
+            ELSE R@ 16000 =
+                IF  $11
+                    $4A00
+                ELSE R@ 24000 =
+                    IF 
+                        1
+                        $00A1
+                    ELSE BAD_MHz
+                    THEN
+                THEN
+            THEN
+        ELSE 1 - ?DUP 0=        \ select 115200 ?
+            IF  ." 115200 Bds"
+                R@ 8000  =
+                IF  4
+                    $5551 
+                ELSE R@ 16000 =
+                    IF  8
+                        $F7A1
+                    ELSE R@ 24000 =
+                        IF  $0D
+                            $4901 
+                        ELSE BAD_MHz
+                        THEN
+                    THEN
+                THEN
+            ELSE                \ other selected 
+                ." abort" CR ABORT
+            THEN
+        THEN
+    THEN
+    TERMMCTLW_RST !             \ set UCAxMCTLW value in FRAM
+    TERMBRW_RST !               \ set UCAxBRW value in FRAM
+    R> DROP                     \ reset RSP and PSP
+    CR ."    Change baudrate in Teraterm, save its setup then reboot."
+;
+    \
+CHNGBAUD

diff --git a/MSP430-FORTH/CORETEST.4TH b/MSP430-FORTH/CORETEST.4TH
index 1213ca2..979110a 100644 (file)
--- a/MSP430-FORTH/CORETEST.4TH
+++ b/MSP430-FORTH/CORETEST.4TH
@@ -1071,16 +1071,24 @@ TESTING INPUT: ACCEPT
 
 CREATE ABUF 80 CHARS ALLOT
 
+[DEFINED] LOAD" [IF]
+: (ACCEPT)
+    ['] ACCEPT >BODY EXECUTE
+;
 : ACCEPT-TEST
     CR ." PLEASE TYPE UP TO 80 CHARACTERS:" CR
-[DEFINED] LOAD" [IF]
     ABUF 80 (ACCEPT)                \ JMT: because ACCEPT is deferred
+    CR ." RECEIVED: " [CHAR] " EMIT
+    ABUF SWAP TYPE [CHAR] " EMIT CR
+;
 [ELSE]
+: ACCEPT-TEST
+    CR ." PLEASE TYPE UP TO 80 CHARACTERS:" CR
     ABUF 80 ACCEPT
-[THEN]      \ LOAD"
     CR ." RECEIVED: " [CHAR] " EMIT
     ABUF SWAP TYPE [CHAR] " EMIT CR
 ;
+[THEN]      \ LOAD"
 
 
 T{ ACCEPT-TEST -> }T

diff --git a/MSP430-FORTH/DOUBLE.f b/MSP430-FORTH/DOUBLE.f
index c5c29ad..49c2627 100644 (file)
--- a/MSP430-FORTH/DOUBLE.f
+++ b/MSP430-FORTH/DOUBLE.f
@@ -2,6 +2,8 @@
 \ TARGET SELECTION
 \ MSP_EXP430FR5739  MSP_EXP430FR5969    MSP_EXP430FR5994    MSP_EXP430FR6989
 \ MSP_EXP430FR4133  MSP_EXP430FR2433    MSP_EXP430FR2355    CHIPSTICK_FR2433
+\ MY_MSP430FR5738_1 MY_MSP430FR5738     MY_MSP430FR5948     MY_MSP430FR5948_1   
+\ JMJ_BOX
 
 
 \ Fast Forth For Texas Instrument MSP430FRxxxx FRAM devices
@@ -25,12 +27,6 @@
 \ scratch registers Y to S are free for use
 \ under interrupt, IP is free for use
 
-\ PUSHM order : PSP,TOS, IP,  S,  T,  W,  X,  Y, rEXIT, rDOVAR, rDOCON, rDODOES
-\ example : PUSHM IP,Y
-\
-\ POPM  order :  rDODOES, rDOCON, rDOVAR, rEXIT,  Y,  X,  W,  T,  S, IP,TOS,PSP
-\ example : POPM Y,IP
-
 \ FORTH conditionnals:  unary{ 0= 0< 0> }, binary{ = < > U< }
 
 \ ASSEMBLER conditionnal usage with IF UNTIL WHILE  S<  S>=  U<   U>=  0=  0<>  0>=
@@ -306,7 +302,8 @@ THEN
         ADD #1,TOS
 THEN
 \ UDM*
-            PUSHM R5,R4     \ 6 save R5 ~ R4 regs
+\            PUSHM R5,R4     \ 6 save R5 ~ R4 regs
+            PUSHM #2,R5      \ 6 save R5,R4 regs
             MOV 4(PSP),Y    \ 3 MDlo
             MOV 2(PSP),T    \ 3 MDhi
             MOV @PSP+,W     \ 2 MRlo        -- d1lo d1hi +n2
@@ -324,7 +321,8 @@ BEGIN       BIT X,W         \ 1 test actual bit
             ADDC R4,R4      \ 1 (RLA LSBs) MDLO *2
             ADD X,X         \ 1 (RLA) NEXT BIT TO TEST
 U>= UNTIL   MOV R5,W        \ 1 IF BIT IN CARRY: FINISHED    32 * 16~ (average loop)
-            POPM R4,R5      \ 6 restore R4 ~ R5 regs
+\            POPM R4,R5      \ 6 restore R4 ~ R5 regs
+            POPM #2,R5      \ 6 restore R4 R5 regs
 \ UDM*END
     MOV TOS,T               \
     MOV @PSP,TOS            \

diff --git a/MSP430-FORTH/FixPoint.f b/MSP430-FORTH/FixPoint.f
index bac41f0..1a658f0 100644 (file)
--- a/MSP430-FORTH/FixPoint.f
+++ b/MSP430-FORTH/FixPoint.f
@@ -1,6 +1,29 @@
 \ TARGET SELECTION
 \ MSP_EXP430FR5739  MSP_EXP430FR5969    MSP_EXP430FR5994    MSP_EXP430FR6989
 \ MSP_EXP430FR2433  MSP_EXP430FR4133    MSP_EXP430FR2355    CHIPSTICK_FR2433
+\ MY_MSP430FR5738_1 MY_MSP430FR5738     MY_MSP430FR5948     MY_MSP430FR5948_1   
+\ JMJ_BOX
+
+\ REGISTERS USAGE
+\ rDODOES to rEXIT must be saved before use and restored after
+\ scratch registers Y to S are free for use
+\ under interrupt, IP is free for use
+
+\ PUSHM order : PSP,TOS, IP,  S,  T,  W,  X,  Y, rEXIT,rDOVAR,rDOCON, rDODOES, R3, SR,RSP, PC
+\ PUSHM order : R15,R14,R13,R12,R11,R10, R9, R8,  R7  ,  R6  ,  R5  ,   R4   , R3, R2, R1, R0
+
+\ example : PUSHM #6,IP pushes IP,S,T,W,X,Y registers to return stack
+\
+\ POPM  order :  PC,RSP, SR, R3, rDODOES,rDOCON,rDOVAR,rEXIT,  Y,  X,  W,  T,  S, IP,TOS,PSP
+\ POPM  order :  R0, R1, R2, R3,   R4   ,  R5  ,  R6  ,  R7 , R8, R9,R10,R11,R12,R13,R14,R15
+
+\ example : POPM #6,IP   pop Y,X,W,T,S,IP registers from return stack
+
+\ FORTH conditionnals:  unary{ 0= 0< 0> }, binary{ = < > U< }
+
+\ ASSEMBLER conditionnal usage with IF UNTIL WHILE  S<  S>=  U<   U>=  0=  0<>  0>=
+
+\ ASSEMBLER conditionnal usage with ?JMP ?GOTO      S<  S>=  U<   U>=  0=  0<>  <0
 
 
 PWR_STATE
@@ -50,22 +73,30 @@ CODE F-                     \ substract Q15.16 numbers
 ENDCODE
     \
 
+
+\ HERE
+
+
+$1A04 C@ $EF > [IF] ; test tag value MSP430FR413x subfamily without hardware_MPY 
+    \
+
+
 CODE F/                     \ Q15.16 / Q15.16 --> Q15.16 result
         MOV 2(PSP),S        \
-        XOR TOS,S           \ MDhi XOR MRhi --> S keep sign of result
+        XOR TOS,S           \ DVDhi XOR DVRhi --> S keep sign of result
         MOV #0,T            \ DVDlo = 0
         MOV 4(PSP),Y        \ DVDlo --> DVDhi
         MOV 2(PSP),X        \ DVDhi --> REMlo
-        BIT #8000,X         \ MD < 0 ? 
-0<> IF  XOR #-1,Y           \ lo
-        XOR #-1,X           \ hi
-        ADD #1,Y            \ lo
-        ADDC #0,X           \ hi
-THEN    BIT #8000,TOS
-0<> IF  XOR #-1,0(PSP)
-        XOR #-1,TOS
-        ADD #1,0(PSP)
-        ADDC #0,TOS
+        BIT #8000,X         \ DVD < 0 ? 
+0<> IF  XOR #-1,Y           \ INV(DVDlo)
+        XOR #-1,X           \ INV(DVDhi)
+        ADD #1,Y            \ INV(DVDlo)+1
+        ADDC #0,X           \ INV(DVDhi)+C
+THEN    BIT #8000,TOS       \ DVR < 0 ?
+0<> IF  XOR #-1,0(PSP)      \ INV(DVRlo)
+        XOR #-1,TOS         \ INV(DVRhi)
+        ADD #1,0(PSP)       \ INV(DVRlo)+1
+        ADDC #0,TOS         \ INV(DVRhi)+C
 THEN
 \ don't uncomment lines below !
 \ ------------------------------------------------------------------------
@@ -74,15 +105,16 @@ THEN
 \           MOV 4(PSP),T    \ DVDlo
 \           MOV 2(PSP),Y    \ DVDhi
 \           MOV #0,X        \ REMlo = 0
-            PUSHM R7,R4
+\            PUSHM R7,R4
+            PUSHM #4,R7
             MOV #0,W        \  REMhi = 0
-            MOV @PSP,R6     \  DIVlo
+            MOV @PSP,R6     \  DVRlo
             MOV #32,R5      \  init loop count
-BW1         CMP TOS,W       \ 1 REMhi = DIVhi ?
-    0= IF   CMP R6,X        \ 1 REMlo U< DIVlo ?
+BW1         CMP TOS,W       \ 1 REMhi = DVRhi ?
+    0= IF   CMP R6,X        \ 1 REMlo U< DVRlo ?
     THEN
-    U>= IF  SUB R6,X        \ 1 no:  REMlo - DIVlo  (carry is set)
-            SUBC TOS,W      \ 1      REMhi - DIVhi
+    U>= IF  SUB R6,X        \ 1 no:  REMlo - DVRlo  (carry is set)
+            SUBC TOS,W      \ 1      REMhi - DVRhi
     THEN
 BW2         ADDC R7,R7      \ 1 RLC quotLO
             ADDC R4,R4      \ 1 RLC quotHI
@@ -93,8 +125,8 @@ BW2         ADDC R7,R7      \ 1 RLC quotLO
             ADDC X,X        \ 1 RLC REMlo
             ADDC W,W        \ 1 RLC REMhi
             U< ?GOTO BW1    \ 2 15~ loop 
-            SUB R6,X        \ 1 REMlo - DIVlo
-            SUBC TOS,W      \ 1 REMhi - DIVhi
+            SUB R6,X        \ 1 REMlo - DVRlo
+            SUBC TOS,W      \ 1 REMhi - DVRhi
             BIS #1,SR       \ 1
             GOTO BW2        \ 2 16~ loop
 FW1
@@ -104,20 +136,17 @@ FW1
 
             MOV R7,0(PSP)   \ QUOTlo
             MOV R4,TOS      \ QUOThi
-            POPM R4,R7      \ restore R7 to R4
+            POPM #4,R7      \ restore R4 to R7
 \           MOV @IP+,PC     \ end of UD/MOD
 \ ------------------------------------------------------------------------
-BW1     AND #-1,S           \ clear V, set N
-S< IF   XOR #-1,0(PSP)
-        XOR #-1,TOS
-        ADD #1,0(PSP)
-        ADDC #0,TOS
+BW1     AND #-1,S           \ clear V, set N; QUOT < 0 ?
+S< IF   XOR #-1,0(PSP)      \ INV(QUOTlo)
+        XOR #-1,TOS         \ INV(QUOThi)
+        ADD #1,0(PSP)       \ INV(QUOTlo)+1
+        ADDC #0,TOS         \ INV(QUOThi)+C
 THEN    MOV @IP+,PC
 ENDCODE
-    \
-
-$1A04 C@ $EF > [IF] ; test tag value MSP430FR413x subfamily without hardware_MPY 
-    \
+    \ 
 
 \ F#S    Qhi Qlo -- Qhi 0   convert fractional part Qlo of Q15.16 fixed point number
 CODE F#S 
@@ -128,7 +157,9 @@ CODE F#S
             MOV #4,TOS              \ -- Qhi Qlo x      TOS = limit for base 16
             CMP #10,&BASE
 0= IF       ADD #1,TOS              \                   TOS = limit for base 10
-THEN        PUSHM TOS,IP            \
+THEN        
+\            PUSHM TOS,IP            \
+            PUSHM #2,TOS            \                   save TOS,IP
             MOV #0,S                \ -- Qhi Qlo x
 BEGIN       PUSH S                  \                   R-- limit IP count
             MOV &BASE,TOS           \ -- Qhi Qlo base
@@ -143,7 +174,8 @@ BEGIN       PUSH S                  \                   R-- limit IP count
             MOV.B TOS,HOLDS_ORG(S)  \ -- Qhi RESlo char     char to string
             ADD #1,S                \                       count+1
             CMP 2(RSP),S            \                       count=limit ?
-U>= UNTIL   POPM IP,TOS             \
+U>= UNTIL   
+            POPM #2,TOS             \                       restore IP,TOS
             MOV #0,0(PSP)           \ -- Qhi 0 len
             SUB #2,PSP              \ -- Qhi 0 x len
             MOV #HOLDS_ORG,0(PSP)   \ -- Qhi 0 addr len
@@ -155,7 +187,8 @@ ENDCODE
 \ don't use S reg (keep sign)
 CODE UDM*
             PUSH IP         \ 3
-            PUSHM R7,R4     \ 6 save R7 ~ R4 regs
+\            PUSHM R7,R4     \ 6 save R7 ~ R4 regs
+            PUSHM #4,R7     \ 6 save R7 ~ R4 regs
             MOV 4(PSP),IP   \ 3 MDlo
             MOV 2(PSP),T    \ 3 MDhi
             MOV @PSP,W      \ 2 MRlo
@@ -183,7 +216,7 @@ BEGIN       CMP #0,X
             ADDC Y,Y        \ 1 (RLA) NEXT BIT TO TEST
 U>= UNTIL   MOV R6,0(PSP)   \ 2 IF BIT IN CARRY: FINISHED    32 * 16~ (average loop)
             MOV R7,TOS      \ 1 high result in TOS
-            POPM R4,R7      \ 6 restore R4 ~ R7 regs
+            POPM #4,R7      \ 6 restore R4 to R7
             MOV @RSP+,IP    \ 2
             MOV @IP+,PC
 ENDCODE
@@ -211,6 +244,74 @@ ENDCODE
 [ELSE]                  \ hardware multiplier
     \
 
+CODE F/                     \ Q15.16 / Q15.16 --> Q15.16 result
+        MOV 2(PSP),S        \
+        XOR TOS,S           \ DVDhi XOR DVRhi --> S keep sign of result
+        MOV #0,T            \ DVDlo = 0
+        MOV 4(PSP),Y        \ DVDlo --> DVDhi
+        MOV 2(PSP),X        \ DVDhi --> REMlo
+        BIT #8000,X         \ DVD < 0 ? 
+0<> IF  XOR #-1,Y           \ INV(DVDlo)
+        XOR #-1,X           \ INV(DVDhi)
+        ADD #1,Y            \ INV(DVDlo)+1
+        ADDC #0,X           \ INV(DVDhi)+C
+THEN    BIT #8000,TOS       \ DVR < 0 ?
+0<> IF  XOR #-1,0(PSP)      \ INV(DVRlo)
+        XOR #-1,TOS         \ INV(DVRhi)
+        ADD #1,0(PSP)       \ INV(DVRlo)+1
+        ADDC #0,TOS         \ INV(DVRhi)+C
+THEN
+\ don't uncomment lines below !
+\ ------------------------------------------------------------------------
+\           UD/MOD    DVDlo DVDhi DVRlo DVRhi -- REMlo REMhi QUOTlo QUOThi
+\ ------------------------------------------------------------------------
+\           MOV 4(PSP),T    \ DVDlo
+\           MOV 2(PSP),Y    \ DVDhi
+\           MOV #0,X        \ REMlo = 0
+\            PUSHM R7,R4     \ PUSHM R7 to 4
+            PUSHM #4,R7     \ PUSHM R7 to R4
+            MOV #0,W        \  REMhi = 0
+            MOV @PSP,R6     \  DVRlo
+            MOV #32,R5      \  init loop count
+BW1         CMP TOS,W       \ 1 REMhi = DVRhi ?
+    0= IF   CMP R6,X        \ 1 REMlo U< DVRlo ?
+    THEN
+    U>= IF  SUB R6,X        \ 1 no:  REMlo - DVRlo  (carry is set)
+            SUBC TOS,W      \ 1      REMhi - DVRhi
+    THEN
+BW2         ADDC R7,R7      \ 1 RLC quotLO
+            ADDC R4,R4      \ 1 RLC quotHI
+            SUB #1,R5       \ 1 Decrement loop counter
+            0< ?GOTO FW1    \ 2 out of loop if count<0    
+            ADD T,T         \ 1 RLA DVDlo
+            ADDC Y,Y        \ 1 RLC DVDhi
+            ADDC X,X        \ 1 RLC REMlo
+            ADDC W,W        \ 1 RLC REMhi
+            U< ?GOTO BW1    \ 2 15~ loop 
+            SUB R6,X        \ 1 REMlo - DVRlo
+            SUBC TOS,W      \ 1 REMhi - DVRhi
+            BIS #1,SR       \ 1
+            GOTO BW2        \ 2 16~ loop
+FW1
+\           MOV X,4(PSP)    \ REMlo    
+\           MOV W,2(PSP)    \ REMhi
+            ADD #4,PSP      \ skip REMlo REMhi
+
+            MOV R7,0(PSP)   \ QUOTlo
+            MOV R4,TOS      \ QUOThi
+            POPM #4,R7      \ restore R4 to R7
+\           MOV @IP+,PC     \ end of UD/MOD
+\ ------------------------------------------------------------------------
+        AND #-1,S           \ clear V, set N; QUOT < 0 ?
+S< IF   XOR #-1,0(PSP)      \ INV(QUOTlo)
+        XOR #-1,TOS         \ INV(QUOThi)
+        ADD #1,0(PSP)       \ INV(QUOTlo)+1
+        ADDC #0,TOS         \ INV(QUOThi)+C
+THEN    MOV @IP+,PC
+ENDCODE
+    \
+
+
 \ F#S    Qhi Qlo -- Qhi 0   convert fractionnal part of Q15.16 fixed point number (direct order)
 CODE F#S
             MOV @PSP,X              \ -- Qlo Qhi    X = Qlo
@@ -277,7 +378,6 @@ ENDCODE
     \
 
 [UNDEFINED] 2CONSTANT [IF]
-    \
 
 \ https://forth-standard.org/standard/core/TwoFetch
 \ 2@    a-addr -- x1 x2    fetch 2 cells ; the lower address will appear on top of stack
@@ -296,26 +396,29 @@ CREATE
 DOES>
 2@              \ execution part
 ;
+
+[THEN] \of [UNDEFINED] 2CONSTANT [IF]
+
     \
 
-[THEN]
+[THEN] \ of [UNDEFINED] {FIXPOINT}
     \
 
-ECHO
 PWR_HERE
-    \
 
 ; -----------------------
 ; (volatile) tests
 ; -----------------------
+
+    \
 3,14159 2CONSTANT PI
 PI -1,0 F* 2CONSTANT -PI
     \
-PI 2,0 F/ F.  
 PI 2,0 F* F.  
-PI -2,0 F/ F.
 PI -2,0 F* F.
--PI 2,0 F/ F.
 -PI 2,0 F* F.
--PI -2,0 F/ F.
 -PI -2,0 F* F.
+PI 2,0 F/ F.  
+PI -2,0 F/ F.
+-PI 2,0 F/ F.
+-PI -2,0 F/ F.

diff --git a/MSP430-FORTH/LAST.4th b/MSP430-FORTH/LAST.4th
deleted file mode 100644 (file)
index cd71c99..0000000
--- a/MSP430-FORTH/LAST.4th
+++ /dev/null
@@ -1,167 +0,0 @@
-
-[DEFINED] {TOOLS} [IF] {TOOLS} [THEN]
-
-[UNDEFINED] {TOOLS} [IF]
-
-MARKER {TOOLS} 
-
-[UNDEFINED] ? [IF]
-CODE ?          
-    MOV @R14,R14
-    MOV #U.,R0
-ENDCODE
-[THEN]
-
-[UNDEFINED] .S [IF]
-CODE .S
-    MOV     R14,-2(R15)
-    MOV     R15,R14
-    SUB     #2,R14
-    MOV     R14,-6(R15)
-    MOV     #$1C80,R14
-    SUB     #2,R14
-BW1 MOV     R14,-4(R15)
-    SUB     #6,R15
-    SUB     @R15,R14
-    RRA     R14
-COLON
-    $3C EMIT
-    .
-    $08 EMIT
-    $3E EMIT SPACE
-    OVER OVER >
-    0= IF 
-        DROP DROP EXIT
-    THEN
-    DO 
-        I @ U.
-    2 +LOOP
-;
-[THEN]
-
-[UNDEFINED] .RS [IF]
-CODE .RS
-    MOV     R14,-2(R15)
-    MOV     R1,-6(R15)
-    MOV     #$1CE0,R14
-    GOTO    BW1
-ENDCODE
-[THEN]
-
-[UNDEFINED] WORDS [IF]
-
-[UNDEFINED] AND [IF]
-
-CODE AND
-AND @R15+,R14
-MOV @R13+,R0
-ENDCODE
-
-[THEN]
-
-[UNDEFINED] PAD [IF]
-
-$1CE4 CONSTANT PAD
-
-[THEN]
-
-: WORDS
-CR ."    "
-$1DD0 @
-    PAD $1800 @ DUP +
-    MOVE
-    BEGIN
-        0.
-        $1800 @ DUP + 0
-            DO
-            DUP I PAD + @
-                U< IF
-                    DROP DROP
-                    I DUP PAD + @
-                THEN
-            2 +LOOP
-        ?DUP
-    WHILE
-        DUP
-        2 - @
-        ROT
-        PAD +
-        !
-        DUP
-        COUNT $7F AND
-        TYPE
-        C@ $0F AND
-        $10 SWAP - SPACES
-    REPEAT
-    DROP
-;
-[THEN]
-
-[UNDEFINED] MAX [IF]
-    CODE MAX
-        CMP @R15,R14
-        S< ?GOTO FW1
-    BW1 ADD #2,R15
-        MOV @R13+,R0
-    ENDCODE
-
-    CODE MIN
-        CMP @R15,R14
-        S< ?GOTO BW1
-    FW1 MOV @R15+,R14
-        MOV @R13+,R0
-    ENDCODE
-[THEN]
-
-[UNDEFINED] U.R [IF]
-: U.R
->R  <# 0 # #S #>  
-R> OVER - 0 MAX SPACES TYPE
-;
-[THEN]
-
-[UNDEFINED] DUMP [IF]
-CODE DUMP
-PUSH R13
-PUSH &BASE
-MOV #$10,&BASE
-ADD @R15,R14
-LO2HI
-  SWAP OVER OVER
-  U. U.
-  $FFF0 AND
-  DO  CR
-    I 7 U.R SPACE
-      I $10 + I
-      DO I C@ 3 U.R LOOP  
-      SPACE SPACE
-      I $10 + I
-      DO I C@ $7E MIN BL MAX EMIT LOOP
-  $10 +LOOP
-  R> BASE !
-;
-[THEN]
-
-[THEN]
-
-ECHO
-
-PWR_HERE
-
-: BS 8 EMIT ;
-
-: ESC #27 EMIT ;
-
-: specs
-PWR_STATE
-6 0 DO BS LOOP
-ESC ." [7m"
-." FastForth "
-$1800 @ U. ." Threads "
-$1804 @ 0 1000 UM/MOD U. BS ." ," U. ." MHz "
-$1806 @ 0 10 UM/MOD U. BS ." ," U. ." kBds "
-$FF30 HERE - U. ." bytes free"
-ESC ." [0m"
-;
-
-specs
\ No newline at end of file

diff --git a/MSP430-FORTH/PROG100k.f b/MSP430-FORTH/PROG100k.f
index 106690e..8ee82e3 100644 (file)
--- a/MSP430-FORTH/PROG100k.f
+++ b/MSP430-FORTH/PROG100k.f
@@ -1,13 +1,12 @@
-; --------------------------------------------------------------
-; prog100k.4th, compile 100 kbytes, to test speed of compilation
-; --------------------------------------------------------------
+; -----------------------------------
+; PROG100k.f = 110 x RC5toLCD.4th
+; -----------------------------------
+
 \ TARGET SELECTION
 \ MSP_EXP430FR5739  MSP_EXP430FR5969    MSP_EXP430FR5994    MSP_EXP430FR6989
-\ MSP_EXP430FR4133  MSP_EXP430FR2355    CHIPSTICK_FR2433
-
-\ MY_MSP430FR5738_1 MY_MSP430FR5738     MY_MSP430FR5948     MY_MSP430FR5948_1   
-\ JMJ_BOX
+\ MSP_EXP430FR2355
 
+    \
 \ Copyright (C) <2016>  <J.M. THOORENS>
 \
 \ This program is free software: you can redistribute it and/or modify
@@ -33,19 +32,22 @@
 \ R4 to R7 must be saved before use and restored after
 \ scratch registers Y to S are free for use
 \ under interrupt, IP is free for use
+\ interrupts reset SR register !
 
-\ PUSHM order : PSP,TOS, IP,  S,  T,  W,  X,  Y, R7, R6, R5, R4
-\ example : PUSHM IP,Y
-\
-\ POPM  order :  R4, R5, R6, R7,  Y,  X,  W,  T,  S, IP,TOS,PSP
-\ example : POPM Y,IP
+\ PUSHM order : PSP,TOS, IP,  S,  T,  W,  X,  Y, rEXIT,rDOVAR,rDOCON, rDODOES, R3, SR,RSP, PC
+\ PUSHM order : R15,R14,R13,R12,R11,R10, R9, R8,  R7  ,  R6  ,  R5  ,   R4   , R3, R2, R1, R0
 
-\ FORTH conditionnals:  unary{ 0= 0< 0> }, binary{ = < > U< }
+\ example : PUSHM #6,IP pushes IP,S,T,W,X,Y registers to return stack
+\
+\ POPM  order :  PC,RSP, SR, R3, rDODOES,rDOCON,rDOVAR,rEXIT,  Y,  X,  W,  T,  S, IP,TOS,PSP
+\ POPM  order :  R0, R1, R2, R3,   R4   ,  R5  ,  R6  ,  R7 , R8, R9,R10,R11,R12,R13,R14,R15
 
-\ ASSEMBLER conditionnal usage with IF UNTIL WHILE  S<  S>=  U<   U>=  0=  0<>  0>=
+\ example : POPM #6,IP   pop Y,X,W,T,S,IP registers from return stack
 
-\ ASSEMBLER conditionnal usage with ?JMP ?GOTO      S<  S>=  U<   U>=  0=  0<>  <0
+\ ASSEMBLER conditionnal usage after IF UNTIL WHILE : S< S>= U< U>= 0= 0<> 0>=
+\ ASSEMBLER conditionnal usage before ?JMP ?GOTO    : S< S>= U< U>= 0= 0<> 0< 
 
+\ FORTH conditionnal    : 0= 0< = < > U<
 
 \ display on a LCD 2x20 CHAR the code sent by an IR remote under philips RC5 protocol
 \ target : any TI MSP-EXP430FRxxxx launchpad (FRAM)
@@ -59,7 +61,7 @@
 \        LCDVo current consumption ~ 500 uA.
 
 \ ===================================================================================
-\ notice : adjust TA0EX0,TB0CTL,TB0EX0 and 20_us to the target frequency if <> 8MHz !
+\ notice : adjust WDT_TIM_EX0,LCD_TIM_CTL,LCD_TIM_EX0 and 20_us to the target frequency if <> 8MHz !
 \ ===================================================================================
 
 
@@ -73,7 +75,7 @@
 \              / \ 1N4148   |
 \              ---          |
 \          100n |    2k2    |
-\ TB0.2 >---||--+--^/\/\/v--+---->  3 LCD_Vo (= 0V6 without modulation)
+\ LCD_TIM_.2 >---||--+--^/\/\/v--+---->  3 LCD_Vo (= 0V6 without modulation)
 \       ------------------------->  4 LCD_RW
 \       ------------------------->  5 LCD_RW
 \       ------------------------->  6 LCD_EN
@@ -87,47 +89,67 @@
 
 \ rc5   <--- OUT IR_Receiver (1 TSOP32236)
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
 
-PWR_STATE
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
     \
-[DEFINED] ASM [IF]
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
     \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -186,279 +208,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -466,85 +513,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -603,279 +694,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -883,85 +999,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -1020,279 +1180,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -1300,85 +1485,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -1437,279 +1666,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -1717,85 +1971,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -1854,279 +2152,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -2134,85 +2457,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -2271,279 +2638,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -2551,85 +2943,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -2688,279 +3124,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -2968,85 +3429,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -3105,279 +3610,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
-
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
-
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -3385,85 +3915,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -3522,279 +4096,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -3802,85 +4401,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -3939,279 +4582,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -4219,85 +4887,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -4356,279 +5068,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -4636,85 +5373,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -4773,279 +5554,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -5053,85 +5859,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -5190,279 +6040,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -5470,85 +6345,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -5607,279 +6526,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -5887,85 +6831,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -6024,279 +7012,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -6304,85 +7317,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -6441,279 +7498,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -6721,85 +7803,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -6858,365 +7984,434 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
 \ ------------------------------\
-\ define LPM mode for ACCEPT    \
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
 \ ------------------------------\
-\    MOV #LPM4,&LPM_MODE         \ with MSP430FR59xx
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
+\ ------------------------------\
+\ define LPM mode for ACCEPT    \
+\ ------------------------------\
+\    MOV #LPM4,&LPM_MODE         \ with MSP430FR59xx
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -7275,279 +8470,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -7555,85 +8775,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -7692,279 +8956,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -7972,85 +9261,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -8109,279 +9442,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
-
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
-
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
-
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -8389,85 +9747,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -8526,279 +9928,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -8806,85 +10233,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -8943,279 +10414,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
-LO2HI                           \ switch from assembler to FORTH
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
+LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -9223,85 +10719,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -9360,279 +10900,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -9640,85 +11205,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -9777,279 +11386,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -10057,86 +11691,130 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
-ENDCODE
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
+ENDCODE
     \
 
 CODE TOP_LCD                    \ LCD Sample
@@ -10194,279 +11872,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -10474,85 +12177,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -10611,279 +12358,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -10891,85 +12663,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -11028,279 +12844,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -11308,85 +13149,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -11445,279 +13330,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -11725,85 +13635,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -11862,365 +13816,434 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
 \ ------------------------------\
-\ define LPM mode for ACCEPT    \
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
 \ ------------------------------\
-\    MOV #LPM4,&LPM_MODE         \ with MSP430FR59xx
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
+\ ------------------------------\
+\ define LPM mode for ACCEPT    \
+\ ------------------------------\
+\    MOV #LPM4,&LPM_MODE         \ with MSP430FR59xx
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -12279,279 +14302,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -12559,85 +14607,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -12696,279 +14788,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -12976,85 +15093,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -13113,279 +15274,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
-
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
-
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
-
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -13393,85 +15579,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -13530,279 +15760,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -13810,85 +16065,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -13947,279 +16246,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
-LO2HI                           \ switch from assembler to FORTH
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
+LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -14227,85 +16551,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -14364,279 +16732,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -14644,85 +17037,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -14781,279 +17218,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -15061,86 +17523,130 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
-ENDCODE
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
+ENDCODE
     \
 
 CODE TOP_LCD                    \ LCD Sample
@@ -15198,279 +17704,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -15478,85 +18009,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -15615,279 +18190,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -15895,85 +18495,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -16032,279 +18676,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -16312,85 +18981,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -16449,279 +19162,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -16729,85 +19467,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -16866,365 +19648,434 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
 \ ------------------------------\
-\ define LPM mode for ACCEPT    \
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
 \ ------------------------------\
-\    MOV #LPM4,&LPM_MODE         \ with MSP430FR59xx
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
+\ ------------------------------\
+\ define LPM mode for ACCEPT    \
+\ ------------------------------\
+\    MOV #LPM4,&LPM_MODE         \ with MSP430FR59xx
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -17283,279 +20134,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -17563,85 +20439,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -17700,279 +20620,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -17980,85 +20925,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -18117,279 +21106,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
-
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
-
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
-
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -18397,85 +21411,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -18534,279 +21592,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -18814,85 +21897,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -18951,279 +22078,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
-LO2HI                           \ switch from assembler to FORTH
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
+LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -19231,85 +22383,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -19368,279 +22564,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -19648,85 +22869,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -19785,279 +23050,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -20065,86 +23355,130 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
-ENDCODE
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
+ENDCODE
     \
 
 CODE TOP_LCD                    \ LCD Sample
@@ -20202,279 +23536,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -20482,85 +23841,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -20619,279 +24022,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -20899,85 +24327,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -21036,279 +24508,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -21316,85 +24813,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -21453,279 +24994,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -21733,85 +25299,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -21870,365 +25480,434 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
 \ ------------------------------\
-\ define LPM mode for ACCEPT    \
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
 \ ------------------------------\
-\    MOV #LPM4,&LPM_MODE         \ with MSP430FR59xx
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
+\ ------------------------------\
+\ define LPM mode for ACCEPT    \
+\ ------------------------------\
+\    MOV #LPM4,&LPM_MODE         \ with MSP430FR59xx
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -22287,279 +25966,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -22567,85 +26271,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -22704,279 +26452,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -22984,85 +26757,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -23121,279 +26938,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
-
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
-
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
-
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -23401,85 +27243,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -23538,279 +27424,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -23818,85 +27729,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -23955,279 +27910,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
-LO2HI                           \ switch from assembler to FORTH
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
+LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -24235,85 +28215,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -24372,279 +28396,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -24652,85 +28701,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -24789,279 +28882,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -25069,86 +29187,130 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
-ENDCODE
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
+ENDCODE
     \
 
 CODE TOP_LCD                    \ LCD Sample
@@ -25206,279 +29368,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -25486,85 +29673,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -25623,279 +29854,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -25903,85 +30159,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -26040,279 +30340,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -26320,85 +30645,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -26457,279 +30826,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -26737,85 +31131,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -26874,365 +31312,434 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
 \ ------------------------------\
-\ define LPM mode for ACCEPT    \
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
 \ ------------------------------\
-\    MOV #LPM4,&LPM_MODE         \ with MSP430FR59xx
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
+\ ------------------------------\
+\ define LPM mode for ACCEPT    \
+\ ------------------------------\
+\    MOV #LPM4,&LPM_MODE         \ with MSP430FR59xx
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -27291,279 +31798,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -27571,85 +32103,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -27708,279 +32284,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -27988,85 +32589,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -28125,279 +32770,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
-
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
-
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
-
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -28405,85 +33075,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -28542,279 +33256,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -28822,85 +33561,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -28959,279 +33742,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
-LO2HI                           \ switch from assembler to FORTH
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
+LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -29239,85 +34047,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -29376,279 +34228,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -29656,85 +34533,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -29793,279 +34714,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -30073,86 +35019,130 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
-ENDCODE
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
+ENDCODE
     \
 
 CODE TOP_LCD                    \ LCD Sample
@@ -30210,279 +35200,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -30490,85 +35505,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -30627,279 +35686,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -30907,85 +35991,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -31044,279 +36172,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -31324,85 +36477,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -31461,279 +36658,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -31741,85 +36963,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -31878,365 +37144,434 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
 \ ------------------------------\
-\ define LPM mode for ACCEPT    \
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
 \ ------------------------------\
-\    MOV #LPM4,&LPM_MODE         \ with MSP430FR59xx
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
+\ ------------------------------\
+\ define LPM mode for ACCEPT    \
+\ ------------------------------\
+\    MOV #LPM4,&LPM_MODE         \ with MSP430FR59xx
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -32295,279 +37630,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -32575,85 +37935,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -32712,279 +38116,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -32992,85 +38421,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -33129,279 +38602,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
-
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
-
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
-
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -33409,85 +38907,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -33546,279 +39088,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -33826,85 +39393,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -33963,279 +39574,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
-LO2HI                           \ switch from assembler to FORTH
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
+LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -34243,85 +39879,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -34380,279 +40060,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -34660,85 +40365,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -34797,279 +40546,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -35077,86 +40851,130 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
-ENDCODE
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
+ENDCODE
     \
 
 CODE TOP_LCD                    \ LCD Sample
@@ -35214,279 +41032,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -35494,85 +41337,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -35631,279 +41518,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -35911,85 +41823,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -36048,279 +42004,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -36328,85 +42309,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -36465,279 +42490,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -36745,85 +42795,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -36882,365 +42976,434 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
 \ ------------------------------\
-\ define LPM mode for ACCEPT    \
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
 \ ------------------------------\
-\    MOV #LPM4,&LPM_MODE         \ with MSP430FR59xx
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
+\ ------------------------------\
+\ define LPM mode for ACCEPT    \
+\ ------------------------------\
+\    MOV #LPM4,&LPM_MODE         \ with MSP430FR59xx
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -37299,279 +43462,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -37579,85 +43767,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -37716,279 +43948,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -37996,85 +44253,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -38133,279 +44434,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
-
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
-
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
-
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -38413,85 +44739,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -38550,279 +44920,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -38830,85 +45225,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -38967,279 +45406,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
-LO2HI                           \ switch from assembler to FORTH
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
+LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -39247,85 +45711,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -39384,279 +45892,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -39664,85 +46197,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -39801,279 +46378,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -40081,86 +46683,130 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
-ENDCODE
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
+ENDCODE
     \
 
 CODE TOP_LCD                    \ LCD Sample
@@ -40218,279 +46864,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -40498,85 +47169,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -40635,279 +47350,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -40915,85 +47655,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -41052,279 +47836,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -41332,85 +48141,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -41469,279 +48322,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -41749,85 +48627,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -41886,365 +48808,434 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
 \ ------------------------------\
-\ define LPM mode for ACCEPT    \
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
 \ ------------------------------\
-\    MOV #LPM4,&LPM_MODE         \ with MSP430FR59xx
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
+\ ------------------------------\
+\ define LPM mode for ACCEPT    \
+\ ------------------------------\
+\    MOV #LPM4,&LPM_MODE         \ with MSP430FR59xx
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -42303,279 +49294,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -42583,85 +49599,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -42720,279 +49780,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -43000,85 +50085,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -43137,279 +50266,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
-
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
-
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
-
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -43417,85 +50571,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
 
-PWR_STATE   ;
 
 
+
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -43554,279 +50752,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -43834,85 +51057,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -43971,279 +51238,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -44251,85 +51543,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -44388,279 +51724,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -44668,85 +52029,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
 
-PWR_STATE   ;
 
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
+
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -44805,279 +52210,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
 \ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
-\ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -45085,85 +52515,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
+
 
-PWR_STATE   ;
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
 
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -45222,279 +52696,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -45502,85 +53001,129 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 
+ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
+
 
-PWR_STATE   ;
 
+[DEFINED] {RC5TOLCD} [IF] {RC5TOLCD} [THEN]     \ remove application
 
+[DEFINED] ASM [IF]      \ security test
+    \
+MARKER {RC5TOLCD}
+    \
+[UNDEFINED] MAX [IF]    \ MAX and MIN are defined in {ANS_COMP}
+    \
 CODE MAX    \    n1 n2 -- n3       signed maximum
-            CMP     @PSP,TOS    \ n2-n1
-            S<      ?GOTO FW1   \ n2<n1
-BW1         ADD     #2,PSP
-            MOV     @IP+,PC
+    CMP @PSP,TOS    \ n2-n1
+    S<  ?GOTO FW1   \ n2<n1
+BW1 ADD #2,PSP
+    MOV @IP+,PC
 ENDCODE
     \
 
 CODE MIN    \    n1 n2 -- n3       signed minimum
-            CMP     @PSP,TOS     \ n2-n1
-            S<      ?GOTO BW1    \ n2<n1
-FW1         MOV     @PSP+,TOS
-            MOV     @IP+,PC
+    CMP @PSP,TOS     \ n2-n1
+    S<  ?GOTO BW1    \ n2<n1
+FW1 MOV @PSP+,TOS
+    MOV @IP+,PC
 ENDCODE
+
+[THEN]
     \
 
+[UNDEFINED] U.R [IF]        \ defined in {UTILITY}
 : U.R                       \ u n --           display u unsigned in n width (n >= 2)
   >R  <# 0 # #S #>  
   R> OVER - 0 MAX SPACES TYPE
 ;
+[THEN]
     \
 
-CODE 20_US                      \ n --      n * 20 us
-BEGIN                           \ 3 cycles loop + 6~  
-\    MOV     #5,W                \ 3 MCLK = 1 MHz
-\    MOV     #23,W               \ 3 MCLK = 4 MHz
-    MOV     #51,W               \ 3 MCLK = 8 MHz
-\    MOV     #104,W              \ 3 MCLK = 16 MHz
-\    MOV     #158,W              \ 3 MCLK = 24 MHz
-    BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
-        SUB #1,W                \ 1
-    0= UNTIL                    \ 2
-    SUB     #1,TOS              \ 1
-0= UNTIL                        \ 2
-    MOV     @PSP+,TOS           \ 2
-    MOV     @IP+,PC             \ 4
+\ CODE 20_US                      \ n --      n * 20 us
+\ BEGIN                           \ 3 cycles loop + 6~  
+\ \    MOV     #5,W                \ 3 MCLK = 1 MHz
+\ \    MOV     #23,W               \ 3 MCLK = 4 MHz
+\ \    MOV     #51,W               \ 3 MCLK = 8 MHz
+\     MOV     #104,W              \ 3 MCLK = 16 MHz
+\ \    MOV     #158,W              \ 3 MCLK = 24 MHz
+\     BEGIN                       \ 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
+\         SUB #1,W                \ 1
+\     0= UNTIL                    \ 2
+\     SUB     #1,TOS              \ 1
+\ 0= UNTIL                        \ 2
+\     MOV     @PSP+,TOS           \ 2
+\     MOV     @IP+,PC             \ 4
+\ ENDCODE
+\     \
+
+CODE 20_US                  \ n --      n * 20 us
+BEGIN                       \ here we presume that LCD_TIM_IFG = 1...
+    BEGIN
+        BIT #1,&LCD_TIM_CTL      \ 3
+    0<> UNTIL               \ 2         loop until LCD_TIM_IFG set
+    BIC #1,&LCD_TIM_CTL          \ 3         clear LCD_TIM_IFG
+    SUB #1,TOS              \ 1
+U< UNTIL                    \ 2 ...so add a dummy loop with U< instead of 0=
+MOV @PSP+,TOS               \ 2
+MOV @IP+,PC                 \ 4
 ENDCODE
     \
 
@@ -45639,279 +53182,304 @@ ENDCODE
 ;
     \
 
-\ : LCD_Entry_set       $04 OR LCD_WrF ;
-
-\ : LCD_Display_Ctrl    $08 OR LCD_WrF ;
-
-\ : LCD_Display_Shift   $10 OR LCD_WrF ;
-
-\ : LCD_Fn_Set          $20 OR LCD_WrF ;
-
-\ : LCD_CGRAM_Set       $40 OR LCD_WrF ;
-
-\ : LCD_Goto            $80 OR LCD_WrF ;
-
-\ CODE LCD_R                      \ -- byte       read byte from LCD
-\     BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
-\     BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
-\ COLON                           \ starts a FORTH word
-\     TOP_LCD 2 20_us             \ -- %0000HHHH
-\     TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
-\ HI2LO                           \ switch from FORTH to assembler
-\     RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
-\     ADD.B @PSP+,TOS             \ -- %HHHHLLLL
-\     MOV @RSP+,IP                \ restore IP saved by COLON
-\     MOV @IP+,PC                 \
-\ ENDCODE
-\     \
+[UNDEFINED] OR [IF]
+    \
+\ https://forth-standard.org/standard/core/OR
+\ C OR     x1 x2 -- x3           logical OR
+CODE OR
+BIS @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
 
-\ CODE LCD_RdS                    \ -- status       Read Status
-\     BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
-\     JMP LCD_R
-\ ENDCODE
-\     \
+[THEN]
+    \
+: LCD_Entry_set     $04 OR LCD_WrF ;
+    \
+: LCD_DSP_Ctrl      $08 OR LCD_WrF ;
+    \
+: LCD_DSP_Shift     $10 OR LCD_WrF ;
+    \
+: LCD_Fn_Set        $20 OR LCD_WrF ;
+    \
+: LCD_CGRAM_Set     $40 OR LCD_WrF ;
+    \
+: LCD_Goto          $80 OR LCD_WrF ;
+    \
+CODE LCD_R                      \ -- byte       read byte from LCD
+    BIC.B #LCD_DB,&LCD_DB_DIR   \ LCD_Data as intput
+    BIS.B #LCD_RW,&LCD_CMD_OUT  \ lcd_rw=1
+COLON                           \ starts a FORTH word
+    TOP_LCD 2 20_us             \ -- %0000HHHH
+    TOP_LCD 2 20_us             \ -- %0000HHHH %0000LLLL
+HI2LO                           \ switch from FORTH to assembler
+    RLAM #4,0(PSP)              \ -- %HHHH0000 %0000LLLL
+    ADD.B @PSP+,TOS             \ -- %HHHHLLLL
+    MOV @RSP+,IP                \ restore IP saved by COLON
+    MOV @IP+,PC                 \
+ENDCODE
+    \
 
-\ CODE LCD_RdC                    \ -- char         Read Char
-\     BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
-\     JMP LCD_R
-\ ENDCODE
-\     \
+CODE LCD_RdS                    \ -- status       Read Status
+    BIC.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=0
+    JMP LCD_R
+ENDCODE
+    \
 
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ SR(low byte) | SCG1 | SCG0 |OSCOFF|CPUOFF||GIE| N | Z | C | current |
-\ -------------+------+------+------+------++---+---+---+---+---------+
-\ LPM0 = $18  |  0   |  0   |  0   |  1   || 1 | x | x | x |  180uA  | default mode
-\ LPM1 = $58  |  0   |  1   |  0   |  1   || 1 | x | x | x |         | same mode as LPM0
-\ LPM2 = $98  |  1   |  0   |  0   |  1   || 1 | x | x | x |   60uA  |
-\ LPM3 = $D8  |  1   |  1   |  0   |  1   || 1 | x | x | x |   10uA  | 32768Hz XTAL is running
-\ LPM4 = $F8  |  1   |  1   |  1   |  1   || 1 | x | x | x |    6uA  |
-\ -------------+------+------+------+------++---+---+---+---+---------+
+CODE LCD_RdC                    \ -- char         Read Char
+    BIS.B #LCD_RS,&LCD_CMD_OUT  \ lcd_rs=1
+    JMP LCD_R
+ENDCODE
+    \
 
 
 \ ******************************\
 ASM WDT_INT                     \ Watchdog interrupt routine, warning : not FORTH executable !
 \ ******************************\
-BIC #$F8,0(RSP)                \ set CPU ON and GIE OFF in retiSR to force fall down to LPM mode
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
+\ XOR.B #LED1,&LED1_OUT           \ to visualise WDT
 BIT.B #SW2,&SW2_IN              \ test switch S2
 0= IF                           \ case of switch S2 pressed
-    CMP #38,&TB0CCR2            \ maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
+    CMP #19,&LCD_TIM_CCR2       \ maxi Ton = 19/20 & VDD=3V6 ==> LCD_Vo = -1V4
     U< IF
-        ADD #1,&TB0CCR2         \ action for switch S2 (P2.5) : 78 mV / increment
+        ADD #1,&LCD_TIM_CCR2    \ action for switch S2 (P2.5) : 150 mV / increment
     THEN
 ELSE
     BIT.B #SW1,&SW1_IN          \ test switch S1 input
     0= IF                       \ case of Switch S1 pressed
-        CMP #7,&TB0CCR2         \ mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
+        CMP #3,&LCD_TIM_CCR2    \ mini Ton = 3/20 & VDD=3V6 ==> LCD_Vo = 0V
         U>= IF                  \
-            SUB #1,&TB0CCR2     \ action for switch S1 (P2.6) : -78 mV / decrement
+           SUB #1,&LCD_TIM_CCR2 \ action for switch S1 (P2.6) : -150 mV / decrement
         THEN                    \
     THEN                        \
 THEN                            \
-RETI                            \ CPU is ON, GIE is OFF
-ENDASM                          \
+BW1                             \ from quit on truncated RC5 message
+BW2                             \ from repeated RC5 command
+BW3                             \ from end of RC5_INT
+BIC #$78,0(RSP)                 \ 4  SCG0,OSCOFF,CPUOFF and GIE are OFF in retiSR to force LPM0_LOOP despite pending interrupt
+RETI                            \ 5
+ENDASM
     \
 
-
-\ ------------------------------\
-\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
 \ ******************************\
 ASM RC5_INT                     \   wake up on Px.RC5 change interrupt
 \ ******************************\
+\ IR_RC5 driver                 \ IP,S,T,W,X,Y registers are free for use
+\ ******************************\
 \                               \ in :  SR(9)=old Toggle bit memory (ADD on)
 \                               \       SMclock = 8|16|24 MHz
-\                               \ use : BASE,TOS,IP,W,X,Y, TA0 timer, TA0R register
-\                               \ out : TOS = 0 C6 C5 C4 C3 C2 C1 C0
+\                               \ use : T,W,X,Y, RC5_TIM_ timer, RC5_TIM_R register
+\                               \ out : X = 0 C6 C5 C4 C3 C2 C1 C0
 \                               \       SR(9)=new Toggle bit memory (ADD on)
-\ ------------------------------\
-BIC     #$F8,0(RSP)            \ CPU is ON and GIE is OFF in retiSR to force fall down to LPM0_LOOP
-\ ------------------------------\
-\ define LPM mode for ACCEPT    \
-\ ------------------------------\
-\ MOV #LPM4,&LPM_MODE             \ with MSP430FR59xx
-\ MOV #LPM2,&LPM_MODE             \ with MSP430FR57xx, terminal input don't work for LPMx > 2
-\                                 \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
-\ ------------------------------\
+\ ******************************\
 \ RC5_FirstStartBitHalfCycle:   \
-\ ------------------------------\
-MOV     #0,&TA0EX0              \ predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
-\ MOV     #1,&TA0EX0              \ predivide by 2 in TA0EX0 register (16 MHZ)
-\ MOV     #2,&TA0EX0              \ predivide by 3 in TA0EX0 register (24 MHZ)
-MOV     #1778,X                 \ RC5_Period in us
-MOV     #14,W                   \ count of loop
+\ ******************************\                division in RC5_TIM_CTL (SMCLK/1|SMCLK/1|SMCLK/2|SMCLK/4|SMCLK/8)
+\ MOV #0,&RC5_TIM_EX0           \ predivide by 1 in RC5_TIM_EX0 register ( 125kHz|  1MHz |  2MHZ |  4MHZ |  8MHZ ), reset value
+  MOV #1,&RC5_TIM_EX0           \ predivide by 2 in RC5_TIM_EX0 register ( 250kHZ|  2MHz |  4MHZ |  8MHZ | 16MHZ )
+\ MOV #2,&RC5_TIM_EX0           \ predivide by 3 in RC5_TIM_EX0 register ( 375kHz|  3MHz |  6MHZ | 12MHZ | 24MHZ )
+\ MOV #3,&RC5_TIM_EX0           \ predivide by 4 in RC5_TIM_EX0 register ( 500kHZ|  4MHz |  8MHZ | 16MHZ )
+\ MOV #4,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 625kHz|  5MHz | 10MHZ | 20MHZ )
+\ MOV #5,&RC5_TIM_EX0           \ predivide by 6 in RC5_TIM_EX0 register ( 750kHz|  6MHz | 12MHZ | 24MHZ )
+\ MOV #6,&RC5_TIM_EX0           \ predivide by 7 in RC5_TIM_EX0 register ( 875kHz|  7MHz | 14MHZ | 28MHZ )
+\ MOV #7,&RC5_TIM_EX0           \ predivide by 8 in RC5_TIM_EX0 register (  1MHz |  8MHz | 16MHZ | 32MHZ )
+MOV #1778,X                     \ RC5_Period * 1us
+\ MOV #222,X                    \ RC5_Period * 8us (SMCLK/1 and first column above)
+MOV #14,W                       \ count of loop
 BEGIN                           \
-\ ------------------------------\
-\ RC5_TopSynchro:               \ <--- loop back ---+ with readjusted RC5_Period
-\ ------------------------------\                   | here, we are just after 1/2 RC5_cycle
-    MOV #%1011100100,&TA0CTL   \ (re)start timer_A | SMCLK/8 : 1us time interval,free running,clear TA0_IFG and TA0R
+\ ******************************\
+\ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
+\ ******************************\                   |
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
-    MOV     X,Y                 \ Y=1/2             ^
+    MOV     X,Y                 \                   ^
     RRUM    #1,Y                \ Y=1/4
-    ADD     X,Y                 \ Y=3/4
-\ RC5_Wait_1_1/4                \ wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle+1
-    BEGIN   CMP Y,&TA0R         \ CMP &TA0R with 3/4 cycle value 
-    0= UNTIL                    \
-\ ------------------------------\
-\ RC5_Sample:                   \ at 5/4 cycle, we can sample RC5_input, ST2/C6 bit first
-\ ------------------------------\
+    ADD     X,Y                 \ Y=3/4 cycle
+    BEGIN   CMP Y,&RC5_TIM_R    \ 3 wait 1/2 + 3/4 cycle = n+1/4 cycles 
+    U>= UNTIL                   \ 2
+\ ******************************\
+\ RC5_SampleOnFirstQuarter      \ at n+1/4 cycles, we sample RC5_input, ST2/C6 bit first
+\ ******************************\
     BIT.B   #RC5,&IR_IN         \ C_flag = IR bit
-    ADDC    IP,IP               \ C_flag <-- IP(15):IP(0) <-- C_flag
-    MOV     &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
+    ADDC    T,T                 \ C_flag <-- T(15):T(0) <-- C_flag
+    MOV.B   &IR_IN,&IR_IES      \ preset Px_IES.y state for next IFG
     BIC.B   #RC5,&IR_IFG        \ clear Px_IFG.y after 4/4 cycle pin change
     SUB     #1,W                \ decrement count loop
-\                               \  count = 13 ==> IP = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
-\                               \  count = 0  ==> IP = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
+\                               \  count = 13 ==> T = x  x  x  x  x  x  x  x |x  x  x  x  x  x  x /C6
+\                               \  count = 0  ==> T = x  x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0  1 
 0<> WHILE                       \ ----> out of loop ----+
-\ RC5_compute_7/4_Time_out:     \                       |
-    ADD     X,Y                 \                       |   out of bound = 7/4 period 
-\ RC5_WaitHalfCycleP1.2_IFG:    \                       |
+    ADD X,Y                     \                       |   Y = n+3/4 cycles = time out because n+1/2 cycles edge is always present
     BEGIN                       \                       |
-        CMP     Y,&TA0R         \                       |   TA0R = 5/4 cycle test
-        0>= IF                  \                       |   if cycle time out of bound
-            BIC  #$30,&TA0CTL  \                       |   stop timer_A0
-            RETI                \                       |   then quit to do nothing
-        THEN                    \                       |
-\ ------------------------------\                       |
-        BIT.B   #RC5,&IR_IFG    \                   ^   |   test P1.2_IFG
-    0<> UNTIL                   \                   |   |
-    MOV     &TA0R,X             \                   |   |   get new RC5_period value 
-REPEAT                          \ ----> loop back --+   |
-\ ------------------------------\                       |
+        MOV &RC5_TIM_R,X        \ 3                     |   X grows from n+1/4 up to n+3/4 cycles
+        CMP Y,X                 \ 1                     |   cycle time out of bound ?
+        U>= IF                  \ 2                 ^   |   yes:
+        BIC #$30,&RC5_TIM_CTL   \                   |   |      stop timer
+        GOTO BW1                \                   |   |      quit on truncated RC5 message
+        THEN                    \                   |   |
+        BIT.B #RC5,&IR_IFG      \ 3                 |   |   n+1/2 cycles edge is always present
+    0<> UNTIL                   \ 2                 |   |
+REPEAT                          \ ----> loop back --+   |   with X = new RC5_period value
+\ ******************************\                       |
 \ RC5_SampleEndOf:              \ <---------------------+
-\ ------------------------------\
-BIC     #$30,&TA0CTL           \ stop timer_A0
-RLAM    #1,IP                   \ IP =  x /C6 Tg A4 A3 A2|A1 A0 C5 C4 C3 C2 C1 C0  1  0
-\ ******************************\
-\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
 \ ******************************\
-MOV     @RSP,X                  \ retiSR(9)  = old UF9 = old RC5 toggle bit
-RLAM    #4,X                    \ retiSR(11,10,9)= X(11,10,9) --> X(15,14,13)
-XOR     IP,X                    \ (new XOR old) Toggle bit (13)
-BIT     #BIT13,X                \ X(13) = New_RC5_command
-0= IF RETI                      \ case of repeated RC5_command : RETI without SR(9) change
-THEN                            \
-XOR     #UF9,0(RSP)             \ change Toggle bit memory, UserFlag1 = SR(9) = 1
+BIC #$30,&RC5_TIM_CTL           \   stop timer
 \ ******************************\
 \ RC5_ComputeNewRC5word         \
 \ ******************************\
-SUB     #4,PSP                  \
-MOV     &BASE,2(PSP)            \ save variable BASE before use
-MOV     TOS,0(PSP)              \ save TOS before use
-MOV.B   IP,TOS                  \ TOS = C5 C4 C3 C2 C1 C0  0  0
-RRUM    #2,TOS                  \ TOS =  0  0 C5 C4 C3 C2 C1 C0
+RLAM    #1,T                    \ T =  x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0  1  0
+MOV.B   T,X                     \ X = C5 C4 C3 C2 C1 C0  1  0
+RRUM    #2,X                    \ X =  0  0 C5 C4 C3 C2 C1 C0
 \ ******************************\
 \ RC5_ComputeC6bit              \
 \ ******************************\
-BIT     #$4000,IP              \ test /C6 bit in IP
-0= IF   BIS #$40,TOS           \ set C6 bit in S
-THEN                            \ TOS =  0  C6 C5 C4 C3 C2 C1 C0
+BIT     #BIT14,T                \ test /C6 bit in T
+0= IF   BIS #BIT6,X             \ set C6 bit in X
+THEN                            \ X =  0  C6 C5 C4 C3 C2 C1 C0
 \ ******************************\
-\ RC5_CommandByteIsDone         \ RC5_code --
+\ RC5_CommandByteIsDone         \ -- BASE RC5_code
 \ ******************************\
-
-\ ------------------------------\
-\ Display IR_RC5 code           \
-\ ------------------------------\
-\ BIS.B #LED1,&LED1_OUT           \ switch ON LED1, comment if no LED
-\ ------------------------------\
+\ Only New_RC5_Command ADD_ON   \ use SR(9) bit as toggle bit
+\ ******************************\
+RRUM    #3,T                    \ new toggle bit = T(13) ==> T(10)
+XOR     @RSP,T                  \ (new XOR old) Toggle bits
+BIT     #UF10,T                 \ repeated RC5_command ?
+0= ?GOTO BW2                    \ yes, RETI without UF10 change and without action !
+XOR #UF10,0(RSP)                \ 5 toggle bit memory
+\ ******************************\
+\ Display IR_RC5 code           \ X = RC5 code
+\ ******************************\
+SUB #4,PSP                      \
+MOV &BASE,2(PSP)                \ save current base
+MOV #$10,&BASE                  \ set hex base
+MOV TOS,0(PSP)                  \ save TOS
+MOV X,TOS                       \
 LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
-    $10 BASE !                 \ change BASE to hexadecimal
-    CR ." $" 2 U.R             \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    CR ." $" 2 U.R              \ print IR_RC5 code
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
+MOV TOS,&BASE                   \ restore current BASE
+MOV @PSP+,TOS                   \
+\ ******************************\
+GOTO BW3
+\ ******************************\
+ENDASM
+    \ 
+
 \ ------------------------------\
-\ BIC.B #LED1,&LED1_OUT           \ switch OFF LED1, comment if no LED
+ASM BACKGROUND                  \ 
 \ ------------------------------\
-MOV @PSP+,&BASE                 \ restore variable BASE
-RETI                            \ CPU is ON, GIE is OFF
+\ ...                           \ insert here your background task
+\ ...                           \
+\ ...                           \
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
-    \ 
+\ ------------------------------\
+    \
 
 CODE START                      \
 \ ------------------------------\
-\ TB0CTL = %0000 0010 1001 0100\$3C0
-\               - -             \CNTL Counter lentgh \ 00 = 16 bits
-\                   --          \TBSSEL TimerB clock select \ 10 = SMCLK
-\                      --       \ID input divider \ 10 = /4
-\                        --     \MC Mode Control \ 01 = up to TB0CCR0
-\                            -  \TBCLR TimerB Clear
-\                             - \TBIE
-\                              -\TBIFG
-\ --------------------------------\\
-\ TB0CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
-\              --                 \CM Capture Mode
-\                --               \CCIS
-\                   -             \SCS
-\                    --           \CLLD
-\                      -          \CAP
-\                        ---      \OUTMOD \ 011 = set/reset
-\                           -     \CCIE
-\                             -   \CCI
-\                              -  \OUT
-\                               - \COV
-\                                -\CCIFG
-\ TB0CCRx                         \$3D{2,4,6,8,A,C,E}
-\ TB0EX0                          \$3E0 
-\ ------------------------------\
-\ set TimerB to make 50kHz PWM  \
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #0,&TB0EX0             \ predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
-\ ------------------------------\
-\    MOV #%1000010100,&TB0CTL  \ SMCLK/1, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (4 MHZ)
-\ ------------------------------\
-    MOV #%1010010100,&TB0CTL   \ SMCLK/4, up mode, clear timer, no int
-    MOV #0,&TB0EX0              \ predivide by 1 in TB0EX0 register (8 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #1,&TB0EX0             \ predivide by 2 in TB0EX0 register (16 MHZ)
-\ ------------------------------\
-\    MOV #%1010010100,&TB0CTL  \ SMCLK/4, up mode, clear timer, no int
-\    MOV #2,&TB0EX0             \ predivide by 3 in TB0EX0 register (24 MHZ)
-\ ------------------------------\
-    MOV #40,&TB0CCR0            \ 40*0.5us=20us (40us @ 1MHz)
-\ ------------------------------\
-\ set TimerB to generate PWM for LCD_Vo
-\ ------------------------------\
-    MOV #%1100000,&TB0CCTL2    \ output mode = set/reset \ clear CCIFG
-\    MOV #20,&TB0CCR2           \ contrast adjust : 20/40 ==> LCD_Vo = -1V1|+3V6 (Vcc=3V6)
-    MOV #25,&TB0CCR2            \ contrast adjust : 25/40 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
+\ LCD_TIM_CTL =  %0000 0010 1001 0100\$3C0
+\                    - -             \CNTL Counter lentgh \ 00 = 16 bits
+\                        --          \TBSSEL TimerB clock select \ 10 = SMCLK
+\                           --       \ID input divider \ 10 = /4
+\                             --     \MC Mode Control \ 01 = up to LCD_TIM_CCR0
+\                                 -  \TBCLR TimerB Clear
+\                                  - \TBIE
+\                                   -\TBIFG
+\ -------------------------------\
+\ LCD_TIM_CCTLx = %0000 0000 0110 0000\$3C{2,4,6,8,A,C,E}
+\                  --                 \CM Capture Mode
+\                    --               \CCIS
+\                       -             \SCS
+\                        --           \CLLD
+\                          -          \CAP
+\                            ---      \OUTMOD \ 011 = set/reset
+\                               -     \CCIE
+\                                 -   \CCI
+\                                  -  \OUT
+\                                   - \COV
+\                                    -\CCIFG
+\ -------------------------------\
+\ LCD_TIM_CCRx                   \
+\ -------------------------------\
+\ LCD_TIM_EX0                    \ 
+\ ------------------------------\
+\ set LCD_TIM_ to make 50kHz PWM \ for LCD_Vo, works without interrupt
+\ ------------------------------\
+\    MOV #%1000010100,&LCD_TIM_CTL \ SMCLK/1, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (1 MHZ)
+\ ------------------------------\
+\    MOV #%1001010100,&LCD_TIM_CTL \ SMCLK/2, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (2 MHZ)
+\ ------------------------------\
+\    MOV #%1010010100,&LCD_TIM_CTL \ SMCLK/4, up mode, clear timer, no int
+\    MOV #1,&LCD_TIM_EX0        \ predivide by 2 in LCD_TIM_EX0 register (4 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #0,&LCD_TIM_EX0        \ predivide by 1 in LCD_TIM_EX0 register (8 MHZ)
+\ ------------------------------\
+    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+    MOV #1,&LCD_TIM_EX0         \ predivide by 2 in LCD_TIM_EX0 register (16 MHZ)
+\ ------------------------------\
+\    MOV #%1011010100,&LCD_TIM_CTL \ SMCLK/8, up mode, clear timer, no int
+\    MOV #2,&LCD_TIM_EX0        \ predivide by 3 in LCD_TIM_EX0 register (24 MHZ)
+\ ------------------------------\
+    MOV #19,&LCD_TIM_CCR0       \ 19+1=20*1us=20us
+\ ------------------------------\
+\ set LCD_TIM_.2 to generate PWM for LCD_Vo
+\ ------------------------------\
+    MOV #%01100000,&LCD_TIM_CCTL2 \ output mode = set/reset \ clear CCIFG
+    MOV #10,&LCD_TIM_CCR2       \ contrast adjust : 10/20 ==> LCD_Vo = -0V6|+3V6 (Vcc=3V6)
+\    MOV #12,&LCD_TIM_CCR2        \ contrast adjust : 12/20 ==> LCD_Vo = -1V4|+3V3 (Vcc=3V3)
 \ ------------------------------\
     BIS.B #LCDVo,&LCDVo_DIR     \
-    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2 TB0.2
+    BIS.B #LCDVo,&LCDVo_SEL     \ SEL.2
 \ ------------------------------\
     BIS.B #LCD_CMD,&LCD_CMD_DIR \ lcd_cmd as outputs
     BIC.B #LCD_CMD,&LCD_CMD_REN \ lcd_cmd pullup/down disable
 \ ------------------------------\
     BIS.B #LCD_DB,&LCD_DB_DIR   \ as output, wired to DB(4-7) LCD_Data
     BIC.B #LCD_DB,&LCD_DB_REN   \ LCD_Data pullup/down disable
-\ ------------------------------\
-\ WDT interval init part        \
-\ ------------------------------\
-    MOV #$5A5E,&WDTCTL         \ init WDT VLOCLK source ~10kHz /2^9 (50 ms), interval mode
-\    MOV #$5A3D,&WDTCTL         \ init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
-\    MOV #$5A5D,&WDTCTL         \ init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
-    BIS #1,&SFRIE1              \ enable WDT interval mode interrupt in SFRIE
-\ ------------------------------\
+\ ******************************\
 \ init RC5_Int                  \
-\ ------------------------------\
+\ ******************************\
     BIS.B #RC5,&IR_IE           \ enable RC5_Int
     BIC.B #RC5,&IR_IFG          \ reset RC5_Int flag
+    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\ ******************************\
+\ init WatchDog WDT_TIM_             \ eUSCI_A0 (FORTH terminal) has higher priority than WDT_TIM_
+\ ******************************\
+\              %01 0001 0100    \ TAxCTL
+\               --              \ TASSEL    CLK = ACLK = LFXT = 32768 Hz
+\                  --           \ ID        divided by 1
+\                    --         \ MC        MODE = up to TAxCCRn
+\                        -      \ TACLR     clear timer count
+\                         -     \ TAIE
+\                          -    \ TAIFG
 \ ------------------------------\
-\ init interrupt vectors
+    MOV #%0100010100,&WDT_TIM_CTL \ start WDT_TIM_, ACLK, up mode, disable int, 
 \ ------------------------------\
-    MOV #WDT_INT,&WDT_Vec       \ init WDT interval vector interrupt
-    MOV #RC5_INT,&IR_Vec        \ init interrupt vector
+\                        000    \ TAxEX0
+\                        ---    \ TAIDEX    pre divisor
+\ ------------------------------\
+\          %0000 0000 0000 0101 \ TAxCCR0
+    MOV ##1638,&WDT_TIM_CCR0    \ init WDT for LFXT: 32768/20=1638 ==> 50ms
+\    MOV ##400,&WDT_TIM_CCR0      \ init WDT for VLO: 8000/20=400 ==> 50ms
+\ ------------------------------\
+\          %0000 0000 0001 0000 \ TAxCCTL0
+\                   -           \ CAP capture/compare mode = compare
+\                        -      \ CCIEn
+\                             - \ CCIFGn
+    MOV #%10000,&WDT_TIM_CCTL0  \ enable compare interrupt, clear CCIFG0
+\ ------------------------------\
+    MOV #WDT_INT,&WDT_TIM_0_Vec \ for only CCIFG0 int, this interrupt clears automatically CCIFG0
 \ ------------------------------\
 \ define LPM mode for ACCEPT    \
 \ ------------------------------\
@@ -45919,44 +53487,67 @@ CODE START                      \
 \    MOV #LPM2,&LPM_MODE         \ with MSP430FR57xx, terminal input don't work for LPMx > 2
 \                               \ with MSP430FR2xxx, terminal input don't work for LPMx > 0 ; LPM0 is the default value
 
+\ ------------------------------\
+\ redirects to background task  \
+\ ------------------------------\
+    MOV #SLEEP,X                \
+    MOV #BACKGROUND,2(X)        \
+\ ------------------------------\
+
 LO2HI                           \ no need to push IP because (WARM) resets the Return Stack ! 
 
 \ ------------------------------\
 \ Init LCD 2x20                 \
 \ ------------------------------\
-    $03E8 20_US                \ 1-  wait 20 ms
-    $03 TOP_LCD                \ 2- send DB5=DB4=1
-    $CD 20_US                  \ 3- wait 4,1 ms
-    $03 TOP_LCD                \ 4- send again DB5=DB4=1
-    $5 20_US                   \ 5- wait 0,1 ms
-    $03 TOP_LCD                \ 6- send again again DB5=DB4=1
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $02 TOP_LCD                \ 7- send DB5=1 DB4=0
-    $2 20_US                   \    wait 40 us = LCD cycle
-    $28 LCD_WRF                \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
-    $08 LCD_WRF                \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
+    $03E8 20_US                 \ 1-  wait 20 ms
+    $03 TOP_LCD                 \ 2- send DB5=DB4=1
+    $CD 20_US                   \ 3- wait 4,1 ms
+    $03 TOP_LCD                 \ 4- send again DB5=DB4=1
+    $5 20_US                    \ 5- wait 0,1 ms
+    $03 TOP_LCD                 \ 6- send again again DB5=DB4=1
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $02 TOP_LCD                 \ 7- send DB5=1 DB4=0
+    $2 20_US                    \    wait 40 us = LCD cycle
+    $28 LCD_WRF                 \ 8- %001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
+    $08 LCD_WRF                 \ 9- %1DCB   "DisplayControl" : Display off, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
-    $06 LCD_WRF                \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
-    $0C LCD_WRF                \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
+    $06 LCD_WRF                 \ 11- %01xx   "LCD_EntrySet" : address and cursor shift after writing in RAM
+    $0C LCD_WRF                 \ 12- %1DCB "DisplayControl" : Display on, Cursor off, Blink off. 
     LCD_Clear                   \ 10- "LCD_Clear"
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    LIT RECURSE IS WARM         \ insert this START routine between WARM and (WARM)...
-    (WARM)                      \ ...and continue with (WARM) (very, very usefull after COLD or RESET !:-)
-;
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
+    LIT RECURSE IS WARM         \ replace WARM by this START routine
+    ABORT                       \ and continue with the next word after WARM...
+;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
-: STOP                  \ stops multitasking, must to be used before downloading app
-    ['] (WARM) IS WARM  \ remove START app from FORTH init process
-    ECHO COLD           \ reset CPU, interrupt vectors, and start FORTH
+CODE STOP                   \ stops multitasking, must to be used before downloading app
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
+COLON
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
-[THEN]  \ ASM
-    \
+
 ECHO
+            ; downloading RC5toLCD.4th is done
+RST_HERE    ; this app is protected against <reset>
+    \
+[THEN]      \ ASM
+    \
+
+
+
+
+START
+

diff --git a/MSP430-FORTH/RC5toLCD.f b/MSP430-FORTH/RC5toLCD.f
index 7d9cff0..fadd07e 100644 (file)
--- a/MSP430-FORTH/RC5toLCD.f
+++ b/MSP430-FORTH/RC5toLCD.f
@@ -34,11 +34,15 @@
 \ under interrupt, IP is free for use
 \ interrupts reset SR register !
 
-\ PUSHM order : PSP,TOS, IP,  S,  T,  W,  X,  Y, R7, R6, R5, R4, R3, R2,RSP, PC
-\ example : PUSHM IP,Y
+\ PUSHM order : PSP,TOS, IP,  S,  T,  W,  X,  Y, rEXIT,rDOVAR,rDOCON, rDODOES, R3, SR,RSP, PC
+\ PUSHM order : R15,R14,R13,R12,R11,R10, R9, R8,  R7  ,  R6  ,  R5  ,   R4   , R3, R2, R1, R0
+
+\ example : PUSHM #6,IP pushes IP,S,T,W,X,Y registers to return stack
 \
-\ POPM  order :  PC ,RSP, R2, R3, R4, R5, R6, R7,  Y,  X,  W,  T,  S, IP,TOS,PSP
-\ example : POPM Y,IP
+\ POPM  order :  PC,RSP, SR, R3, rDODOES,rDOCON,rDOVAR,rEXIT,  Y,  X,  W,  T,  S, IP,TOS,PSP
+\ POPM  order :  R0, R1, R2, R3,   R4   ,  R5  ,  R6  ,  R7 , R8, R9,R10,R11,R12,R13,R14,R15
+
+\ example : POPM #6,IP   pop Y,X,W,T,S,IP registers from return stack
 
 \ ASSEMBLER conditionnal usage after IF UNTIL WHILE : S< S>= U< U>= 0= 0<> 0>=
 \ ASSEMBLER conditionnal usage before ?JMP ?GOTO    : S< S>= U< U>= 0= 0<> 0< 
@@ -310,9 +314,9 @@ BEGIN                           \
 \ ******************************\
 \ RC5_HalfCycle                 \ <--- loop back ---+ with readjusted RC5_Period
 \ ******************************\                   |
-\ MOV #%1000100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ MOV #%1002100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
-\ MOV #%1010100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1000100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/1 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1002100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/2 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
+\ MOV #%1010100100,&RC5_TIM_CTL \ (re)start timer_A | SMCLK/4 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 MOV #%1011100100,&RC5_TIM_CTL   \ (re)start timer_A | SMCLK/8 time interval,free running,clear RC5_TIM__IFG and RC5_TIM_R
 \ RC5_Compute_3/4_Period:       \                   |
     RRUM    #1,X                \ X=1/2 cycle       |
@@ -381,8 +385,8 @@ LO2HI                           \ switch from assembler to FORTH
     ['] LCD_CLEAR IS CR         \ redirects CR
     ['] LCD_WrC  IS EMIT        \ redirects EMIT
     CR ." $" 2 U.R              \ print IR_RC5 code
-    ['] (CR) IS CR              \ restore CR
-    ['] (EMIT) IS EMIT          \ restore EMIT
+    ['] CR >BODY IS CR          \ restore CR
+    ['] EMIT >BODY IS EMIT      \ restore EMIT
 HI2LO                           \ switch from FORTH to assembler
 MOV TOS,&BASE                   \ restore current BASE
 MOV @PSP+,TOS                   \
@@ -398,7 +402,9 @@ ASM BACKGROUND                  \
 \ ...                           \ insert here your background task
 \ ...                           \
 \ ...                           \
-MOV #(SLEEP),PC                 \ Must be the last statement of BACKGROUND
+MOV #SLEEP,X                    \ 2 Must be the last statement of BACKGROUND
+ADD #4,X                        \ 1 X = BODY of SLEEP
+MOV X,PC                        \ 3 
 ENDASM                          \
 \ ------------------------------\
     \
@@ -537,22 +543,25 @@ LO2HI                           \ no need to push IP because (WARM) resets the R
     ['] LCD_HOME IS CR          \ ' CR redirected to LCD_HOME
     ['] LCD_WRC  IS EMIT        \ ' EMIT redirected to LCD_WrC
     CR ." I love you"   
-    ['] (CR) IS CR              \ ' (CR) is CR
-    ['] (EMIT) IS EMIT          \ ' (EMIT) is EMIT
-\    NOECHO                      \ uncomment to run this app without terminal connexion
-    CR
-    ."    RC5toLCD is running. Type STOP to quit"
+    ['] CR >BODY IS CR          \
+    ['] EMIT >BODY IS EMIT      \
+    ." RC5toLCD is running. Type STOP to quit"
     LIT RECURSE IS WARM         \ replace WARM by this START routine
     ABORT                       \ and continue with the next word after WARM...
 ;                               \ ...until interpreter falls in sleep mode within ACCEPT.
     \
 
 CODE STOP                   \ stops multitasking, must to be used before downloading app
-    MOV #SLEEP,X            \
-    MOV #(SLEEP),2(X)       \ restore the default background
+\ restore default action of primary DEFERred word SLEEP, assembly version
+    MOV #SLEEP,X            \ the ASM word SLEEP is only visible in mode assembler. 
+    ADD #4,X                \ X = BODY of SLEEP
+    MOV X,-2(X)             \ restore the default background
+
 COLON
-    ['] (WARM) IS WARM      \ remove START app from FORTH init process
-    ECHO COLD               \ reset CPU, interrupt vectors, and start FORTH
+\ restore default action of primary DEFERred word WARM, FORTH version
+    ['] WARM >BODY IS WARM  \ remove START app from FORTH init process
+
+    COLD                    \ because we want to reset CPU and interrupt vectors
 ;
     \
 

diff --git a/MSP430-FORTH/RTC.f b/MSP430-FORTH/RTC.f
index 73cc08a..107ad25 100644 (file)
--- a/MSP430-FORTH/RTC.f
+++ b/MSP430-FORTH/RTC.f
@@ -18,11 +18,15 @@
 \ scratch registers Y to S are free for use
 \ under interrupt, IP is free for use
 
-\ PUSHM order : PSP,TOS, IP,  S,  T,  W,  X,  Y, R7, R6, R5, R4
-\ example : PUSHM IP,Y
+\ PUSHM order : PSP,TOS, IP,  S,  T,  W,  X,  Y, rEXIT,rDOVAR,rDOCON, rDODOES, R3, SR,RSP, PC
+\ PUSHM order : R15,R14,R13,R12,R11,R10, R9, R8,  R7  ,  R6  ,  R5  ,   R4   , R3, R2, R1, R0
+
+\ example : PUSHM #6,IP pushes IP,S,T,W,X,Y registers to return stack
 \
-\ POPM  order :  R4, R5, R6, R7,  Y,  X,  W,  T,  S, IP,TOS,PSP
-\ example : POPM Y,IP
+\ POPM  order :  PC,RSP, SR, R3, rDODOES,rDOCON,rDOVAR,rEXIT,  Y,  X,  W,  T,  S, IP,TOS,PSP
+\ POPM  order :  R0, R1, R2, R3,   R4   ,  R5  ,  R6  ,  R7 , R8, R9,R10,R11,R12,R13,R14,R15
+
+\ example : POPM #6,IP   pop Y,X,W,T,S,IP registers from return stack
 
 \ ASSEMBLER conditionnal usage after IF UNTIL WHILE : S< S>= U< U>= 0= 0<> 0>=
 \ ASSEMBLER conditionnal usage before GOTO ?GOTO     : S< S>= U< U>= 0= 0<> <0 
@@ -137,7 +141,7 @@ CREATE ABUF 20 ALLOT
 : GET_TIME
     ECHO
     CR CR ."    DATE (DMY): "
-[DEFINED] LOAD" [IF]    \ ACCEPT is a dEFERed word and redirected to SD_ACCEPT!"
+[DEFINED] LOAD" [IF]    \ ACCEPT is a dEFERed word and redirected to SD_ACCEPT!
     ABUF ABUF 20 (ACCEPT) EVALUATE CR 3 SPACES DATE!
     CR CR ."    TIME (HMS): "
     ABUF ABUF 20 (ACCEPT) EVALUATE CR 3 SPACES TIME!

diff --git a/MSP430-FORTH/SD_TOOLS.f b/MSP430-FORTH/SD_TOOLS.f
index e1beb79..458395f 100644 (file)
--- a/MSP430-FORTH/SD_TOOLS.f
+++ b/MSP430-FORTH/SD_TOOLS.f
@@ -6,17 +6,21 @@
 \ MSP_EXP430FR5739  MSP_EXP430FR5969    MSP_EXP430FR5994    MSP_EXP430FR6989
 \ MSP_EXP430FR4133  CHIPSTICK_FR2433    MSP_EXP430FR2433    MSP_EXP430FR2355
 
-
 \ REGISTERS USAGE
 \ R4 to R7 must be saved before use and restored after
 \ scratch registers Y to S are free for use
 \ under interrupt, IP is free for use
 
-\ PUSHM order : PSP,TOS, IP,  S,  T,  W,  X,  Y, R7, R6, R5, R4
-\ example : PUSHM IP,Y
+\ PUSHM order : PSP,TOS, IP,  S,  T,  W,  X,  Y, rEXIT,rDOVAR,rDOCON, rDODOES, R3, SR,RSP, PC
+\ PUSHM order : R15,R14,R13,R12,R11,R10, R9, R8,  R7  ,  R6  ,  R5  ,   R4   , R3, R2, R1, R0
+
+\ example : PUSHM #6,IP pushes IP,S,T,W,X,Y registers to return stack
 \
-\ POPM  order :  R4, R5, R6, R7,  Y,  X,  W,  T,  S, IP,TOS,PSP
-\ example : POPM Y,IP
+\ POPM  order :  PC,RSP, SR, R3, rDODOES,rDOCON,rDOVAR,rEXIT,  Y,  X,  W,  T,  S, IP,TOS,PSP
+\ POPM  order :  R0, R1, R2, R3,   R4   ,  R5  ,  R6  ,  R7 , R8, R9,R10,R11,R12,R13,R14,R15
+
+\ example : POPM #6,IP   pop Y,X,W,T,S,IP registers from return stack
+
 
 \ FORTH conditionnals:  unary{ 0= 0< 0> }, binary{ = < > U< }
 
@@ -29,7 +33,7 @@ PWR_STATE
     \
 [DEFINED] {SD_TOOLS} [IF] {SD_TOOLS} [THEN]     \ remove {SD_TOOLS} if outside core 
     \
-[DEFINED] ASM [DEFINED] LOAD" AND [UNDEFINED] {SD_TOOLS} AND [IF] \ "
+[UNDEFINED] {SD_TOOLS} [IF] \ 
     \
 MARKER {SD_TOOLS}
     \
@@ -61,6 +65,18 @@ ENDCODE
 [THEN]
     \
 
+[UNDEFINED] AND [IF]
+    \
+\ https://forth-standard.org/standard/core/AND
+\ C AND    x1 x2 -- x3           logical AND
+CODE AND
+AND @PSP+,TOS
+MOV @IP+,PC
+ENDCODE
+    \
+[THEN]
+    \
+
 [UNDEFINED] DUMP [IF]       \ defined in {UTILITY}
 : DUMP                      \ adr n  --   dump memory
   BASE @ >R $10 BASE !
@@ -98,8 +114,7 @@ CODE FAT                            \ Display CurFATsector
 \ ----------------------------------\
     SUB     #4,PSP                  \
     MOV     TOS,2(PSP)              \
-    MOV     &CurFATsector,0(PSP)    \ FATsectorLO
-    ADD     &OrgFAT1,0(PSP)         \
+    MOV     &OrgFAT1,0(PSP)         \
     MOV     #0,TOS                  \ FATsectorHI = 0
     JMP     SECTOR                  \ jump to a defined word
 ENDCODE
@@ -110,14 +125,14 @@ ENDCODE
 \ ----------------------------------\
 CODE CLUSTER                        \ cluster.  --        don't forget to add decimal point to your cluster number
 \ ----------------------------------\
-    MOV.B &SecPerClus,W             \ 3 SecPerClus(5-1) = multiplicator
-    MOV @PSP,X
-    RRA W                           \ 1
+    MOV.B &SecPerClus,W             \ SecPerClus(54321) = multiplicator
+    MOV @PSP,X                      \ X = ClusterL
+    RRA W                           \
     U< IF                           \ case of SecPerClus>1
         BEGIN
-            ADD X,X                 \ 5 (RLA) shift one left MULTIPLICANDlo16
-            ADDC TOS,TOS            \ 1 (RLC) shift one left MULTIPLICANDhi8
-            RRA W                   \ 1 shift one right multiplicator
+            ADD X,X                 \ (RLA) shift one left MULTIPLICANDlo16
+            ADDC TOS,TOS            \ (RLC) shift one left MULTIPLICANDhi8
+            RRA W                   \ shift one right multiplicator
         U>= UNTIL                   \ carry set
     THEN                            \
     ADD     &OrgClusters,X          \ add OrgClusters = sector of virtual cluster 0 (word size)

diff --git a/MSP430-FORTH/TESTASM.F b/MSP430-FORTH/TESTASM.F
index 35fd571..e35b8e7 100644 (file)
--- a/MSP430-FORTH/TESTASM.F
+++ b/MSP430-FORTH/TESTASM.F
@@ -6,19 +6,38 @@
 \ MSP_EXP430FR5739  MSP_EXP430FR5969    MSP_EXP430FR5994    MSP_EXP430FR6989
 \ MSP_EXP430FR4133  MSP_EXP430FR2433    MSP_EXP430FR2355    CHIPSTICK_FR2433
 
+\ PUSHM order : PSP,TOS, IP,  S,  T,  W,  X,  Y, rEXIT,rDOVAR,rDOCON, rDODOES, R3, SR,RSP, PC
+\ PUSHM order : R15,R14,R13,R12,R11,R10, R9, R8,  R7  ,  R6  ,  R5  ,   R4   , R3, R2, R1, R0
+
+\ example : PUSHM #6,IP pushes IP,S,T,W,X,Y registers to return stack
+\
+\ POPM  order :  PC,RSP, SR, R3, rDODOES,rDOCON,rDOVAR,rEXIT,  Y,  X,  W,  T,  S, IP,TOS,PSP
+\ POPM  order :  R0, R1, R2, R3,   R4   ,  R5  ,  R6  ,  R7 , R8, R9,R10,R11,R12,R13,R14,R15
+
+\ example : POPM #6,IP   pop Y,X,W,T,S,IP registers from return stack
+
+
+
+ECHO
 
 \ -----------------------------------------------------------------------
 \ test CPUx instructions PUSHM, POPM, RLAM, RRAM, RRCM, RRUM
 \ -----------------------------------------------------------------------
 CODE TESTPUSHM
+\            PUSHM  #16,R14     \ uncomment to test error "out of bounds"
+\            PUSHM  #2,R0       \ uncomment to test error "out of bounds"
+\            PUSHM  #0,IP       \ uncomment to test error "out of bounds"
+\            POPM   #17,R15     \ uncomment to test error "out of bounds"
+\            POPM   #2,R0       \ uncomment to test error "out of bounds"
+\            POPM   #0,IP       \ uncomment to test error "out of bounds"
             MOV     #22222,Y
             MOV     #3,X
             MOV     #2,W
             MOV     #1,T
             MOV     #0,S
-\            PUSHM   Y,IP       \ uncomment to test error (registers bad order) 
-            PUSHM   IP,W        \ PUSHM order : PSP,TOS,IP,S,T,W,X,Y,rEXIT,rDOVAR,rDOCON,rDODOES
-            POPM    W,IP        \ POPM order  : rDODOES,rDOCON,rDOVAR,rEXIT,Y,X,W,T,S,IP,TOS,PSP
+
+            PUSHM   #4,IP       \ PUSHM IP,S,T,W
+            POPM    #4,IP       \ POPM  W,T,S,IP
             SUB     #10,PSP
             MOV     TOS,8(PSP)  \ save old TOS
             MOV     S,6(PSP)
@@ -26,7 +45,8 @@ CODE TESTPUSHM
             MOV     W,2(PSP)
             MOV     X,0(PSP)
             MOV     Y,TOS
-\            RLAM    #0,TOS     \ uncomment to test error (bad shift value)
+\            RLAM    #0,TOS      \ uncomment to test error "out of bounds" 
+\            RLAM    #5,TOS      \ uncomment to test error "out of bounds" 
             RRAM    #1,TOS      \ 0 < shift value < 5
             RLAM    #2,TOS
             RRCM    #1,TOS
@@ -38,30 +58,9 @@ CODE TESTPUSHM
 TESTPUSHM  ; you should see 11111 3 2 1 0 -->
 
 CODE TESTPOPM
-            MOV     #22222,Y
-            MOV     #3,X
-            MOV     #2,W
-            MOV     #1,T
-            MOV     #0,S
-\            PUSHM   W,IP        \ uncomment to test error "out of bounds" 
-            PUSHM   IP,W        \ PUSHM order : PSP,TOS,IP,S,T,W,X,Y,rEXIT,rDOVAR,rDOCON,rDODOES
-            POPM    W,IP        \ POPM order  : rDODOES,rDOCON,rDOVAR,rEXIT,Y,X,W,T,S,IP,TOS,PSP
-            SUB     #10,PSP
-            MOV     TOS,8(PSP)  \ save old TOS
-            MOV     S,6(PSP)
-            MOV     T,4(PSP)
-            MOV     W,2(PSP)
-            MOV     X,0(PSP)
-            MOV     Y,TOS
-\            RLAM    #0,TOS      \ uncomment to test error "out of bounds" 
-\            RLAM    #5,TOS      \ uncomment to test error "out of bounds" 
-            RRAM    #1,TOS      \ 0 < shift value < 5
-            RLAM    #2,TOS
-            RRCM    #1,TOS
-            RRUM    #1,TOS
-            COLON               \ high level part of the word starts here...
-            space . . . . .
-            ;                   \ and finishes here.
+            JMP TESTPUSHM
+ENDCODE
+
     \
 TESTPOPM  ; you should see 11111 3 2 1 0 -->
 
@@ -179,15 +178,6 @@ ENDCODE
 
 
 \ -----------------------------------------------------------------------
-\ tests behaviour of assembly error 
-\ -----------------------------------------------------------------------
-\ R16 causes an error, assembler context is aborted and the word TEST7 is "hidden".
-
-\ CODE TEST7
-\            MOV 0(PSP),0(R16)  ; display an error "out of bounds" -->
-
-
-\ -----------------------------------------------------------------------
 \ tests access to a CREATED word with assembler 
 \ -----------------------------------------------------------------------
 
@@ -274,3 +264,53 @@ TABLE10 PFA_TABLE ! TABLE 10 DUMP
 TABLE20 PFA_TABLE ! TABLE 10 DUMP
     \
 
+\ -----------------------------------------------------------------------
+\ tests behaviour of assembly error 
+\ -----------------------------------------------------------------------
+\ R16 causes an error, assembler context is aborted and the word TEST7 is "hidden".
+
+\CODE TEST7
+\           MOV 0(truc),0(R16)  ; display an error "out of bounds" -->
+
+; -----------------------------------------------------------------------
+; create a primary DEFERred assembly word
+; -----------------------------------------------------------------------
+
+DEFER TRUC              ; here, TRUC is a secondary DEFERred word (i.e. without BODY)
+    \
+
+CODENNM                 ; leaves its execution address (CFA) on stack
+    SUB #2,PSP
+    MOV TOS,0(PSP)
+    MOV @IP+,PC
+ENDCODE IS TRUC         ; TRUC becomes a primary DEFERred word
+                        ; with its default action (DUP) located at its BODY addresse.
+    \
+TRUC .                  ; display TOS value -->
+    \
+
+' TRUC >BODY IS TRUC    ; TRUC is reinitialzed with its default action
+    \
+
+TRUC .                  ; display TOS value --> 
+    \
+' DROP IS TRUC          ; TRUC is redirected to DROP
+    \
+TRUC                   ; The generated error displays stack empty! in reverse video, removes the TRUC definition and restarts the interpretation after the end of the file. And as you see, FastForth is able to display long lines, interesting, doesn't it? --> 
+   
+bla
+bla
+bla
+
+
+
+
+
+
+
+bla
+...
+
+
+
+

diff --git a/MSP430-FORTH/UTILITY.f b/MSP430-FORTH/UTILITY.f
index 6a1c9ed..5010714 100644 (file)
--- a/MSP430-FORTH/UTILITY.f
+++ b/MSP430-FORTH/UTILITY.f
@@ -2,24 +2,26 @@
 \ UTILITY.f
 \ ------------------------------------------------------------------------------
 
-\ must be preprocessed with yourtarget.pat file because PSTACK,CONTEXT,INI_THREAD:
-
-\ TARGET SELECTION: selects to highlight target then CTRL+6
+\ TARGET SELECTION
 \ MSP_EXP430FR5739  MSP_EXP430FR5969    MSP_EXP430FR5994    MSP_EXP430FR6989
 \ MSP_EXP430FR4133  MSP_EXP430FR2433    MSP_EXP430FR2355    CHIPSTICK_FR2433
 
-\ ------------------------------------------------------------------------------
+\ must be preprocessed with yourtarget.pat file because PSTACK,CONTEXT,INI_THREAD
 
 \ REGISTERS USAGE
-\ R4 to R7 must be saved before use and restored after
+\ rDODOES to rEXIT must be saved before use and restored after
 \ scratch registers Y to S are free for use
 \ under interrupt, IP is free for use
 
-\ PUSHM order : PSP,TOS, IP,  S,  T,  W,  X,  Y, R7, R6, R5, R4
-\ example : PUSHM IP,Y
+\ PUSHM order : PSP,TOS, IP,  S,  T,  W,  X,  Y, rEXIT,rDOVAR,rDOCON, rDODOES, R3, SR,RSP, PC
+\ PUSHM order : R15,R14,R13,R12,R11,R10, R9, R8,  R7  ,  R6  ,  R5  ,   R4   , R3, R2, R1, R0
+
+\ example : PUSHM #6,IP pushes IP,S,T,W,X,Y registers to return stack
 \
-\ POPM  order :  R4, R5, R6, R7,  Y,  X,  W,  T,  S, IP,TOS,PSP
-\ example : POPM Y,IP
+\ POPM  order :  PC,RSP, SR, R3, rDODOES,rDOCON,rDOVAR,rEXIT,  Y,  X,  W,  T,  S, IP,TOS,PSP
+\ POPM  order :  R0, R1, R2, R3,   R4   ,  R5  ,  R6  ,  R7 , R8, R9,R10,R11,R12,R13,R14,R15
+
+\ example : POPM #6,IP   pop Y,X,W,T,S,IP registers from return stack
 
 \ FORTH conditionnals:  unary{ 0= 0< 0> }, binary{ = < > U< }
 
@@ -27,8 +29,7 @@
 
 \ ASSEMBLER conditionnal usage with ?JMP ?GOTO      S<  S>=  U<   U>=  0=  0<>  <0
 
-\ ------------------------------------------------------------------------------
-
+PWR_STATE
     \
 [DEFINED] {TOOLS} [IF] {TOOLS} [THEN]     \ remove {UTILITY} if outside core 
     \
@@ -208,25 +209,25 @@ LO2HI
 
 [THEN]
     \
-ECHO
-    \
 PWR_HERE
-    \
-: BS 8 EMIT ;
-    \
+ECHO
+
+: BS 8 EMIT ;   \ 8 EMIT = BackSpace EMIT
 : ESC #27 EMIT ;
-    \
 : specs         \ to see Fast Forth specifications
 PWR_STATE       \ remove specs definition when running, and before bytes free processing
-6 0 DO BS LOOP  \ 8 EMIT = BackSpace EMIT
+6 0 DO BS LOOP  \ to reach start of line
 ESC ." [7m"     \ set reverse video
 ." FastForth "
-INI_THREAD @ U. ." Threads "    \ vocabularies threads
-FREQ_KHZ @ 0 1000 UM/MOD U. BS ." ," U. ." MHz "    \ MCLK
-HECTOBAUDS @ 0 10 UM/MOD U. BS ." ," U. ." kBds "   \ Terminal Baudrate 
+INI_THREAD @ U. BS ." Threads "   \ vocabularies threads
+." DeviceID=$"
+$10 BASE ! $1A04 @ U. #10 BASE ! 
+FREQ_KHZ @ 0 1000 UM/MOD U. ?DUP
+IF      BS ." ," U.
+THEN    BS ." MHz "            \ MCLK
 FRAM_FULL HERE - U. ." bytes free"
-ESC ." [0m"    \ reset reverse video
+ESC ." [0m"                     \ reset reverse video
 ;
     \
 
-specs
\ No newline at end of file
+specs

diff --git a/MSP430FR2355.inc b/MSP430FR2355.inc
index f0985d9..53b0968 100644 (file)
--- a/MSP430FR2355.inc
+++ b/MSP430FR2355.inc
@@ -42,6 +42,7 @@ TLVEND          .equ 01A31h      ;
 ; ----------------------------------------------
 RAMSTART        .equ 02000h
 RAMEND          .equ 02FFFh
+RAMLEN          .equ 01000h
 ; ----------------------------------------------
 ; FRAM
 ; ----------------------------------------------
@@ -60,6 +61,7 @@ BSL_I2C_ADRE    .equ 0FF8Ch      ;
 JTAG_PASSWORD   .equ 0FF88h      ; 256 bits
 BSL_PASSWORD    .equ 0FFE0h      ; 256 bits
 INTVECT         .equ 0FFCEh      ; FFCE-FFFF :  24 vectors + reset
+VECTLEN         .equ 32h
 ; ----------------------------------------------
 
 ;   .org    INTVECT             ; FFCE-FFFF 24 vectors + reset
@@ -399,32 +401,5 @@ SD_TXBUF       .equ eUSCI_B1_SFR + 0Eh    ; USCI_B1 Transmit Buffer 8
 SD_IFG         .equ eUSCI_B1_SFR + 2Ch    ; USCI_B1 Interrupt Flags Register
     .ENDIF ;UCB1_SD
 
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+UCB0STATW       .equ eUSCI_B0_SFR + 08h     ; eUSCI_B0 Status words
 

diff --git a/MSP430FR2433.inc b/MSP430FR2433.inc
index 4c41fd6..0c34587 100644 (file)
--- a/MSP430FR2433.inc
+++ b/MSP430FR2433.inc
@@ -36,6 +36,7 @@ TLVEND          .equ 01A7Fh      ;
 ; ----------------------------------------------
 RAMSTART        .equ 02000h
 RAMEND          .equ 02FFFh
+RAMLEN          .equ 01000h
 ; ----------------------------------------------
 ; FRAM
 ; ----------------------------------------------
@@ -46,8 +47,9 @@ JTAG_SIG2       .equ 0FF82h      ; if JTAG_SIG <> |0xFFFFFFFF, 0x00000000|, SBW
 BSL_SIG1        .equ 0FF84h      ;
 BSL_SIG2        .equ 0FF86h      ;
 JTAG_PASSWORD   .equ 0FF88h      ; 256 bits
-INTVECT         .equ 0FFDAh      ; FFDA-FFFF
 BSL_PASSWORD    .equ 0FFE0h      ; 256 bits
+INTVECT         .equ 0FFDAh      ; FFDA-FFFF
+VECTLEN         .equ 26h
 ; ----------------------------------------------
 
 ; ----------------------------------------------
@@ -347,32 +349,6 @@ SD_TXBUF       .equ eUSCI_B0_SFR + 0Eh    ; USCI_B0 Transmit Buffer 8
 SD_IFG         .equ eUSCI_B0_SFR + 2Ch    ; USCI_B0 Interrupt Flags Register
     .ENDIF ;UCB0_SD
 
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
+UCB0STATW       .equ eUSCI_B0_SFR + 08h     ; eUSCI_B0 Status words
 
 

diff --git a/MSP430FR4133.inc b/MSP430FR4133.inc
index 4b3127f..b5400dc 100644 (file)
--- a/MSP430FR4133.inc
+++ b/MSP430FR4133.inc
@@ -30,6 +30,7 @@ TLVEND          .equ 01A7Fh      ;
 ; ----------------------------------------------
 RAMSTART        .equ 02000h
 RAMEND          .equ 027FFh
+RAMLEN          .equ 00800h
 ; ----------------------------------------------
 ; FRAM
 ; ----------------------------------------------
@@ -41,6 +42,7 @@ BSL_SIG1        .equ 0FF84h      ;
 BSL_SIG2        .equ 0FF86h      ;
 JTAG_PASSWORD   .equ 0FF88h      ; 256 bits
 INTVECT         .equ 0FFE2h      ; FFE2-FFFF
+VECTLEN         .equ 1Eh
 BSL_PASSWORD    .equ 0FFE0h      ; 256 bits
 
 ; ----------------------------------------------
@@ -320,6 +322,7 @@ SD_TXBUF       .equ eUSCI_B0_SFR + 0Eh    ; USCI_B0 Transmit Buffer 8
 SD_IFG         .equ eUSCI_B0_SFR + 2Ch    ; USCI_B0 Interrupt Flags Register
     .ENDIF ;UCB0_SD
 
+UCB0STATW       .equ eUSCI_B0_SFR + 08h     ; eUSCI_B0 Status words
 
 
 

diff --git a/MSP430FR5738.inc b/MSP430FR5738.inc
index edd061a..3d9d667 100644 (file)
--- a/MSP430FR5738.inc
+++ b/MSP430FR5738.inc
@@ -34,6 +34,7 @@ TLVEND          .equ 01A7Fh      ;
 ; ----------------------------------------------
 RAMSTART        .equ 01C00h
 RAMEND          .equ 01FFFh
+RAMLEN          .equ 00400h
 RAM_1K
 ; ----------------------------------------------
 ; FRAM
@@ -46,6 +47,7 @@ BSL_SIG1        .equ 0FF84h      ;
 BSL_SIG2        .equ 0FF86h      ;
 JTAG_PASSWORD   .equ 0FF88h      ; 256 bits
 INTVECT         .equ 0FFCEh      ; FFCE-FFFF
+VECTLEN         .equ 32h
 BSL_PASSWORD    .equ 0FFE0h      ; 256 bits
 ; ----------------------------------------------
 
@@ -338,3 +340,5 @@ SD_TXBUF       .equ eUSCI_B0_SFR + 0Eh    ; USCI_B0 Transmit Buffer 8
 SD_IFG         .equ eUSCI_B0_SFR + 2Ch    ; USCI_B0 Interrupt Flags Register
     .ENDIF ;UCB0_SD
 
+UCB0STATW       .equ eUSCI_B0_SFR + 08h     ; eUSCI_B0 Status words
+

diff --git a/MSP430FR5739.inc b/MSP430FR5739.inc
index 340318d..9055b14 100644 (file)
--- a/MSP430FR5739.inc
+++ b/MSP430FR5739.inc
@@ -34,6 +34,7 @@ TLVEND          .equ 01A7Fh      ;
 ; ----------------------------------------------
 RAMSTART        .equ 01C00h
 RAMEND          .equ 01FFFh
+RAMLEN          .equ 00400h
 RAM_1K
 ; ----------------------------------------------
 ; FRAM
@@ -46,6 +47,7 @@ BSL_SIG1        .equ 0FF84h      ;
 BSL_SIG2        .equ 0FF86h      ;
 JTAG_PASSWORD   .equ 0FF88h      ; 256 bits
 INTVECT         .equ 0FFCEh      ; FFCE-FFFF
+VECTLEN         .equ 32h
 BSL_PASSWORD    .equ 0FFE0h      ; 256 bits
 ; ----------------------------------------------
 
@@ -394,3 +396,4 @@ SD_TXBUF       .equ eUSCI_B0_SFR + 0Eh    ; USCI_B0 Transmit Buffer 8
 SD_IFG         .equ eUSCI_B0_SFR + 2Ch    ; USCI_B0 Interrupt Flags Register
     .ENDIF ;UCB0_SD
 
+UCB0STATW       .equ eUSCI_B0_SFR + 08h     ; eUSCI_B0 Status words

diff --git a/MSP430FR5948.inc b/MSP430FR5948.inc
index 689cd48..48474db 100644 (file)
--- a/MSP430FR5948.inc
+++ b/MSP430FR5948.inc
@@ -45,6 +45,7 @@ TLVEND          .equ 01AFFh      ;
 ; ----------------------------------------------
 RAMSTART        .equ 01C00h
 RAMEND          .equ 023FFh
+RAMLEN          .equ 00800h
 ; ----------------------------------------------
 ; FRAM
 ; ----------------------------------------------
@@ -59,6 +60,7 @@ JTAG_PASSWORD   .equ 0FF88h      ; 256 bits max
 IPE_SIG_VALID   .equ 0FF88h      ; one word
 IPE_STR_PTR_SRC .equ 0FF8Ah      ; one word
 INTVECT         .equ 0FFCCh      ; FFCC-FFFF
+VECTLEN         .equ 34h
 BSL_PASSWORD    .equ 0FFE0h      ; 256 bits
 ; ----------------------------------------------
 
@@ -433,4 +435,5 @@ SD_IFG         .equ eUSCI_B0_SFR + 2Ch    ; eUSCI_B0 Interrupt Flags Register
     .ENDIF ;UCB0_SD
 
 
+UCB0STATW       .equ eUSCI_B0_SFR + 08h     ; eUSCI_B0 Status words
 

diff --git a/MSP430FR5969.inc b/MSP430FR5969.inc
index 9735179..35bc443 100644 (file)
--- a/MSP430FR5969.inc
+++ b/MSP430FR5969.inc
@@ -45,6 +45,7 @@ TLVEND          .equ 01AFFh      ;
 ; ----------------------------------------------
 RAMSTART        .equ 01C00h
 RAMEND          .equ 023FFh
+RAMLEN          .equ 00800h
 ; ----------------------------------------------
 ; FRAM
 ; ----------------------------------------------
@@ -59,6 +60,7 @@ JTAG_PASSWORD   .equ 0FF88h      ; 256 bits max
 IPE_SIG_VALID   .equ 0FF88h      ; one word
 IPE_STR_PTR_SRC .equ 0FF8Ah      ; one word
 INTVECT         .equ 0FFCCh      ; FFCC-FFFF
+VECTLEN         .equ 34h
 BSL_PASSWORD    .equ 0FFE0h      ; 256 bits
 ; ----------------------------------------------
 
@@ -432,5 +434,6 @@ SD_TXBUF       .equ eUSCI_B0_SFR + 0Eh    ; eUSCI_B0 Transmit Buffer 8
 SD_IFG         .equ eUSCI_B0_SFR + 2Ch    ; eUSCI_B0 Interrupt Flags Register
     .ENDIF ;UCB0_SD
 
+UCB0STATW       .equ eUSCI_B0_SFR + 08h     ; eUSCI_B0 Status words
 
 

diff --git a/MSP430FR5994.inc b/MSP430FR5994.inc
index fe5e7e7..d4b372c 100644 (file)
--- a/MSP430FR5994.inc
+++ b/MSP430FR5994.inc
@@ -48,6 +48,7 @@ TinyRAM         .equ 00Ah
 TinyRAMEnd      .equ 01Fh
 RAMSTART        .equ 01C00h
 RAMEND          .equ 02BFFh
+RAMLEN          .equ 01000h
 SharedRAMSTART  .equ 02C00h
 SharedRAMEND    .equ 03BFFh
 ; ----------------------------------------------
@@ -64,6 +65,7 @@ JTAG_PASSWORD   .equ 0FF88h      ; 256 bits max
 IPE_SIG_VALID   .equ 0FF88h      ; one word
 IPE_STR_PTR_SRC .equ 0FF8Ah      ; one word
 INTVECT         .equ 0FFB4h      ; FFB4-FFFF
+VECTLEN         .equ 4Ch
 BSL_PASSWORD    .equ 0FFE0h      ; 256 bits
 ; ----------------------------------------------
 ;    .org    SIGNATURES
@@ -533,11 +535,11 @@ TERMVEC     .equ 0FFE6h
     .ENDIF ;UCA1_TERM
 
     .IFDEF UCA1_SD
-SD_CTLW0       .equ eUSCI_A1_SFR + 00h    ; eUSCI_A1 Control Word Register 0
-SD_BRW         .equ eUSCI_A1_SFR + 06h    ; eUSCI_A1 Baud Word Rate 0
-SD_RXBUF       .equ eUSCI_A1_SFR + 0Ch    ; eUSCI_A1 Receive Buffer 8
-SD_TXBUF       .equ eUSCI_A1_SFR + 0Eh    ; eUSCI_A1 Transmit Buffer 8
-SD_IFG         .equ eUSCI_A1_SFR + 1Ch    ; eUSCI_A1 Interrupt Flags Register
+SD_CTLW0        .equ eUSCI_A1_SFR + 00h    ; eUSCI_A1 Control Word Register 0
+SD_BRW          .equ eUSCI_A1_SFR + 06h    ; eUSCI_A1 Baud Word Rate 0
+SD_RXBUF        .equ eUSCI_A1_SFR + 0Ch    ; eUSCI_A1 Receive Buffer 8
+SD_TXBUF        .equ eUSCI_A1_SFR + 0Eh    ; eUSCI_A1 Transmit Buffer 8
+SD_IFG          .equ eUSCI_A1_SFR + 1Ch    ; eUSCI_A1 Interrupt Flags Register
     .ENDIF ;UCA1_SD
 
 
@@ -545,12 +547,11 @@ SD_IFG         .equ eUSCI_A1_SFR + 1Ch    ; eUSCI_A1 Interrupt Flags Register
 ; eUSCI_B0
 ; ----------------------------------------------------------------------
     .IFDEF UCB0_SD
-SD_CTLW0       .equ eUSCI_B0_SFR + 00h    ; eUSCI_B0 Control Word Register 0
-SD_BRW         .equ eUSCI_B0_SFR + 06h    ; eUSCI_B0 Baud Word Rate 0
-SD_RXBUF       .equ eUSCI_B0_SFR + 0Ch    ; eUSCI_B0 Receive Buffer 8
-SD_TXBUF       .equ eUSCI_B0_SFR + 0Eh    ; eUSCI_B0 Transmit Buffer 8
-SD_IFG         .equ eUSCI_B0_SFR + 2Ch    ; eUSCI_B0 Interrupt Flags Register
+SD_CTLW0        .equ eUSCI_B0_SFR + 00h    ; eUSCI_B0 Control Word Register 0
+SD_BRW          .equ eUSCI_B0_SFR + 06h    ; eUSCI_B0 Baud Word Rate 0
+SD_RXBUF        .equ eUSCI_B0_SFR + 0Ch    ; eUSCI_B0 Receive Buffer 8
+SD_TXBUF        .equ eUSCI_B0_SFR + 0Eh    ; eUSCI_B0 Transmit Buffer 8
+SD_IFG          .equ eUSCI_B0_SFR + 2Ch    ; eUSCI_B0 Interrupt Flags Register
     .ENDIF ;UCB0_SD
 
-
-
+UCB0STATW       .equ eUSCI_B0_SFR + 08h     ; eUSCI_B0 Status words

diff --git a/MSP430FR6989.inc b/MSP430FR6989.inc
index 6650e82..be79822 100644 (file)
--- a/MSP430FR6989.inc
+++ b/MSP430FR6989.inc
@@ -41,18 +41,20 @@ TLVEND         .equ 01AFFh      ;
 ; ----------------------------------------------
 RAMSTART       .equ 01C00h
 RAMEND         .equ 023FFh
+RAMLEN          .equ 00800h
 ; ----------------------------------------------
 ; FRAM
 ; ----------------------------------------------
-PROGRAMSTART   .equ 04400h      ; Code space start
-SIGNATURES     .equ 0FF80h      ; JTAG, BSL and IP Encapsulation signatures 1 and 2
+PROGRAMSTART    .equ 04400h      ; Code space start
+SIGNATURES      .equ 0FF80h      ; JTAG, BSL and IP Encapsulation signatures 1 and 2
 JTAG_SIG1       .equ 0FF80h      ; if 0, enable JTAG/SBW
 JTAG_SIG2       .equ 0FF82h      ; if JTAG_SIG1=0xAAAA, length of password string @ JTAG_PASSWORD
 BSL_SIG1        .equ 0FF84h      ;
 BSL_SIG2        .equ 0FF86h      ;
-JTAG_PASSWORD  .equ 0FF86h      ; up to 0FFC5h : 256 bits
-INTVECT        .equ 0FFC6h      ; FFC6-FFFF
-BSL_PASSWORD   .equ 0FFE0h      ; up to 0FFFFh : 256 bits
+JTAG_PASSWORD   .equ 0FF86h      ; up to 0FFC5h : 256 bits
+INTVECT         .equ 0FFC6h      ; FFC6-FFFF
+VECTLEN         .equ 3Ah
+BSL_PASSWORD    .equ 0FFE0h      ; up to 0FFFFh : 256 bits
 ; ----------------------------------------------
 
 ; ----------------------------------------------
@@ -533,5 +535,5 @@ SD_TXBUF       .equ eUSCI_B0_SFR + 0Eh    ; eUSCI_B0 Transmit Buffer 8
 SD_IFG         .equ eUSCI_B0_SFR + 2Ch    ; eUSCI_B0 Interrupt Flags Register
     .ENDIF ;UCB0_SD
 
-
+UCB0STATW       .equ eUSCI_B0_SFR + 08h     ; eUSCI_B0 Status words
 

diff --git a/MSP_EXP430FR2355_24MHz_115200bds.txt b/MSP_EXP430FR2355_24MHz_115200bds.txt
index 90972fc..a359325 100644 (file)
--- a/MSP_EXP430FR2355_24MHz_115200bds.txt
+++ b/MSP_EXP430FR2355_24MHz_115200bds.txt
@@ -1,6 +1,8 @@
 @1800
-10 00 66 84 C0 5D 80 04 05 00 18 00 C6 9B 6E 92
-2C 84 3E 84 00 00 00 00
+10 00 0D 00 01 49 C0 5D 05 00 18 00 86 9B 56 92
+24 84 36 84 00 00 00 00 00 00
+@2400
+00 00
 @8000
 2F 83 8F 4E 00 00 3E 41 2E 4E 30 4D 2F 83 8F 4E
 00 00 3E 41 0D 12 3D 4E 30 4D 00 00 04 45 58 49
@@ -36,7 +38,7 @@ F9 3F 64 81 02 30 3E 00 1E 93 EE 37 F4 3F 00 00
 50 00 F5 3F 00 00 01 49 2F 83 8F 4E 00 00 2E 41
 1E 81 02 00 30 4D 16 81 01 4A 2F 83 8F 4E 00 00
 1E 41 04 00 1E 81 06 00 30 4D 06 81 02 42 4C 00
-85 12 20 00 1C 82 04 42 41 53 45 00 85 12 E2 21
+85 12 20 00 1C 82 04 42 41 53 45 00 85 12 DC 21
 C0 80 05 53 54 41 54 45 85 12 BE 21 7E 81 02 3C
 23 00 B2 40 B2 21 B2 21 30 4D EA 81 06 55 4D 2F
 4D 4F 44 00 30 12 5A 80 0B 4E 2E 4F 1C 4F 02 00
@@ -44,7 +46,7 @@ C0 80 05 53 54 41 54 45 85 12 BE 21 7E 81 02 3C
 09 43 0A 9B 01 28 0A 8B 09 69 08 68 14 83 07 30
 0C 5C 0E 6E 0A 6A F5 2B 0A 8B 12 D3 F5 3F 34 40
 0C 80 8F 4A 02 00 8F 49 00 00 0E 48 30 41 26 82
-01 23 1B 42 E2 21 2C 4F 2F 83 B0 12 60 82 BF 4F
+01 23 1B 42 DC 21 2C 4F 2F 83 B0 12 60 82 BF 4F
 00 00 7A 90 0A 00 02 28 3A 50 07 00 3A 50 30 00
 92 83 B2 21 18 42 B2 21 C8 4A 00 00 30 4D A0 82
 02 23 53 00 0D 12 87 12 A2 82 DC 82 2D 83 09 93
@@ -53,400 +55,396 @@ E2 23 0E 93 E0 23 3D 41 30 4D D0 82 02 23 3E 00
 04 48 4F 4C 44 00 0A 4E 3E 4F DA 3F 32 82 04 53
 49 47 4E 00 0E 93 3E 4F 3A 40 2D 00 D1 33 30 4D
 4C 82 02 55 2E 00 0D 12 87 12 42 82 2C 80 00 00
-D4 82 F0 82 40 85 08 85 22 80 3E 81 02 44 2E 00
+D4 82 F0 82 24 85 EC 84 22 80 3E 81 02 44 2E 00
 0D 12 87 12 42 82 70 80 82 80 44 81 D4 82 92 80
-14 83 F0 82 40 85 08 85 22 80 7C 80 01 2E 0E 93
+14 83 F0 82 24 85 EC 84 22 80 7C 80 01 2E 0E 93
 E2 37 2F 83 8F 4E 00 00 3E 43 EA 3F 00 83 04 48
-45 52 45 00 2F 83 8F 4E 00 00 1E 42 CC 21 30 4D
-F0 80 05 41 4C 4C 4F 54 82 5E CC 21 3E 4F 30 4D
-EC 82 02 43 2C 00 1A 42 CC 21 CA 4E 00 00 92 53
-CC 21 3E 4F 30 4D 6E 83 05 28 4B 45 59 29 18 42
-8C 05 2F 83 8F 4E 00 00 B0 12 2C 84 92 B3 9C 05
-FD 27 1E 42 8C 05 B0 12 3E 84 30 4D 08 82 03 4B
-45 59 30 40 AE 83 3F 80 06 00 8F 4E 04 00 3E 40
-54 00 BF 40 3C 21 00 00 AF 4F 02 00 05 3C 82 83
-06 41 43 43 45 50 54 00 3C 40 A4 84 3B 40 6E 84
-2D 15 0A 4E 2E 4F 0A 5E 3B 40 0D 00 3C 40 20 00
-3D 40 98 84 92 B3 9C 05 05 24 18 42 8C 05 38 90
-0A 00 04 20 21 53 39 40 52 84 4D 15 A2 B3 9C 05
-FD 27 B2 40 11 00 8E 05 D2 C3 03 02 30 41 B2 40
-13 00 8E 05 D2 D3 03 02 30 41 00 00 05 53 4C 45
-45 50 30 40 60 84 00 00 07 28 53 4C 45 45 50 29
-12 D2 0A 18 F6 3F 21 52 3A 17 58 42 8C 05 48 9C
-08 2C 48 9B E4 27 78 92 11 20 2E 9F 0F 24 1E 83
-05 3C 0E 9A 03 24 CE 48 00 00 1E 53 A2 B3 9C 05
-FD 27 82 48 8E 05 30 4D 9A 84 2D 83 92 B3 9C 05
-E4 23 FC 27 B2 40 18 00 0A 18 82 93 E4 21 02 24
-92 53 E4 21 3E 8F 3D 41 30 4D A8 83 06 28 45 4D
-49 54 29 00 08 4E 3E 4F E1 3F 3C 83 04 45 4D 49
-54 00 30 40 C4 84 CC 84 04 45 43 48 4F 00 B2 40
-82 48 92 84 82 43 E4 21 30 4D 5C 83 06 4E 4F 45
-43 48 4F 00 B2 40 30 4D 92 84 92 43 E4 21 30 4D
-0E 83 05 53 50 41 43 45 2F 83 8F 4E 00 00 3E 40
-20 00 DF 3F 02 85 06 53 50 41 43 45 53 00 0E 93
-09 24 0D 12 3D 40 2A 85 EF 3F 2C 85 2D 83 1E 83
-EB 23 3D 41 3E 4F 30 4D 22 83 04 54 59 50 45 00
-0E 93 0F 24 1E 15 3D 40 56 85 28 4F 7E 48 8F 48
-00 00 2F 83 BE 3F 58 85 2D 83 91 83 02 00 F5 23
-1D 17 2F 53 3E 4F 30 4D BC 84 04 28 43 52 29 00
-0D 12 87 12 88 85 02 0D 0A 00 40 85 22 80 92 83
-02 43 52 00 30 40 70 85 2F 82 8F 4E 02 00 7E 4D
-8F 4D 00 00 0D 5E 1D B3 0D 63 30 4D 80 85 07 43
-41 50 53 5F 4F 4E B2 43 B4 21 30 4D 9E 85 08 43
-41 50 53 5F 4F 46 46 00 82 43 B4 21 30 4D 16 85
-82 53 22 00 0D 12 87 12 2C 80 88 85 30 88 B8 85
-2C 80 22 00 0C 86 A6 85 DA 85 3D 41 6E 4E 1E 83
-82 5E CC 21 3E 4F 92 B3 CC 21 A2 63 CC 21 30 4D
-EC 84 82 2E 22 00 0D 12 87 12 C4 85 2C 80 40 85
-30 88 22 80 00 00 04 57 4F 52 44 00 3C 40 C6 21
-39 4C 3A 4C 09 5A 3A 5C 28 4C 09 9A 1C 24 7E 9A
-FC 27 1A 83 3B 40 60 00 C8 4C 00 00 09 9A 0F 24
-7C 4A 4E 9C 0C 24 18 53 4B 9C F6 2F 82 93 B4 21
-F3 27 7C 90 7B 00 F0 2F 7C 80 20 00 ED 3F 1A 82
-C8 21 82 4A CA 21 1E 42 CC 21 08 8E CE 48 00 00
-30 4D 00 00 04 46 49 4E 44 00 2F 83 0C 4E 65 4C
-74 40 80 00 3B 40 D0 21 3E 4B 0E 93 1E 24 58 4C
-01 00 78 F0 1E 00 0E 58 2E 53 1E 4E FE FF 0E 93
-F3 27 09 4E 78 49 48 C4 48 95 F7 23 0A 4C 1A 53
-FA 99 00 00 F2 23 58 83 FA 23 19 B3 09 63 0C 49
-6A 4E 1E 43 4A 93 01 30 2E 83 8F 4C 00 00 35 40
-00 80 34 40 0C 80 30 4D 8C 81 07 3E 4E 55 4D 42
-45 52 3C 4F 38 4F 29 4F 2F 82 1B 42 E2 21 6A 4C
-7A 80 30 00 7A 90 0A 00 05 28 7A 80 07 00 7A 90
-0A 00 13 28 0A 9B 11 2C 82 49 D0 04 82 48 D2 04
-82 4B C8 04 19 42 E4 04 18 42 E6 04 09 5A 08 63
-1C 53 1E 83 E4 23 8F 48 02 00 8F 4C 00 00 8F 49
-04 00 30 4D 0C 43 1B 42 E2 21 32 C0 00 02 2D 15
-09 43 08 43 3D 40 74 87 3F 82 8F 4E 06 00 0C 4E
-7E 4C 6A 4C 7A 80 2C 00 10 2C 5A 83 2B 43 7A 52
-07 24 3B 52 6A 53 04 24 3B 40 10 00 5A 83 BF 23
-1C 53 1E 83 6A 4C 7A 80 2C 00 5A 93 B8 23 B1 43
-02 00 CE 3F 76 87 0E 93 32 24 32 B0 00 02 2F 20
-32 D0 00 02 FC 90 2E 00 00 00 02 20 2D 83 C0 3F
-FC 90 2C 00 00 00 23 20 0A 4E 09 43 8F 49 02 00
-5A 83 09 4A 09 5C 69 49 39 80 30 00 79 90 0A 00
-05 28 79 80 07 00 79 90 0A 00 0A 28 09 9B 08 2C
-8F 49 00 00 0E 4B 2C 15 B0 12 58 82 2A 17 E6 3F
-9F 4F 04 00 02 00 AF 4F 04 00 0E 4A 4E 93 2B 17
-0E 4C 82 4B E2 21 04 24 3F 50 06 00 0E F3 30 4D
-2F 53 9F 4F 02 00 04 00 BF 4F 00 00 3E E3 09 20
-3E E3 BF E3 02 00 BF E3 00 00 9F 53 02 00 8F 63
-00 00 32 B0 00 02 01 20 2F 53 30 4D D8 84 07 45
-58 45 43 55 54 45 0A 4E 3E 4F 00 4A 1E 81 01 2C
-1A 42 CC 21 A2 53 CC 21 8A 4E 00 00 3E 4F 30 4D
-2E 88 87 4C 49 54 45 52 41 4C 82 93 BE 21 0F 24
-1A 42 CC 21 A2 52 CC 21 BA 40 2C 80 00 00 8A 4E
-02 00 3E 4F 32 B0 00 02 32 C0 00 02 F1 23 30 4D
-AE 85 05 43 4F 55 4E 54 2F 83 1E 53 8F 4E 00 00
-5E 4E FF FF 30 4D 82 43 CA 21 82 4E C6 21 B2 4F
-C8 21 3E 4F 30 4D 0D 12 87 12 86 88 20 82 0C 86
-A2 88 3D 40 AA 88 E1 22 44 3E AC 88 0A 4E 3E 4F
-3D 40 C2 88 37 27 3D 40 9C 88 1A E2 BE 21 B8 27
-B2 23 C4 88 3E 4F 3D 40 9C 88 BF 23 DE 53 00 00
-68 4E 08 5E F8 40 3F 00 00 00 3D 40 52 8B CC 3F
-1E 88 08 45 56 41 4C 55 41 54 45 00 39 40 C6 21
-3C 49 3B 49 3A 49 3D 15 87 12 96 88 FE 88 B2 41
-CA 21 B2 41 C8 21 B2 41 C6 21 3D 41 30 4D 94 81
-04 51 55 49 54 00 31 40 E0 20 B2 40 00 20 00 20
-82 43 BE 21 82 43 08 18 87 12 88 85 05 0D 0A 6F
-6B 20 40 85 D6 83 08 85 96 88 D6 80 68 81 88 85
-0D 73 74 61 63 6B 20 65 6D 70 74 79 21 20 C8 89
-2C 80 30 FF 74 83 A4 81 88 85 0B 46 52 41 4D 20
-66 75 6C 6C 21 20 C8 89 38 82 EA 80 B0 81 2A 89
-88 85 05 0D 0A 20 20 20 AC 81 32 89 F0 83 05 41
-42 4F 52 54 3F 40 80 20 C6 3F B2 40 B8 90 16 91
-B2 40 60 84 54 84 B2 40 C4 84 D4 84 B2 40 70 85
-86 85 B2 40 AE 83 D4 83 82 43 F4 98 82 43 00 99
-82 43 0C 99 82 43 3C 99 82 43 48 99 82 43 54 99
-B2 40 0A 00 E2 21 30 41 8F 93 02 00 03 20 2F 52
-3E 4F 30 4D B2 40 82 48 92 84 B0 12 96 89 A2 B3
-9C 05 FD 27 B2 40 11 00 8E 05 D2 C3 03 02 92 C3
-9C 05 38 40 F0 FF 39 42 03 43 19 83 FD 23 18 83
-FA 23 92 B3 9C 05 F3 23 0D 12 87 12 88 85 04 1B
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diff --git a/MSP_EXP430FR2355_24MHz_6Mbds.txt b/MSP_EXP430FR2355_24MHz_6Mbds.txt
index 24cb97d..85b6215 100644 (file)
--- a/MSP_EXP430FR2355_24MHz_6Mbds.txt
+++ b/MSP_EXP430FR2355_24MHz_6Mbds.txt
@@ -1,6 +1,8 @@
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 @8000
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 00 00 3E 41 0D 12 3D 4E 30 4D 00 00 04 45 58 49
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diff --git a/MSP_EXP430FR2355_24MHz_921600bds.txt b/MSP_EXP430FR2355_24MHz_921600bds.txt
index 70956fb..0884927 100644 (file)
--- a/MSP_EXP430FR2355_24MHz_921600bds.txt
+++ b/MSP_EXP430FR2355_24MHz_921600bds.txt
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diff --git a/MSP_EXP430FR2433_16MHz_115200bds.txt b/MSP_EXP430FR2433_16MHz_115200bds.txt
index c5579c8..1df5755 100644 (file)
--- a/MSP_EXP430FR2433_16MHz_115200bds.txt
+++ b/MSP_EXP430FR2433_16MHz_115200bds.txt
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diff --git a/MSP_EXP430FR2433_16MHz_5Mbds.txt b/MSP_EXP430FR2433_16MHz_5Mbds.txt
index ac54d66..ebe3d97 100644 (file)
--- a/MSP_EXP430FR2433_16MHz_5Mbds.txt
+++ b/MSP_EXP430FR2433_16MHz_5Mbds.txt
@@ -1,6 +1,8 @@
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diff --git a/MSP_EXP430FR2433_16MHz_921600bds.txt b/MSP_EXP430FR2433_16MHz_921600bds.txt
index 4d8f521..bb24022 100644 (file)
--- a/MSP_EXP430FR2433_16MHz_921600bds.txt
+++ b/MSP_EXP430FR2433_16MHz_921600bds.txt
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diff --git a/MSP_EXP430FR5739_24MHz_115200bds.txt b/MSP_EXP430FR5739_24MHz_115200bds.txt
index c0c4a7e..f02b912 100644 (file)
--- a/MSP_EXP430FR5739_24MHz_115200bds.txt
+++ b/MSP_EXP430FR5739_24MHz_115200bds.txt
@@ -1,6 +1,6 @@
 @1800
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 @C200
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diff --git a/MSP_EXP430FR5739_24MHz_6Mbds.txt b/MSP_EXP430FR5739_24MHz_6Mbds.txt
index 7b0f67e..8b10fde 100644 (file)
--- a/MSP_EXP430FR5739_24MHz_6Mbds.txt
+++ b/MSP_EXP430FR5739_24MHz_6Mbds.txt
@@ -1,6 +1,6 @@
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diff --git a/MSP_EXP430FR5739_24MHz_921600bds.txt b/MSP_EXP430FR5739_24MHz_921600bds.txt
index 73c2c78..e012dfb 100644 (file)
--- a/MSP_EXP430FR5739_24MHz_921600bds.txt
+++ b/MSP_EXP430FR5739_24MHz_921600bds.txt
@@ -1,6 +1,6 @@
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-26 D3
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 q

diff --git a/MSP_EXP430FR5969_16MHz_115200bds.txt b/MSP_EXP430FR5969_16MHz_115200bds.txt
index 5642532..7696bee 100644 (file)
--- a/MSP_EXP430FR5969_16MHz_115200bds.txt
+++ b/MSP_EXP430FR5969_16MHz_115200bds.txt
@@ -1,6 +1,8 @@
 @1800
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diff --git a/MSP_EXP430FR5969_16MHz_5Mbds.txt b/MSP_EXP430FR5969_16MHz_5Mbds.txt
index d1dbb10..2364b1a 100644 (file)
--- a/MSP_EXP430FR5969_16MHz_5Mbds.txt
+++ b/MSP_EXP430FR5969_16MHz_5Mbds.txt
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diff --git a/MSP_EXP430FR5969_16MHz_921600bds.txt b/MSP_EXP430FR5969_16MHz_921600bds.txt
index 1a87ef0..d27dd9c 100644 (file)
--- a/MSP_EXP430FR5969_16MHz_921600bds.txt
+++ b/MSP_EXP430FR5969_16MHz_921600bds.txt
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diff --git a/MSP_EXP430FR5994.txt b/MSP_EXP430FR5994.txt
new file mode 100644 (file)
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diff --git a/MSP_EXP430FR5994_16MHz_115200bds_SD_CARD.txt b/MSP_EXP430FR5994_16MHz_115200bds_SD_CARD.txt
index f63b082..9dac743 100644 (file)
--- a/MSP_EXP430FR5994_16MHz_115200bds_SD_CARD.txt
+++ b/MSP_EXP430FR5994_16MHz_115200bds_SD_CARD.txt
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diff --git a/MSP_EXP430FR5994_16MHz_5Mbds_SD_CARD.txt b/MSP_EXP430FR5994_16MHz_5Mbds_SD_CARD.txt
index 9fba841..9ea9509 100644 (file)
--- a/MSP_EXP430FR5994_16MHz_5Mbds_SD_CARD.txt
+++ b/MSP_EXP430FR5994_16MHz_5Mbds_SD_CARD.txt
@@ -1,6 +1,8 @@
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diff --git a/MSP_EXP430FR5994_16MHz_921600bds_SD_CARD.txt b/MSP_EXP430FR5994_16MHz_921600bds_SD_CARD.txt
index d9ba1e7..72c6211 100644 (file)
--- a/MSP_EXP430FR5994_16MHz_921600bds_SD_CARD.txt
+++ b/MSP_EXP430FR5994_16MHz_921600bds_SD_CARD.txt
@@ -1,6 +1,8 @@
 @1800
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 00 00 3E 41 0D 12 3D 4E 30 4D 00 00 04 45 58 49
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diff --git a/MSP_EXP430FR6989_16MHz_115200bds.txt b/MSP_EXP430FR6989_16MHz_115200bds.txt
index 6918eb6..78199cb 100644 (file)
--- a/MSP_EXP430FR6989_16MHz_115200bds.txt
+++ b/MSP_EXP430FR6989_16MHz_115200bds.txt
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 q

diff --git a/MSP_EXP430FR6989_16MHz_5Mbds.txt b/MSP_EXP430FR6989_16MHz_5Mbds.txt
index 4427159..7191c1c 100644 (file)
--- a/MSP_EXP430FR6989_16MHz_5Mbds.txt
+++ b/MSP_EXP430FR6989_16MHz_5Mbds.txt
@@ -1,6 +1,8 @@
 @1800
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 @4400
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diff --git a/MSP_EXP430FR6989_16MHz_921600bds.txt b/MSP_EXP430FR6989_16MHz_921600bds.txt
index 2ce115e..3abecb0 100644 (file)
--- a/MSP_EXP430FR6989_16MHz_921600bds.txt
+++ b/MSP_EXP430FR6989_16MHz_921600bds.txt
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 @FFFE
-26 55
+14 55
 q

diff --git a/README.md b/README.md
index af3b018..d876f5a 100644 (file)
--- a/README.md
+++ b/README.md
@@ -9,19 +9,23 @@ For only 3 kbytes in addition, you have the primitives to access the sd\_card FA
 It works with all SD CARD memories from 64MB to 64GB. Read or write a byte is done in less than a microsecond @ 16MHz.
 This enables to make a fast data logger with a small footprint as a MSP430FR5738 QFN24. To compare with a LPC800 ARM entry-level...
 
-With all options its size is about 10kB. 
+With all core options its size is under 9.5kB. 
 
        Tested on MSP-EXP430{FR5969,FR5994,FR6989,FR4133,FR2355,FR2433} launchpads and CHIPSTICKFR2433,
-    at 0.5, 1, 2, 4, 8, 12, 16 MHz plus 20MHz and 24MHz for FR2355,FR573x devices.
+    at 0.5, 1, 2, 4, 8, 12, 16 MHz plus 20MHz and 24MHz for FR23xx,FR57xx devices.
 
     For the moment, the IDE works under WINDOWS...
        
-    Files launchpad_5Mbds.txt are 16threads vocabularies 16MHz executables, with 5MBds "4 WIRES" terminal,
-    usable with PL2303HXD only.
+    Files launchpad_921600bds.txt are 16threads vocabularies 16MHz executables, with
+    "3 WIRES" (XON/XOFF flow control) and "4 WIRES" (Hardware flow control) 921600Bds terminal.
+
     Launchpad_115200.txt files are same except 115200Bds for unlucky linux men without TERATERM. 
     For the launchpad MSP-EXP430FR5994 with SD_CARD, full version is available. For others, you must 
     recompile forthMSP430FR.asm with SD_CARD_LOADER and SD_CARD_READ_WRITE switches turned ON
     (uncomment their line).
+    
+    if you use a cable with a PL2303HXD, terminal baudrate can be boosted on the fly to 5Mbds! 
+    Try it by downloading MSP430-FORTH\CHNGBAUD.f. 
 
     Once the Fast Forth code is loaded in the target FRAM memory, you can add it assembly code or 
     FORTH code, or both, by downloading your source files that embedded Fast Forth interprets and
@@ -32,7 +36,7 @@ With all options its size is about 10kB.
     source file.f in a targeted source file.4th ready to download.
     A set of .bat files is furnished to do this automatically. See it all in the \MSP430-FORTH folder.
 
-       The download, interpretation and compilation of a source file.4th is done at a throughput
+    The download, interpretation and compilation of a source file.4th is done at a throughput
     of 40/80/120 kbytes/sec with a 8/16/24 MHz clock. 
     Considering a ratio 5/1, that of the compiled code is 8/16/24 kbytes/sec.
 
@@ -48,6 +52,72 @@ With all options its size is about 10kB.
 What is new ?
 -------------
 
+    FastForth V206: just 6kb for 16MHz + 5Mbds terminal + macro assembler + conditional compiler!
+                 -       - 
+
+        The terminal baudrate can be changed on the fly. Download MSP430-FORTH\CHNGBAUD.f to do.
+
+        forthMSP430FR.asm: 
+
+                the DTC model chosen for Fast forth is 2. The others become experimental.
+
+                Bugs corrected: ALSO and :NONAME (option).
+
+                The structure of primary DEFERred words as KEY,EMIT,CR,WARM... is modified,
+                                 -------
+                the address of their default execute part, without name, can be found with:
+                ' <name> >BODY
+
+                    example, after this entry: ' DROP IS KEY
+                    KEY (or ' KEY EXECUTE) runs DROP i.e. the redirection made by IS,
+                    ' KEY >BODY EXECUTE runs KEY, the default action at the BODY address.
+
+                    and: ' KEY >BODY IS KEY
+                    restore the default action of this primary DEFERred word.
+                                                       -------
+
+                    WARNING! you cannot do that with words created by DEFER !
+                    DEFER creates only secondary DEFERred words, without BODY !
+                                       ---------
+
+                    to build a primary DEFERred FORTH word, 
+                               -------
+                    you must create a DEFERred word followed by
+                    a :NONAME definition, ended by ; IS <name>:
+
+                        DEFER truc
+
+                        :NONAME         \ does nothing (for the example)
+                            DUP
+                            DROP
+                        ; IS truc
+
+                    The advantage of creating primary DEFERred words is to set their
+                    default state, enabling to reinitialize them easily.
+
+        forthMSP430FR_ASM.asm:
+
+                All assembly code is revamped.
+
+                POPM and PUSHM instructions now follow the TI syntax :-(
+
+                Added CODENNM as assembly counterpart of :NONAME (option)
+
+                    to build the primary DEFERred assembly word "machin" :
+                                 -------
+
+                        DEFER machin
+
+                        CODENNM
+                            NOP2        \ assembly instruction
+                            NOP3        \ assembly instruction
+                            MOV @IP+,PC \ mandatory before ENDCODE
+                        ENDCODE IS machin
+
+                        you can obviously mix LOW/HIGH levels in CODENNM
+                        and :NONAME areas...
+
+
     FastForth V205
         Added MSP-EXP430FR2355 launchpad
         Added word :NONAME (option).
@@ -58,7 +128,7 @@ What is new ?
         Words AND, OR, XOR are moved as complement in ANS_COMP.f file.
         Simplified preprocessor files in \config\gema\ folder: only two for one target:
             one for the device, other for the target (launchpad or user application/module).
-            and similarly with the assembly files: device.inc and target.asm, for compiling FastForth.
+            and similarly with the assembly files: Device.inc and Target.asm, for compiling FastForth.
         Corrected startup time in target.asm files.
         Modified Clock config in MSP_EXP430FR2433.asm and MSP_EXP430FR4133.ASM, allowing clock modulation.
 
@@ -1298,7 +1368,7 @@ ANNEXE
 
 The embedded assembler don't recognize the (useless) TI's symbolic addressing mode: ADD.B EDE,TONI.
 
-REGISTERS correspondence (preprocessor gema.exe allow you to use FASTFORTH registers's names).
+REGISTERS correspondence (the preprocessor gema.exe allow you to use FASTFORTH or TI registers's names).
 
     embedded ASM    TI      FASTFORTH   comment 
                              
@@ -1322,8 +1392,8 @@ REGISTERS correspondence (preprocessor gema.exe allow you to use FASTFORTH regis
 REGISTERS use
 
     The FASTFORTH registers rDOCOL, rDOVAR, rDOCON and rDODOES must be preserved, 
-    PUSHM R7,R4 before use and POPM R4,R7 after.
-    don't use R3 and use R2 only with register addressing mode.
+    PUSHM #4,R7 before use and POPM #4,R7 after.
+    don't use R3 and use R2 only with BIC, BIT, BIS instructions in register mode.
 
 
 PARAMETERS STACK use
@@ -1336,12 +1406,10 @@ PARAMETERS STACK use
         SUB #2,PSP                  \ insert a empty 2th cell
         MOV TOS,0(PSP)              \ fill this 2th cell with first cell
         MOV <what you want>,TOS     \ MOV or MOV.B <what you want>,TOS ; i.e. update first cell
-        ...
 
     to pop one cell from the PSP stack :
 
         MOV @PSP+,TOS               \ first cell TOS is lost and replaced by the 2th.
-        ...
 
     don't never pop a byte with instruction MOV.B @PSP+, because generates a stack misalignement...
 
@@ -1352,40 +1420,33 @@ RETURN STACK use
     to push one cell on the RSP stack :
 
         PUSH <what you want>        \
-        ...
 
     to pop one cell from the RSP stack :
 
         MOV @RSP+,<where you want>   \
-        ...
 
     don't never pop a byte with instruction MOV.B @RSP+, ...
 
 
     to push multiple registers on the RSP stack :
 
-        PUSHM Rx,Ry                 \ x > y 
-        ...
+        PUSHM #n,Rx                 \  with 0 <= x-(n-1) < 16
 
     to pop multiple registers from the RSP stack :
 
-        POPM Ry,Rx                  \ y < x
-        ...
-
-CPUx instructions PUSHM / POPM (my own syntax, not the TI's one, too bad :-)
-
-    PUSHM order : PSP,TOS, IP,   S,   T,   W,  X,  Y, R7, R6, R5, R4
-    PUSHM order : R15,R14,R13, R12, R11, R10, R9, R8, R7, R6, R5, R4
+        POPM #n,Rx                  \  with 0 <= x-(n-1) < 16
 
-    example : PUSHM IP,Y    \ push R13, R12, R11, R10, R9, R8 registers onto the stack RSP
+    PUSHM order : PSP,TOS, IP,  S,  T,  W,  X,  Y, rEXIT,rDOVAR,rDOCON, rDODOES, R3, SR,RSP, PC
+    PUSHM order : R15,R14,R13,R12,R11,R10, R9, R8,  R7  ,  R6  ,  R5  ,   R4   , R3, R2, R1, R0
 
+    example : PUSHM #6,IP pushes IP,S,T,W,X,Y registers to return stack
 
-    POPM  order : R4, R5, R6, R7,  Y,  X,  W,   T,  S, IP,TOS,PSP
-    POPM  order : R4, R5, R6, R7, R8, R9, R10,R11,R12,R13,R14,R15
+    POPM  order :  PC,RSP, SR, R3, rDODOES,rDOCON,rDOVAR, rEXIT,  Y,  X,  W,  T,  S, IP,TOS,PSP
+    POPM  order :  R0, R1, R2, R3,   R4   ,  R5  ,  R6  ,   R7 , R8, R9,R10,R11,R12,R13,R14,R15
 
-    example : POPM Y,IP     \ restore R8, R9, R10,R11,R12,R13 registers from the stack RSP
+    example : POPM #6,IP   pulls Y,X,W,T,S,IP registers from return stack
 
-    error occurs if bad order (PUSHM Y,IP for example)
+    error occurs if n is out of bounds
 
 
 CPUx instructions RRCM,RRAM,RLAM,RRUM

diff --git a/TERMINALBAUDRATE.asm b/TERMINALBAUDRATE.inc
similarity index 78%
rename from TERMINALBAUDRATE.asm
rename to TERMINALBAUDRATE.inc
index ecca1d1..d7f1253 100644 (file)
--- a/TERMINALBAUDRATE.asm
+++ b/TERMINALBAUDRATE.inc
@@ -7,36 +7,36 @@
 ; Configure UART_TERM @ 38400 bauds / 1MHz
 ; N=1000000/38400=26.04166... ==> UCOS16=1, UCBR0=int(N/16)=1, UCBRF0=int(frac(N/16)*16)=10, UCBRS0= fn(frac(N))=fn(0.04166)=0x00
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #1,    &TERMBRW
-            MOV.W   #00A1h, &TERMMCTLW
+TERMBRW_INI     .equ 1
+TERMMCTLW_INI   .equ 00A1h
 
         .CASE 19200  ; PL2303TA baudrate
 ; Configure UART_TERM @ 38400 bauds / 500kHz
 ; N=500000/38400=13.20833 ==> UCOS16=0, UCBR0=int(N)=13, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.20833)=0x11
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #13,     &TERMBRW
-            MOV.W   #1100h,&TERMMCTLW
+TERMBRW_INI     .equ 13
+TERMMCTLW_INI   .equ 1100h
 
         .CASE 31250  ; MIDI interface
 ; Configure UART_TERM @ 31250 bauds / 250kHz
 ; N=250000/31250=8 ==> UCOS16=0, UCBR0=int(N)=8, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0)=0
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #8,     &TERMBRW
-            MOV.W   #0000h,&TERMMCTLW
+TERMBRW_INI     .equ 8
+TERMMCTLW_INI   .equ 0000h
 
         .CASE 38400
 ; Configure UART_TERM @ 38400 bauds / 250kHz
 ; N=250000/38400=6.5124166... ==> UCOS16=0, UCBR0=int(N)=6, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.512416)=0xAA
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #6,     &TERMBRW
-            MOV.W   #0AA00h,&TERMMCTLW
+TERMBRW_INI     .equ 6
+TERMMCTLW_INI   .equ 0AA00h
 
         .CASE 57600  ; PL2303TA baudrate
 ; Configure UART_TERM @ 57600 bauds / 250kHz
 ; N=250000/57600=4.340277.. ==> UCOS16=0, UCBR0=int(N)=4, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.340277)=0x49
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #4,     &TERMBRW
-            MOV.W   #04900h,&TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 04900h
 
         .ELSECASE
             .error "UART_TERM / 250 kHz : baudrate not implemented"
@@ -49,64 +49,64 @@
 ; Configure UART_TERM @ 19200 bauds / 1MHz
 ; N=1000000/19200=52.0833... ==> UCOS16=1, UCBR0=int(N/16)=3, UCBRF0=int(frac(N/16)*16)=4, UCBRS0= fn(frac(N))=fn(0.0833)=0x02
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #3,    &TERMBRW
-            MOV.W   #0241h,&TERMMCTLW
+TERMBRW_INI     .equ 3
+TERMMCTLW_INI   .equ 0241h
 
         .CASE 19200
 ; Configure UART_TERM @ 38400 bauds / 1MHz
 ; N=1000000/38400=26.04166... ==> UCOS16=1, UCBR0=int(N/16)=1, UCBRF0=int(frac(N/16)*16)=10, UCBRS0= fn(frac(N))=fn(0.04166)=0x00
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #1,    &TERMBRW
-            MOV.W   #00A1h, &TERMMCTLW
+TERMBRW_INI     .equ 1
+TERMMCTLW_INI   .equ 00A1h
 
         .CASE 31250  ; MIDI interface
 ; Configure UART_TERM @ 31250 bauds / 500kHz
 ; N=500000/31250=16 ==> UCOS16=0, UCBR0=int(N)=16, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0)=0
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #16,     &TERMBRW
-            MOV.W   #0000h,&TERMMCTLW
+TERMBRW_INI     .equ 16
+TERMMCTLW_INI   .equ 0000h
 
         .CASE 38400  ; PL2303TA baudrate
 ; Configure UART_TERM @ 38400 bauds / 500kHz
 ; N=500000/38400=13.20833 ==> UCOS16=0, UCBR0=int(N)=13, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.20833)=0x11
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #13,     &TERMBRW
-            MOV.W   #1100h,&TERMMCTLW
+TERMBRW_INI     .equ 13
+TERMMCTLW_INI   .equ 1100h
 
         .CASE 57600
 ; Configure UART_TERM @ 115200 bauds / 1MHz
 ; N=1000000/115200=8.68055... ==> UCOS16=0, UCBR0=int(N)=8, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.68055)=0xD6
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #8,     &TERMBRW
-            MOV.W   #0D600h,&TERMMCTLW
+TERMBRW_INI     .equ 8
+TERMMCTLW_INI   .equ 0D600h
 
         .CASE 100800  ; PL2303TA baudrate
 ; Configure UART_TERM @ 201600 bauds / 1MHz
 ; N=1000000/201600=4.955401 ==> UCOS16=0, UCBR0=int(N)=4, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.200396)=0xFE
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #4,     &TERMBRW
-            MOV.W   #0FE00h,&TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 0FE00h
 
         .CASE 115200
 ; Configure UART_TERM @ 230400 bauds / 1MHz
 ; N=1000000/230400=4.34027... ==> UCOS16=0, UCBR0=int(N)=4, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.340277)=0x49
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #4,     &TERMBRW
-            MOV.W   #04900h,&TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 04900h
 
         .CASE 134400  ; PL2303TA baudrate
 ; Configure UART_TERM @ 268800 bauds / 1MHz
 ; N=1000000/134400=3.72024 ==> UCOS16=0, UCBR0=int(N)=3, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.72024)=0xBB
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #3,     &TERMBRW
-            MOV.W   #0BB00h,&TERMMCTLW
+TERMBRW_INI     .equ 3
+TERMMCTLW_INI   .equ 0BB00h
 
 ;        .CASE 161280  ; PL2303TA baudrate
 ;; Configure UART_TERM @ 161280 bauds / 500kHz
 ;; N=500000/161280=3.100198 ==> UCOS16=0, UCBR0=int(N)=3, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.100198)=0x08
 ;; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-;            MOV     #3,     &TERMBRW
-;            MOV.W   #01100h,&TERMMCTLW
+;TERMBRW_INI     .equ 3
+;TERMMCTLW_INI   .equ 01100h
 
         .ELSECASE
             .error "UART_TERM / 500 kHz : baudrate not implemented"
@@ -119,99 +119,99 @@
 ; Configure UART_TERM @ 9600 bauds / 1MHz
 ; N=1000000/9600=104.166... ==> UCOS16=1, UCBR0=int(N/16)=6, UCBRF0=int(frac(N/16)*16)=8, UCBRS0= fn(frac(N))=fn(0.1666)=0x20
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #6,    &TERMBRW
-            MOV     #2081h, &TERMMCTLW
+TERMBRW_INI     .equ 6
+TERMMCTLW_INI   .equ 2081h
 
         .CASE 19200
 ; Configure UART_TERM @ 19200 bauds / 1MHz
 ; N=1000000/19200=52.0833... ==> UCOS16=1, UCBR0=int(N/16)=3, UCBRF0=int(frac(N/16)*16)=4, UCBRS0= fn(frac(N))=fn(0.0833)=0x02
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #3,    &TERMBRW
-            MOV.W   #0241h,&TERMMCTLW
+TERMBRW_INI     .equ 3
+TERMMCTLW_INI   .equ 0241h
 
         .CASE 31250  ; MIDI interface
 ; Configure UART_TERM @ 31250 bauds / 1MHz
 ; N=1000000/31250=32 ==> UCOS16=1, UCBR0=int(N/16)=2, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0)=0
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #2,     &TERMBRW
-            MOV.W   #0001h,&TERMMCTLW
+TERMBRW_INI     .equ 2
+TERMMCTLW_INI   .equ 0001h
 
         .CASE 38400
 ; Configure UART_TERM @ 38400 bauds / 1MHz
 ; N=1000000/38400=26.04166... ==> UCOS16=1, UCBR0=int(N/16)=1, UCBRF0=int(frac(N/16)*16)=10, UCBRS0= fn(frac(N))=fn(0.04166)=0x00
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #1,    &TERMBRW
-            MOV.W   #00A1h, &TERMMCTLW
+TERMBRW_INI     .equ 1
+TERMMCTLW_INI   .equ 00A1h
 
         .CASE 57600
 ; Configure UART_TERM @ 57600 bauds / 1MHz
 ; N=1000000/57600=17.301... ==> UCOS16=0, UCBR0=int(N)=17, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.301)=0x4A
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #17,     &TERMBRW
-            MOV.W   #04A00h,&TERMMCTLW
+TERMBRW_INI     .equ 17
+TERMMCTLW_INI   .equ 04A00h
 
         .CASE 100800  ; PL2303TA baudrate
 ; Configure UART_TERM @ 100800 bauds / 1MHz
 ; N=1000000/100800=9,920634 ==> UCOS16=0, UCBR0=int(N)=9, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.920634)=0xFD
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #9,     &TERMBRW
-            MOV.W   #0FD00h,&TERMMCTLW
+TERMBRW_INI     .equ 9
+TERMMCTLW_INI   .equ 0FD00h
 
         .CASE 115200
 ; Configure UART_TERM @ 115200 bauds / 1MHz
 ; N=1000000/115200=8.68055... ==> UCOS16=0, UCBR0=int(N)=8, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.68055)=0xD6
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #8,     &TERMBRW
-            MOV.W   #0D600h,&TERMMCTLW
+TERMBRW_INI     .equ 8
+TERMMCTLW_INI   .equ 0D600h
 
         .CASE 134400  ; PL2303TA baudrate
 ; Configure UART_TERM @ 134400 bauds / 1MHz
 ; N=1000000/134400=7.440476 ==> UCOS16=0, UCBR0=int(N)=7, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.440476)=0x55
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #7,     &TERMBRW
-            MOV.W   #05500h,&TERMMCTLW
+TERMBRW_INI     .equ 7
+TERMMCTLW_INI   .equ 05500h
 
         .CASE 161280  ; PL2303TA baudrate
 ; Configure UART_TERM @ 161280 bauds / 1MHz
 ; N=1000000/161280=6.200396 ==> UCOS16=0, UCBR0=int(N)=6, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.200396)=0x11
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #6,     &TERMBRW
-            MOV.W   #01100h,&TERMMCTLW
+TERMBRW_INI     .equ 6
+TERMMCTLW_INI   .equ 01100h
 
         .CASE 201600  ; PL2303TA baudrate
 ; Configure UART_TERM @ 201600 bauds / 1MHz
 ; N=1000000/201600=4.955401 ==> UCOS16=0, UCBR0=int(N)=4, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.200396)=0xFE
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #4,     &TERMBRW
-            MOV.W   #0FE00h,&TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 0FE00h
 
         .CASE 230400
 ; Configure UART_TERM @ 230400 bauds / 1MHz
 ; N=1000000/230400=4.34027... ==> UCOS16=0, UCBR0=int(N)=4, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.340277)=0x49
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #4,     &TERMBRW
-            MOV.W   #04900h,&TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 04900h
 
         .CASE 250000  ; DMX interface
 ; Configure UART_TERM @ 250000 bauds / 1MHz
 ; N=1000000/250000=4 ==> UCOS16=0, UCBR0=int(N)=4, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0)=0
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #4,     &TERMBRW
-            MOV.W   #0000h,&TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 0000h
 
         .CASE 268800  ; PL2303TA baudrate
 ; Configure UART_TERM @ 268800 bauds / 1MHz
 ; N=1000000/268800=3.72024 ==> UCOS16=0, UCBR0=int(N)=3, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.72024)=0xBB
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #3,     &TERMBRW
-            MOV.W   #0BB00h,&TERMMCTLW
+TERMBRW_INI     .equ 3
+TERMMCTLW_INI   .equ 0BB00h
 
 ;        .CASE 403200  ; PL2303TA baudrate
 ;; Configure UART_TERM @ 403200 bauds / 1MHz
 ;; N=1000000/403200=2.48016 ==> UCOS16=0, UCBR0=int(N)=2, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.48016)=0x55
 ;; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-;            MOV     #2,     &TERMBRW
-;            MOV.W   #05500h,&TERMMCTLW
+;TERMBRW_INI     .equ 2
+;TERMMCTLW_INI   .equ 05500h
 
 
         .ELSECASE
@@ -224,100 +224,100 @@
 ; Configure UART_TERM @ 19200 bauds / 4MHz
 ; N=4000000/38400=208.333... ==> UCOS16=1, UCBR0=int(N/16)=13, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0.33333)=0x49
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #13,    &TERMBRW
-            MOV.W   #4901h, &TERMMCTLW
+TERMBRW_INI     .equ 13
+TERMMCTLW_INI   .equ 4901h
 
         .CASE 19200
 ; Configure UART_TERM @ 9600 bauds / 1MHz
 ; N=1000000/9600=104.166... ==> UCOS16=1, UCBR0=int(N/16)=6, UCBRF0=int(frac(N/16)*16)=8, UCBRS0= fn(frac(N))=fn(0.1666)=0x20
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #6,    &TERMBRW
-            MOV     #2081h, &TERMMCTLW
+TERMBRW_INI     .equ 6
+TERMMCTLW_INI   .equ 2081h
 
         .CASE 31250  ; MIDI interface
 ; Configure UART_TERM @ 31250 bauds / 2MHz
 ; N=2000000/31250=64 ==> UCOS16=1, UCBR0=int(N/16)=4, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0)=0
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #4,     &TERMBRW
-            MOV.W   #0001h,&TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 0001h
 
         .CASE 38400
 ; Configure UART_TERM @ 19200 bauds / 1MHz
 ; N=1000000/19200=52.0833... ==> UCOS16=1, UCBR0=int(N/16)=3, UCBRF0=int(frac(N/16)*16)=4, UCBRS0= fn(frac(N))=fn(0.0833)=0x02
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #3,    &TERMBRW
-            MOV.W   #0241h,&TERMMCTLW
+TERMBRW_INI     .equ 3
+TERMMCTLW_INI   .equ 0241h
 
         .CASE 57600
 ; Configure UART_TERM @ 115200 bauds / 4MHz
 ; N=8000000/230400=34.7222... ==> UCOS16=1, UCBR0=int(N/16)=2, UCBRF0=int(frac(N/16)*16)=2, UCBRS0= fn(frac(N))=fn(0.72222)=0xBB
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #2,     &TERMBRW
-            MOV.W   #0BB21h,&TERMMCTLW
+TERMBRW_INI     .equ 2
+TERMMCTLW_INI   .equ 0BB21h
 
         .CASE 115200
 ; Configure UART_TERM @ 57600 bauds / 1MHz
 ; N=1000000/57600=17.301... ==> UCOS16=0, UCBR0=int(N)=17, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.301)=0x4A
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #17,     &TERMBRW
-            MOV.W   #04A00h,&TERMMCTLW
+TERMBRW_INI     .equ 17
+TERMMCTLW_INI   .equ 04A00h
 
         .CASE 230400
 ; Configure UART_TERM @ 115200 bauds / 1MHz
 ; N=1000000/115200=8.68055... ==> UCOS16=0, UCBR0=int(N)=8, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.68055)=0xD6
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #8,     &TERMBRW
-            MOV.W   #0D600h,&TERMMCTLW
+TERMBRW_INI     .equ 8
+TERMMCTLW_INI   .equ 0D600h
 
         .CASE 250000  ; DMX interface
 ; Configure UART_TERM @ 250000 bauds / 2MHz
 ; N=2000000/250000=8 ==> UCOS16=0, UCBR0=int(N)=8, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0)=0
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #8,     &TERMBRW
-            MOV.W   #0000h,&TERMMCTLW
+TERMBRW_INI     .equ 8
+TERMMCTLW_INI   .equ 0000h
 
         .CASE 268800  ; PL2303TA baudrate
 ; Configure UART_TERM @ 134400 bauds / 1MHz
 ; N=1000000/134400=7.440476 ==> UCOS16=0, UCBR0=int(N)=7, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.440476)=0x55
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #7,     &TERMBRW
-            MOV.W   #05500h,&TERMMCTLW
+TERMBRW_INI     .equ 7
+TERMMCTLW_INI   .equ 05500h
 
         .CASE 403200  ; PL2303TA baudrate
 ; Configure UART_TERM @ 201600 bauds / 1MHz
 ; N=1000000/201600=4.955401 ==> UCOS16=0, UCBR0=int(N)=4, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.200396)=0xFE
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #4,     &TERMBRW
-            MOV.W   #0FE00h,&TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 0FE00h
 
         .CASE 460800 ; CP2102 baudrate
 ; Configure UART_TERM @ 921600 bauds / 4MHz
 ; N = 4000000/460800 = 4.34027... ==> {UCOS16=0, UCBR1=int(N)=4, UCBRF1=dont_care=0  UCBRS1=fn(frac(N))=fn(0.34027)=0x49
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #4,     &TERMBRW
-             MOV.W   #04900h,&TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 04900h
 
         .CASE 614400 ; PL2303TA baudrate
 ; Configure UART_TERM @ 2457600 bauds / 8MHz
 ; N = 8000000/2457600 = 3.25521... ==> {UCOS16=0, UCBR0=int(N)=3, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.25521)=0x44
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #3,     &TERMBRW
-             MOV.W   #04400h,&TERMMCTLW
+TERMBRW_INI     .equ 3
+TERMMCTLW_INI   .equ 04400h
 
         .CASE 806400  ; PL2303TA baudrate
 ; Configure UART_TERM @ 806400 bauds / 2MHz
 ; Configure UART_TERM @ 403200 bauds / 1MHz
 ; N=1000000/403200=2.48016 ==> UCOS16=0, UCBR0=int(N)=2, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.48016)=0x55
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #2,     &TERMBRW
-            MOV.W   #05500h,&TERMMCTLW
+TERMBRW_INI     .equ 2
+TERMMCTLW_INI   .equ 05500h
 
 ;        .CASE 921600
 ;; Configure UART_TERM @ 921600 bauds / 2MHz
 ;; N = 2000000/921600 = 2.170138... ==> {UCOS16=0, UCBR1=int(N)=2, UCBRF1=dont_care=0  UCBRS1=fn(frac(N))=fn(0.170138)=0x11
 ;; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-;             MOV     #2,     &TERMBRW
-;             MOV.W   #01100h,&TERMMCTLW
+;TERMBRW_INI     .equ 2
+;TERMMCTLW_INI   .equ 01100h
 
 
         .ELSECASE
@@ -330,85 +330,85 @@
 ; Configure UART_TERM @ 9600 bauds / 4MHz
 ; N=4000000/19200=416.666... ==> UCOS16=1, UCBR0=int(N/16)=26, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0.66666)=0xD6
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #26,    &TERMBRW
-            MOV.W   #0D601h,&TERMMCTLW
+TERMBRW_INI     .equ 26
+TERMMCTLW_INI   .equ 0D601h
 
         .CASE 19200
 ; Configure UART_TERM @ 19200 bauds / 4MHz
 ; N=4000000/38400=208.333... ==> UCOS16=1, UCBR0=int(N/16)=13, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0.33333)=0x49
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #13,    &TERMBRW
-            MOV.W   #4901h, &TERMMCTLW
+TERMBRW_INI     .equ 13
+TERMMCTLW_INI   .equ 4901h
 
         .CASE 31250  ; MIDI interface
 ; Configure UART_TERM @ 31250 bauds / 4MHz
 ; N=4000000/31250=128 ==> UCOS16=1, UCBR0=int(N/16)=8, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0)=0
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #8,     &TERMBRW
-            MOV.W   #0001h,&TERMMCTLW
+TERMBRW_INI     .equ 8
+TERMMCTLW_INI   .equ 0001h
 
         .CASE 38400
 ; Configure UART_TERM @ 38400 bauds / 4MHz
 ; N=4000000/38400=104.1666... ==> UCOS16=1, UCBR0=int(N/16)=6, UCBRF0=int(frac(N/16)*16)=8, UCBRS0= fn(frac(N))=fn(0.16666)=0x20
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #6,     &TERMBRW
-            MOV.W   #02081h,&TERMMCTLW
+TERMBRW_INI     .equ 6
+TERMMCTLW_INI   .equ 02081h
 
         .CASE 57600
 ; Configure UART_TERM @ 57600 bauds / 4MHz
 ; N=8000000/115200=69.444... ==> UCOS16=1, UCBR0=int(N/16)=4, UCBRF0=int(frac(N/16)*16)=5, UCBRS0= fn(frac(N))=fn(0.44444)=0x55
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #4,     &TERMBRW
-            MOV.W   #5551h, &TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 5551h
 
         .CASE 115200
 ; Configure UART_TERM @ 115200 bauds / 4MHz
 ; N=8000000/230400=34.7222... ==> UCOS16=1, UCBR0=int(N/16)=2, UCBRF0=int(frac(N/16)*16)=2, UCBRS0= fn(frac(N))=fn(0.72222)=0xBB
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #2,     &TERMBRW
-            MOV.W   #0BB21h,&TERMMCTLW
+TERMBRW_INI     .equ 2
+TERMMCTLW_INI   .equ 0BB21h
 
         .CASE 230400
 ; Configure UART_TERM @ 230400 bauds / 4MHz
 ; see table "Recommended Settings for Typical Crystals and Baudrates"
-            MOV     #17,    &TERMBRW
-            MOV.W   #04A00h,&TERMMCTLW
+TERMBRW_INI     .equ 17
+TERMMCTLW_INI   .equ 04A00h
 
         .CASE 250000  ; DMX interface
 ; Configure UART_TERM @ 250000 bauds / 4MHz
 ; N=4000000/250000=16 ==> UCOS16=1, UCBR0=int(N/16)=1, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0)=0
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #1,     &TERMBRW
-            MOV.W   #0001h, &TERMMCTLW
+TERMBRW_INI     .equ 1
+TERMMCTLW_INI   .equ 0001h
 
         .CASE 460800
 ; Configure UART_TERM @ 460800 bauds / 4MHz
 ; N = 8000000/921600 = 8.680555... ==> {UCOS16=0, UCBR0=int(N)=8, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.68055)=0xD6
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #8,     &TERMBRW
-             MOV.W   #0D600h,&TERMMCTLW
+TERMBRW_INI     .equ 8
+TERMMCTLW_INI   .equ 0D600h
 
         .CASE 806400  ; PL2303TA baudrate
 ; Configure UART_TERM @ 806400 bauds / 4MHz
 ; Configure UART_TERM @ 201600 bauds / 1MHz
 ; N=1000000/201600=4.955401 ==> UCOS16=0, UCBR0=int(N)=4, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.200396)=0xFE
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #4,     &TERMBRW
-            MOV.W   #0FE00h,&TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 0FE00h
 
         .CASE 921600 ; CP2102 baudrate
 ; Configure UART_TERM @ 921600 bauds / 4MHz
 ; N = 8000000/921600 = 4.34027... ==> {UCOS16=0, UCBR1=int(N)=4, UCBRF1=dont_care=0  UCBRS1=fn(frac(N))=fn(0.34027)=0x49
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #4,     &TERMBRW
-             MOV.W   #04900h,&TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 04900h
 
         .CASE 1228800 ; PL2303TA baudrate
 ; Configure UART_TERM @ 2457600 bauds / 8MHz
 ; N = 8000000/1228800 = 3.25521... ==> {UCOS16=0, UCBR0=int(N)=3, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.25521)=0x44
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #3,     &TERMBRW
-             MOV.W   #04400h,&TERMMCTLW
+TERMBRW_INI     .equ 3
+TERMMCTLW_INI   .equ 04400h
 
 
         .ELSECASE
@@ -421,127 +421,127 @@
         .CASE 9600
 ; Configure UART_TERM @ 9600 bauds / 8MHz
 ; N=8000000/9600=833.333... ==> UCOS16=1, UCBR0=int(N/16)=52, UCBRF0=int(frac(N/16)*16)=1, UCBRS0= fn(frac(N))=fn(0.33333)=0x49
-            MOV     #52,    &TERMBRW
-            MOV     #4911h, &TERMMCTLW
+TERMBRW_INI     .equ 52
+TERMMCTLW_INI   .equ 4911h
 
         .CASE 19200
 ; Configure UART_TERM @ 19200 bauds / 8MHz
 ; N=8000000/19200=416.666... ==> UCOS16=1, UCBR0=int(N/16)=26, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0.66666)=0xD6
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #26,    &TERMBRW
-            MOV.W   #0D601h,&TERMMCTLW
+TERMBRW_INI     .equ 26
+TERMMCTLW_INI   .equ 0D601h
 
         .CASE 31250  ; MIDI interface
 ; Configure UART_TERM @ 31250 bauds / 8MHz
 ; N=8000000/31250=256 ==> UCOS16=1, UCBR0=int(N/16)=16, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0)=0
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #16,     &TERMBRW
-            MOV.W   #0001h,&TERMMCTLW
+TERMBRW_INI     .equ 16
+TERMMCTLW_INI   .equ 0001h
 
         .CASE 38400
 ; Configure UART_TERM @ 38400 bauds / 8MHz
 ; N=8000000/38400=208.333... ==> UCOS16=1, UCBR0=int(N/16)=13, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0.33333)=0x49
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #13,    &TERMBRW
-            MOV.W   #4901h, &TERMMCTLW
+TERMBRW_INI     .equ 13
+TERMMCTLW_INI   .equ 4901h
 
         .CASE 57600
 ; Configure UART_TERM @ 57600 bauds / 8MHz
 ; N=8000000/57600=138.888... ==> UCOS16=1, UCBR0=int(N/16)=8, UCBRF0=int(frac(N/16)*16)=10, UCBRS0= fn(frac(N))=fn(0.88888)=0xF7
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #8,     &TERMBRW
-            MOV.W   #0F7A1h,&TERMMCTLW
+TERMBRW_INI     .equ 8
+TERMMCTLW_INI   .equ 0F7A1h
 
         .CASE 115200
 ; Configure UART_TERM @ 115200 bauds / 8MHz
 ; N=8000000/115200=69.444... ==> UCOS16=1, UCBR0=int(N/16)=4, UCBRF0=int(frac(N/16)*16)=5, UCBRS0= fn(frac(N))=fn(0.44444)=0x55
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #4,     &TERMBRW
-            MOV.W   #5551h, &TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 5551h
 
         .CASE 230400
 ; Configure UART_TERM @ 230400 bauds / 8MHz
 ; N=8000000/230400=34.7222... ==> UCOS16=1, UCBR0=int(N/16)=2, UCBRF0=int(frac(N/16)*16)=2, UCBRS0= fn(frac(N))=fn(0.72222)=0xBB
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #2,     &TERMBRW
-            MOV.W   #0BB21h,&TERMMCTLW
+TERMBRW_INI     .equ 2
+TERMMCTLW_INI   .equ 0BB21h
 
         .CASE 250000  ; DMX interface
 ; Configure UART_TERM @ 250000 bauds / 8MHz
 ; N=8000000/250000=32 ==> UCOS16=1, UCBR0=int(N/16)=2, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0)=0
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #2,     &TERMBRW
-            MOV.W   #0001h, &TERMMCTLW
+TERMBRW_INI     .equ 2
+TERMMCTLW_INI   .equ 0001h
 
         .CASE 460800
 ; Configure UART_TERM @ 460800 bauds / 8MHz
 ; see table "Recommended Settings for Typical Crystals and Baudrates"
-            MOV     #17,    &TERMBRW
-            MOV.W   #04A00h,&TERMMCTLW
+TERMBRW_INI     .equ 17
+TERMMCTLW_INI   .equ 04A00h
 
         .CASE 614400 ; PL2303TA baudrate
 ; Configure UART_TERM @ 614400 bauds / 8MHz
 ; N = 8000000/614400 = 13.02083... ==> {UCOS16=0, UCBR0=int(N)=13, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.02083)=0x02
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #13,     &TERMBRW
-             MOV.W   #00200h,&TERMMCTLW
+TERMBRW_INI     .equ 13
+TERMMCTLW_INI   .equ 00200h
 
         .CASE 806400  ; PL2303TA baudrate
 ; Configure UART_TERM @ 806400 bauds / 8MHz
 ; Configure UART_TERM @ 100800 bauds / 1MHz
 ; N=1000000/100800=9,920634 ==> UCOS16=0, UCBR0=int(N)=9, UCBRF0=dont_care=0, UCBRS0= fn(frac(N))=fn(0.920634)=0xFD
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #9,     &TERMBRW
-            MOV.W   #0FD00h,&TERMMCTLW
+TERMBRW_INI     .equ 9
+TERMMCTLW_INI   .equ 0FD00h
 
         .CASE 921600
 ; Configure UART_TERM @ 921600 bauds / 8MHz
 ; Configure UART_TERM @ 1843200 bauds / 16MHz
 ; N = 16000000/1843200 = 8.680555... ==> {UCOS16=0, UCBR1=int(N)=8, UCBRF1=dont_care=0  UCBRS1=fn(frac(N))=fn(0.68055)=0xD6
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #8,     &TERMBRW
-             MOV.W   #0D600h,&TERMMCTLW
+TERMBRW_INI     .equ 8
+TERMMCTLW_INI   .equ 0D600h
 
         .CASE 1000000
 ; Configure UART_TERM @ 1000000 bauds / 8MHz
 ; Configure UART_TERM @ 2000000 bauds / 16MHz
 ; N = 16000000/2000000 = 8 ==> {UCOS16=0, UCBR0=int(N)=8, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.00000)=0x00
-            MOV     #8 ,    &TERMBRW
-            MOV.W   #00000h,&TERMMCTLW
+TERMBRW_INI     .equ 8 
+TERMMCTLW_INI   .equ 00000h
 
         .CASE 1228800 ; PL2303TA baudrate
 ; Configure UART_TERM @ 1228800 bauds / 8MHz
 ; N = 8000000/1228800 = 6.510416... ==> {UCOS16=0, UCBR0=int(N)=6, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.510416)=0xAA
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #6,     &TERMBRW
-             MOV.W   #0AA00h,&TERMMCTLW
+TERMBRW_INI     .equ 6
+TERMMCTLW_INI   .equ 0AA00h
 
         .CASE 1382400 ; CP2102 baudrate
 ; Configure UART_TERM @ 1382400 bauds / 8MHz
 ; N = 8000000/1382400 = 5.787037... ==> {UCOS16=0, UCBR0=int(N)=5, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.787037)=0xED
-            MOV     #5,    &TERMBRW
-            MOV.W   #0DD00h,&TERMMCTLW
+TERMBRW_INI     .equ 5
+TERMMCTLW_INI   .equ 0DD00h
 
         .CASE 1843200 ; CP2102 baudrate (with programming)
 ; Configure UART_TERM @ 1843200 bauds / 8MHz
 ; N = 16000000/1843200 = 4.34027... ==> {UCOS16=0, UCBR1=int(N)=4, UCBRF1=dont_care=0  UCBRS1=fn(frac(N))=fn(0.34027)=0x49
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #4,     &TERMBRW
-             MOV.W   #04900h,&TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 04900h
 
         .CASE 2457600 ; PL2303TA baudrate
 ; Configure UART_TERM @ 2457600 bauds / 8MHz
 ; N = 8000000/1228800 = 3.25521... ==> {UCOS16=0, UCBR0=int(N)=3, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.25521)=0x44
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #3,     &TERMBRW
-             MOV.W   #04400h,&TERMMCTLW
+TERMBRW_INI     .equ 3
+TERMMCTLW_INI   .equ 04400h
 
         .CASE 3000000 ; PL2303TA baudrate
 ; Configure UART_TERM @ 3000000 bauds / 8MHz
 ; Configure UART_TERM @ 6000000 bauds / 16MHz
 ; N = 16000000/6000000 = 2.6666.. ==> {UCOS16=0, UCBR0=int(N)=2, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.6666)=0xB6
-            MOV     #2,    &TERMBRW
-            MOV.W   #0B600h,&TERMMCTLW
+TERMBRW_INI     .equ 2
+TERMMCTLW_INI   .equ 0B600h
 
         .ELSECASE
             .error "UART_TERM / 8 MHz : baudrate not implemented"
@@ -556,133 +556,133 @@
 ; Configure UART_TERM @ 19200 bauds / 20MHz
 ; N=20000000/19200=1041.66666 ==> UCOS16=1, UCBR0=int(N/16)=65, UCBRF0=int(frac(N/16)*16)=1, UCBRS0= fn(frac(N))=fn(0.66666)=0xd6
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #65,&TERMBRW
-            MOV     #0D611h,&TERMMCTLW
+TERMBRW_INI     .equ 65
+TERMMCTLW_INI   .equ 0D611h
 
         .CASE 19200
 ; Configure UART_TERM @ 19200 bauds / 10MHz
 ; Configure UART_TERM @ 38400 bauds / 20MHz
 ; N=20000000/38400=520.833333 ==> UCOS16=1, UCBR0=int(N/16)=32, UCBRF0=int(frac(N/16)*16)=8, UCBRS0= fn(frac(N))=fn(0)=0xBF
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #32,&TERMBRW
-            MOV.W   #0BF01h,&TERMMCTLW
+TERMBRW_INI     .equ 32
+TERMMCTLW_INI   .equ 0BF01h
 
         .CASE 31250  ; MIDI interface
 ; Configure UART_TERM @ 31250 bauds / 10MHz
 ; N=10000000/31250=320 ==> UCOS16=1, UCBR0=int(N/16)=20, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0)=0
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #20,&TERMBRW
-            MOV.W   #0001h,&TERMMCTLW
+TERMBRW_INI     .equ 20
+TERMMCTLW_INI   .equ 0001h
 
         .CASE 38400
 ; Configure UART_TERM @ 38400 bauds / 10MHz
 ; N=10000000/38400=260.41666 ==> UCOS16=1, UCBR0=int(N/16)=16, UCBRF0=int(frac(N/16)*16)=4, UCBRS0= fn(frac(N))=fn(.04166)=0x92
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #16,&TERMBRW
-            MOV.W   #09241h,&TERMMCTLW
+TERMBRW_INI     .equ 16
+TERMMCTLW_INI   .equ 09241h
 
         .CASE 57600
 ; Configure UART_TERM @ 57600 bauds / 10MHz
 ; Configure UART_TERM @ 115200 bauds / 20MHz
 ; N=20000000/115200=173.61111... ==> UCOS16=1, UCBR0=int(N/16)=10, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0.6111)=0xAD
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #10,&TERMBRW
-            MOV.W   #0AD01h,&TERMMCTLW
+TERMBRW_INI     .equ 10
+TERMMCTLW_INI   .equ 0AD01h
 
         .CASE 115200
 ; Configure UART_TERM @ 115200 bauds / 10MHz
 ; Configure UART_TERM @ 230400 bauds / 20MHz
 ; N=20000000/230400=86.80555... ==> UCOS16=1, UCBR0=int(N/16)=5, UCBRF0=int(frac(N/16)*16)=6, UCBRS0= fn(frac(N))=fn(0.80555)=0xEE
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #5,&TERMBRW
-            MOV.W   #0EE61h,&TERMMCTLW
+TERMBRW_INI     .equ 5
+TERMMCTLW_INI   .equ 0EE61h
 
         .CASE 230400
 ; Configure UART_TERM @ 230400 bauds / 10MHz
 ; Configure UART_TERM @ 460800 bauds / 20MHz
 ; N=20000000/460800=43.402777... ==> UCOS16=1, UCBR0=int(N/16)=2, UCBRF0=int(frac(N/16)*16)=0Bh, UCBRS0= fn(frac(N))=fn(0.4027)=0x92
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #2,     &TERMBRW
-            MOV.W   #92B1h,&TERMMCTLW
+TERMBRW_INI     .equ 2
+TERMMCTLW_INI   .equ 92B1h
 
         .CASE 250000  ; DMX interface
 ; Configure UART_TERM @ 250000 bauds / 10MHz
 ; Configure UART_TERM @ 500000 bauds / 20MHz
 ; N = 20000000/500000 = 40 ==> {UCOS16=1, UCBR0=int(N/16)=2, UCBRF0=int(frac(N/16)*16)=8  UCBRS0=fn(frac(N))=fn(0.00000)=0x00
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #2,  &TERMBRW
-            MOV.W   #0081h,&TERMMCTLW
+TERMBRW_INI     .equ 2
+TERMMCTLW_INI   .equ 0081h
 
         .CASE 460800
 ; Configure UART_TERM @ 460800 bauds / 10MHz
 ; Configure UART_TERM @ 921600 bauds / 20MHz
 ; N = 20000000/921600 = 21.701388... ==> {UCOS16=1, UCBR0=int(N/16)=1, UCBRF0=int(frac(N/16)*16)=5  UCBRS0=fn(frac(N))=fn(0.70138)=0xB7
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #1,     &TERMBRW
-            MOV.W   #0B751h,&TERMMCTLW
+TERMBRW_INI     .equ 1
+TERMMCTLW_INI   .equ 0B751h
 
         .CASE 500000 ; CP2102 baudrate
 ; Configure UART_TERM @ 500000 bauds / 10MHz
 ; Configure UART_TERM @ 1000000 bauds / 20MHz
 ; N = 20000000/1000000 = 20 ==> {UCOS16=1, UCBR0=int(N/16)=1, UCBRF0=int(frac(N/16)*16)=4,  UCBRS0=fn(frac(N))=fn(0.000)=0x00
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #1,     &TERMBRW
-            MOV.W   #0041h,&TERMMCTLW
+TERMBRW_INI     .equ 1
+TERMMCTLW_INI   .equ 0041h
 
         .CASE 614400
 ; Configure UART_TERM @ 614400 bauds / 10MHz
 ; Configure UART_TERM @ 1228800 bauds / 20MHz
 ; N = 20000000/1228800 = 16.276... ==> {UCOS16=1, UCBR0=int(N/16)=1, UCBRF0=int(frac(N/16)*16)=0,  UCBRS0=fn(frac(N))=fn(0.276)=0x44
-            MOV     #1,     &TERMBRW
-            MOV.W   #04411h,&TERMMCTLW
+TERMBRW_INI     .equ 1
+TERMMCTLW_INI   .equ 04411h
 
         .CASE 921600
 ; Configure UART_TERM @ 921600 bauds / 10MHz
 ; Configure UART_TERM @ 1843200 bauds / 20MHz
 ; N = 20000000/1843200 = 10.85069...  {UCOS16=0, UCBR0=int(N)=10, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.85069)=0xDF
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #10,    &TERMBRW
-             MOV.W   #0DF00h,&TERMMCTLW
+TERMBRW_INI     .equ 10
+TERMMCTLW_INI   .equ 0DF00h
 
         .CASE 1000000
 ; Configure UART_TERM @ 1000000 bauds / 10MHz
 ; N = 10000000/1000000 = 10 ==> {UCOS16=0, UCBR0=int(N)=10, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.0)=0x00
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #10,     &TERMBRW
-            MOV.W   #0,&TERMMCTLW
+TERMBRW_INI     .equ 10
+TERMMCTLW_INI   .equ 0
 
         .CASE 1228800
 ; Configure UART_TERM @ 1228800 bauds / 10MHz
 ; N = 10000000/1228800 = 8.138.. ==> {UCOS16=0, UCBR0=int(N)=8, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.138)=0x10
-            MOV     #8,     &TERMBRW
-            MOV.W   #01000h,&TERMMCTLW
+TERMBRW_INI     .equ 8
+TERMMCTLW_INI   .equ 01000h
 
         .CASE 1382400
 ; Configure UART_TERM @ 1382400 bauds / 10MHz
 ; N = 10000000/1382400 = 7.2338.. ==> {UCOS16=0, UCBR0=int(N)=7, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.2338)=0x22
-            MOV     #7,     &TERMBRW
-            MOV.W   #02200h,&TERMMCTLW
+TERMBRW_INI     .equ 7
+TERMMCTLW_INI   .equ 02200h
 
         .CASE 1843200
 ; Configure UART_TERM @ 1843200 bauds / 10MHz
 ; N = 10000000/1843200 = 5.4253...  {UCOS16=0, UCBR0=int(N)=5, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.4253)=0x92
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #5,    &TERMBRW
-             MOV.W   #09200h,&TERMMCTLW
+TERMBRW_INI     .equ 5
+TERMMCTLW_INI   .equ 09200h
 
         .CASE 2457600 ; PL2303TA baudrate
 ; Configure UART_TERM @ 2457600 bauds / 10MHz
 ; N = 10000000/2457600 = 4.069010... ==> {UCOS16=0, UCBR0=int(N)=4, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.06901)=0x01
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #4,     &TERMBRW
-             MOV.W   #00100h,&TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 00100h
 
         .CASE 3000000 ; PL2303TA baudrate
 ; Configure UART_TERM @ 3000000 bauds / 10MHz
 ; Configure UART_TERM @ 6000000 bauds / 20MHz
 ; N = 20000000/6000000 = 3.3333333 ==> {UCOS16=0, UCBR0=int(N)=3, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.33333)=0x49
-            MOV     #3,&TERMBRW
-             MOV.W   #04900h,&TERMMCTLW
+TERMBRW_INI     .equ 3
+TERMMCTLW_INI   .equ 04900h
 
         .ELSECASE
             .error "UART_TERM / 10 MHz : baudrate not implemented"
@@ -695,142 +695,142 @@
 ; Configure UART_TERM @ 19200 bauds / 24MHz
 ; N=12000000/19200=1250 ==> UCOS16=1, UCBR0=int(N/16)=78, UCBRF0=int(frac(N/16)*16)=2, UCBRS0= fn(frac(N))=fn(0)=0x00
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #78,    &TERMBRW
-            MOV     #0021h, &TERMMCTLW
+TERMBRW_INI     .equ 78
+TERMMCTLW_INI   .equ 0021h
 
         .CASE 19200
 ; Configure UART_TERM @ 19200 bauds / 12MHz
 ; Configure UART_TERM @ 38400 bauds / 24MHz
 ; N=24000000/19200=625 ==> UCOS16=1, UCBR0=int(N/16)=39, UCBRF0=int(frac(N/16)*16)=1, UCBRS0= fn(frac(N))=fn(0)=0x00
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #39,    &TERMBRW
-            MOV.W   #0011h,&TERMMCTLW
+TERMBRW_INI     .equ 39
+TERMMCTLW_INI   .equ 0011h
 
         .CASE 31250  ; MIDI interface
 ; Configure UART_TERM @ 31250 bauds / 8MHz
 ; N=12000000/31250=384 ==> UCOS16=1, UCBR0=int(N/16)=24, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0)=0
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #24,     &TERMBRW
-            MOV.W   #1,&TERMMCTLW
+TERMBRW_INI     .equ 24
+TERMMCTLW_INI   .equ 1
 
         .CASE 38400
 ; Configure UART_TERM @ 38400 bauds / 12MHz
 ; N=12000000/19200=312.5... ==> UCOS16=1, UCBR0=int(N/16)=19, UCBRF0=int(frac(N/16)*16)=8, UCBRS0= fn(frac(N))=fn(0.5)=0x55
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #19,    &TERMBRW
-            MOV.W   #05581h,&TERMMCTLW
+TERMBRW_INI     .equ 19
+TERMMCTLW_INI   .equ 05581h
 
         .CASE 57600
 ; Configure UART_TERM @ 57600 bauds / 12MHz
 ; Configure UART_TERM @ 115200 bauds / 24MHz
 ; N=24000000/115200=208.333... ==> UCOS16=1, UCBR0=int(N/16)=13, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0.333)=0x49
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #13,     &TERMBRW
-            MOV.W   #04901h,&TERMMCTLW
+TERMBRW_INI     .equ 13
+TERMMCTLW_INI   .equ 04901h
 
         .CASE 115200
 ; Configure UART_TERM @ 115200 bauds / 12MHz
 ; Configure UART_TERM @ 230400 bauds / 24MHz
 ; N=24000000/230400=104.1666... ==> UCOS16=1, UCBR0=int(N/16)=6, UCBRF0=int(frac(N/16)*16)=8, UCBRS0= fn(frac(N))=fn(0.1666)=0x20
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #6,     &TERMBRW
-            MOV.W   #2081h, &TERMMCTLW
+TERMBRW_INI     .equ 6
+TERMMCTLW_INI   .equ 2081h
 
         .CASE 230400
 ; Configure UART_TERM @ 230400 bauds / 12MHz
 ; Configure UART_TERM @ 460800 bauds / 24MHz
 ; N=24000000/460800=52.08333... ==> UCOS16=1, UCBR0=int(N/16)=3, UCBRF0=int(frac(N/16)*16)=4, UCBRS0= fn(frac(N))=fn(0.0833)=0x02
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #3,     &TERMBRW
-            MOV.W   #0241h,&TERMMCTLW
+TERMBRW_INI     .equ 3
+TERMMCTLW_INI   .equ 0241h
 
         .CASE 250000  ; DMX interface
 ; Configure UART_TERM @ 250000 bauds / 12MHz
 ; Configure UART_TERM @ 500000 bauds / 24MHz
 ; N = 24000000/500000 = 48 ==> {UCOS16=1, UCBR0=int(N/16)=3, UCBRF0=int(frac(N/16)*16)=0  UCBRS0=fn(frac(N))=fn(0.00000)=0x00
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-;            MOV     #3,  &TERMBRW
-;            MOV.W   #0001h,&TERMMCTLW
+;TERMBRW_INI     .equ 3
+;TERMMCTLW_INI   .equ 0001h
 
         .CASE 460800
 ; Configure UART_TERM @ 460800 bauds / 12MHz
 ; Configure UART_TERM @ 921600 bauds / 24MHz
 ; N = 24000000/921600 = 26.041666... ==> {UCOS16=1, UCBR0=int(N/16)=1, UCBRF0=int(frac(N/16)*16)=10  UCBRS0=fn(frac(N))=fn(0.0416)=0x00
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #1,     &TERMBRW
-            MOV.W   #00A1h,&TERMMCTLW
+TERMBRW_INI     .equ 1
+TERMMCTLW_INI   .equ 00A1h
 
         .CASE 500000 ; CP2102 baudrate
 ; Configure UART_ @ 500000 bauds / 12MHz
 ; Configure UART_ @ 1000000 bauds / 24MHz
 ; N = 24000000/1000000 = 24 ==> {UCOS16=1, UCBR0=int(N/16)=1, UCBRF0=int(frac(N/16)*16)=4,  UCBRS0=fn(frac(N))=fn(0.000)=0x00
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #1,     &TERMBRW
-            MOV.W   #0041h,&TERMMCTLW
+TERMBRW_INI     .equ 1
+TERMMCTLW_INI   .equ 0041h
 
         .CASE 614400
 ; Configure UART_TERM @ 614400 bauds / 12MHz
 ; Configure UART_TERM @ 1228800 bauds / 24MHz
 ; N = 24000000/1228800 = 19.531... ==> {UCOS16=1, UCBR0=int(N/16)=1, UCBRF0=int(frac(N/16)*16)=3,  UCBRS0=fn(frac(N))=fn(0.531)=0xAA
-            MOV     #1,     &TERMBRW
-            MOV.W   #0AA31h,&TERMMCTLW
+TERMBRW_INI     .equ 1
+TERMMCTLW_INI   .equ 0AA31h
 
         .CASE 921600
 ; Configure UART_TERM @ 921600 bauds / 12MHz
 ; Configure UART_TERM @ 1843200 bauds / 24MHz
 ; N = 24000000/1843200 = 13.08203...  {UCOS16=0, UCBR0=int(N)=13, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.08203)=0x02
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #17,    &TERMBRW
-            MOV.W   #04A00h,&TERMMCTLW
+TERMBRW_INI     .equ 17
+TERMMCTLW_INI   .equ 04A00h
 
         .CASE 1000000
 ; Configure UART_TERM @ 1000000 bauds / 12MHz
 ; N = 12000000/1000000 = 12 ==> {UCOS16=0, UCBR0=int(N)=12, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.00000)=0x00
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #12,    &TERMBRW
-            MOV.W   #0,&TERMMCTLW
+TERMBRW_INI     .equ 12
+TERMMCTLW_INI   .equ 0
 
         .CASE 1228800 ; PL2303TA baudrate
 ; Configure UART_TERM @ 1228800 bauds / 12MHz
 ; Configure UART_TERM @ 2457600 bauds / 24MHz
 ; N = 24000000/2457600 = 9.765625... ==> {UCOS16=0, UCBR0=int(N)=9, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.765625)=0xDD
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #9,     &TERMBRW
-             MOV.W   #0dd00h,&TERMMCTLW
+TERMBRW_INI     .equ 9
+TERMMCTLW_INI   .equ 0dd00h
 
         .CASE 1382400 ; CP2102 baudrate (with programming)
 ; Configure UART_TERM @ 1382400 bauds / 12MHz
 ; N = 12000000/1382400 = 8.68055... ==> {UCOS16=0, UCBR0=int(N)=8, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.68055)=0x6B
-            MOV     #8,    &TERMBRW
-            MOV.W   #06B00h,&TERMMCTLW
+TERMBRW_INI     .equ 8
+TERMMCTLW_INI   .equ 06B00h
 
         .CASE 1843200 ; CP2102 baudrate (with programming)
 ; Configure UART_TERM @ 1843200 bauds / 12MHz
 ; N = 12000000/1843200 = 6.510416... ==> {UCOS16=0, UCBR0=int(N)=6, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.5104)=0xaa
-            MOV     #6,    &TERMBRW
-            MOV.W   #0AA00h,&TERMMCTLW
+TERMBRW_INI     .equ 6
+TERMMCTLW_INI   .equ 0AA00h
 
         .CASE 2000000
 ; Configure UART_TERM @ 2000000 bauds / 12MHz
 ; Configure UART_TERM @ 4000000 bauds / 24MHz
 ; N = 24000000/4000000 = 6... ==> {UCOS16=0, UCBR0=int(N)=6, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.0000000)=0
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #6,&TERMBRW
-             MOV.W   #0,&TERMMCTLW
+TERMBRW_INI     .equ 6
+TERMMCTLW_INI   .equ 0
 
         .CASE 2457600 ; PL2303TA baudrate
 ; Configure UART_TERM @ 1228800 bauds / 12MHz
 ; N = 12000000/2457600 = 4.8828... ==> {UCOS16=0, UCBR0=int(N)=4, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.8828)=0xF7
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #4,     &TERMBRW
-             MOV.W   #0F700h,&TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 0F700h
 
         .CASE 3000000 ; PL2303TA baudrate
 ; Configure UART_TERM @ 3000000 bauds / 12MHz
 ; Configure UART_TERM @ 6000000 bauds / 24MHz
 ; N = 24000000/6000000 = 4 ==> {UCOS16=0, UCBR0=int(N)=4, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.00000)=0x00
-             MOV     #4,     &TERMBRW
-             MOV.W   #0,&TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 0
 
         .ELSECASE
             .error "UART_TERM / 12 MHz : baudrate not implemented"
@@ -846,157 +846,157 @@
 ; Configure UART_TERM @ 9600 bauds / 16MHz
 ; N=16000000/9600=1666.666... ==> UCOS16=1, UCBR0=int(N/16)=104, UCBRF0=int(frac(N/16)*16)=2, UCBRS0= fn(frac(N))=fn(0.66666)=0xD6
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #104,    &TERMBRW
-            MOV     #0D621h, &TERMMCTLW
+TERMBRW_INI     .equ 104
+TERMMCTLW_INI   .equ 0D621h
 
         .CASE 19200
 ; Configure UART_TERM @ 19200 bauds / 16MHz
 ; N=16000000/19200=833.333... ==> UCOS16=1, UCBR0=int(N/16)=52, UCBRF0=int(frac(N/16)*16)=1, UCBRS0= fn(frac(N))=fn(0.33333)=0x49
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #52,    &TERMBRW
-            MOV     #4911h, &TERMMCTLW
+TERMBRW_INI     .equ 52
+TERMMCTLW_INI   .equ 4911h
 
         .CASE 31250  ; MIDI interface
 ; Configure UART_TERM @ 31250 bauds / 16MHz
 ; N=16000000/31250=512 ==> UCOS16=1, UCBR0=int(N/16)=32, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0)=0
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #32,     &TERMBRW
-            MOV.W   #0001h,&TERMMCTLW
+TERMBRW_INI     .equ 32
+TERMMCTLW_INI   .equ 0001h
 
         .CASE 38400
 ; Configure UART_TERM @ 38400 bauds / 16MHz
 ; N=16000000/19200=416.666... ==> UCOS16=1, UCBR0=int(N/16)=26, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0.66666)=0xD6
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #26,    &TERMBRW
-            MOV.W   #0D601h,&TERMMCTLW
+TERMBRW_INI     .equ 26
+TERMMCTLW_INI   .equ 0D601h
 
         .CASE 57600
 ; Configure UART_TERM @ 57600 bauds / 16MHz
 ; N=16000000/57600=277.777... ==> UCOS16=1, UCBR0=int(N/16)=17, UCBRF0=int(frac(N/16)*16)=5, UCBRS0= fn(frac(N))=fn(0.77777)=0xDD
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #17,     &TERMBRW
-            MOV.W   #0DD51h,&TERMMCTLW
+TERMBRW_INI     .equ 17
+TERMMCTLW_INI   .equ 0DD51h
 
         .CASE 115200
 ; Configure UART_TERM @ 115200 bauds / 16MHz
 ; N=16000000/115200=138.888... ==> UCOS16=1, UCBR0=int(N/16)=8, UCBRF0=int(frac(N/16)*16)=10, UCBRS0= fn(frac(N))=fn(0.88888)=0xF7
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #8,     &TERMBRW
-            MOV.W   #0F7A1h,&TERMMCTLW
+TERMBRW_INI     .equ 8
+TERMMCTLW_INI   .equ 0F7A1h
 
         .CASE 230400
 ; Configure UART_TERM @ 230400 bauds / 16MHz
 ; N=16000000/230400=69.444... ==> UCOS16=1, UCBR0=int(N/16)=4, UCBRF0=int(frac(N/16)*16)=5, UCBRS0= fn(frac(N))=fn(0.44444)=0x55
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #4,     &TERMBRW
-            MOV.W   #5551h, &TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 5551h
 
         .CASE 250000  ; DMX interface
 ; Configure UART_TERM @ 250000 bauds / 16MHz
 ; N=16000000/250000=64 ==> UCOS16=1, UCBR0=int(N/16)=4, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0)=0
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #4,     &TERMBRW
-            MOV.W   #0001h, &TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 0001h
 
         .CASE 460800
 ; Configure UART_TERM @ 460800 bauds / 16MHz
 ; N=16000000/460800=34.7222... ==> UCOS16=1, UCBR0=int(N/16)=2, UCBRF0=int(frac(N/16)*16)=2, UCBRS0= fn(frac(N))=fn(0.72222)=0xBB
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #2,     &TERMBRW
-            MOV.W   #0BB21h,&TERMMCTLW
+TERMBRW_INI     .equ 2
+TERMMCTLW_INI   .equ 0BB21h
 
         .CASE 500000 ; CP2102 baudrate
 ; Configure UART_TERM @ 500000 bauds / 16MHz
 ; N = 16000000/500000 = 32 ==> {UCOS16=1, UCBR0=int(N/16)=2, UCBRF1=int(frac(N/16)*16)=0  UCBRS0=fn(frac(N))=fn(0.00000)=0x00
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-;            MOV     #2,  &TERMBRW
-;            MOV.W   #00001h,&TERMMCTLW
+;TERMBRW_INI     .equ 2
+;TERMMCTLW_INI   .equ 00001h
 
         .CASE 921600
 ;; Configure UART_TERM @ 921600 bauds / 16MHz
 ; N = 1600000/921600 = 17.3611... ==> {UCOS16=0, UCBR0=int(N)=14, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.3611)=0x4A
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #17,    &TERMBRW
-            MOV.W   #04A00h,&TERMMCTLW
+TERMBRW_INI     .equ 17
+TERMMCTLW_INI   .equ 04A00h
 ; Configure UART_TERM @ 921600 bauds / 16MHz
 ; N = 16000000/921600 = 17.3611 ==> {UCOS16=1, UCBR0=int(N/16)=1, UCBRF0=int(frac(N/16)*16)=1  UCBRS0=fn(frac(N))=fn(0.3611)=0x4A
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-;            MOV     #1,    &TERMBRW
-;            MOV.W   #04A11h,&TERMMCTLW
+;TERMBRW_INI     .equ 1
+;TERMMCTLW_INI   .equ 04A11h
 
         .CASE 1000000
 ; Configure UART_TERM @ 1000000 bauds / 16MHz
 ; N = 16000000/1000000 = 16 ==> {UCOS16=1, UCBR0=int(N/16)=1, UCBRF0=0  UCBRS0=fn(frac(N))=fn(0.00000)=0x00
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #1,    &TERMBRW
-            MOV.W   #00001h,&TERMMCTLW
+TERMBRW_INI     .equ 1
+TERMMCTLW_INI   .equ 00001h
 
         .CASE 1228800 ; PL2303TA baudrate
 ; Configure UART_TERM @ 1228800 bauds / 16MHz
 ; Configure UART_TERM @ 614400 bauds / 8MHz
 ; N = 8000000/614400 = 13.02083... ==> {UCOS16=0, UCBR0=int(N)=13, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.02083)=0x02
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #13,     &TERMBRW
-             MOV.W   #00200h,&TERMMCTLW
+TERMBRW_INI     .equ 13
+TERMMCTLW_INI   .equ 00200h
 
         .CASE 1382400 ; CP2102 baudrate (with programming)
 ; Configure UART_TERM @ 1382400 bauds / 16MHz
 ; N = 16000000/1382400 = 11.574074... ==> {UCOS16=0, UCBR0=int(N)=11, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.68055)=0x6B
-            MOV     #11,    &TERMBRW
-            MOV.W   #06B00h,&TERMMCTLW
+TERMBRW_INI     .equ 11
+TERMMCTLW_INI   .equ 06B00h
 
         .CASE 1843200 ; CP2102 baudrate (with programming)
 ; Configure UART_TERM @ 1843200 bauds / 16MHz
 ; N = 16000000/1843200 = 8.680555... ==> {UCOS16=0, UCBR1=int(N)=8, UCBRF1=dont_care=0  UCBRS1=fn(frac(N))=fn(0.68055)=0xD6
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #8,     &TERMBRW
-             MOV.W   #0D600h,&TERMMCTLW
+TERMBRW_INI     .equ 8
+TERMMCTLW_INI   .equ 0D600h
 
         .CASE 2000000
 ; Configure UART_TERM @ 2000000 bauds / 16MHz
 ; N = 16000000/2000000 = 8 ==> {UCOS16=0, UCBR0=int(N)=8, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.00000)=0x00
-            MOV     #8 ,    &TERMBRW
-            MOV.W   #00000h,&TERMMCTLW
+TERMBRW_INI     .equ 8 
+TERMMCTLW_INI   .equ 00000h
 
         .CASE 2457600 ; PL2303TA baudrate
 ; Configure UART_TERM @ 1228800 bauds / 8MHz
 ; N = 8000000/1228800 = 6.510416... ==> {UCOS16=0, UCBR0=int(N)=6, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.510416)=0xAA
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #6,     &TERMBRW
-             MOV.W   #0AA00h,&TERMMCTLW
+TERMBRW_INI     .equ 6
+TERMMCTLW_INI   .equ 0AA00h
 
         .CASE 2764800
 ; Configure UART_TERM @ 2764800 bauds / 16MHz
 ; N = 16000000/2764800 = 5.787037... ==> {UCOS16=0, UCBR0=int(N)=5, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.787037)=0xED
-            MOV     #5,    &TERMBRW
-            MOV.W   #0DD00h,&TERMMCTLW
+TERMBRW_INI     .equ 5
+TERMMCTLW_INI   .equ 0DD00h
 
         .CASE 3000000 ; PL2303TA baudrate
 ; Configure UART_TERM @ 3000000 bauds / 16MHz
 ; N = 16000000/3000000 = 5.333333... ==> {UCOS16=0, UCBR0=int(N)=5, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.333333)=0x49
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #5,     &TERMBRW
-             MOV.W   #04900h,&TERMMCTLW
+TERMBRW_INI     .equ 5
+TERMMCTLW_INI   .equ 04900h
 
         .CASE 4000000 ; PL203HXD baudrate
 ; Configure UART_TERM @ 4000000 bauds / 16MHz
 ; N = 16000000/4000000 = 4... ==> {UCOS16=0, UCBR0=int(N)=0, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.0000000)=0
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #4,&TERMBRW
-             MOV.W   #0,&TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 0
 
         .CASE 5000000 ; PL203HXD baudrate
 ; Configure UART_TERM @ 5000000 bauds / 16MHz
 ; N = 16000000/5000000 = 3.2... ==> {UCOS16=0, UCBR0=int(N)=0, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.2)=0x11
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #3,&TERMBRW
-             MOV.W   #02100h,&TERMMCTLW
+TERMBRW_INI     .equ 3
+TERMMCTLW_INI   .equ 02100h
 
         .CASE 6000000 ; PL2303TA baudrate
 ; Configure UART_TERM @ 6000000 bauds / 24MHz
 ; N = 16000000/6000000 = 2.6666.. ==> {UCOS16=0, UCBR0=int(N)=2, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.6666)=0xB6
-            MOV     #2,&TERMBRW
-            MOV.W   #0B600h,&TERMMCTLW
+TERMBRW_INI     .equ 2
+TERMMCTLW_INI   .equ 0B600h
 
         .ELSECASE
             .error "UART_TERM / 16 MHz : baudrate not implemented"
@@ -1008,137 +1008,137 @@
 ; Configure UART_TERM @ 9600 bauds / 20MHz
 ; N=20000000/9600=2083.3333 ==> UCOS16=1, UCBR0=int(N/16)=130, UCBRF0=int(frac(N/16)*16)=3, UCBRS0= fn(frac(N))=(fn(.3333))=0x25
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #130,&TERMBRW
-            MOV     #2531h,&TERMMCTLW
+TERMBRW_INI     .equ 130
+TERMMCTLW_INI   .equ 2531h
 
         .CASE 19200
 ; Configure UART_TERM @ 19200 bauds / 20MHz
 ; N=20000000/19200=1041.66666 ==> UCOS16=1, UCBR0=int(N/16)=65, UCBRF0=int(frac(N/16)*16)=1, UCBRS0= fn(frac(N))=fn(0.66666)=0xd6
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #65,&TERMBRW
-            MOV     #0D611h,&TERMMCTLW
+TERMBRW_INI     .equ 65
+TERMMCTLW_INI   .equ 0D611h
 
         .CASE 31250  ; MIDI interface
 ; Configure UART_TERM @ 31250 bauds / 20MHz
 ; N=20000000/31250=640 ==> UCOS16=1, UCBR0=int(N/16)=40, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0)=0
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #40,&TERMBRW
-            MOV.W   #0001h,&TERMMCTLW
+TERMBRW_INI     .equ 40
+TERMMCTLW_INI   .equ 0001h
 
         .CASE 38400
 ; Configure UART_TERM @ 38400 bauds / 20MHz
 ; N=20000000/38400=520.833333 ==> UCOS16=1, UCBR0=int(N/16)=32, UCBRF0=int(frac(N/16)*16)=8, UCBRS0= fn(frac(N))=fn(0)=0xBF
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #32,&TERMBRW
-            MOV.W   #0BF01h,&TERMMCTLW
+TERMBRW_INI     .equ 32
+TERMMCTLW_INI   .equ 0BF01h
 
         .CASE 57600
 ; Configure UART_TERM @ 57600 bauds / 20MHz
 ; N=20000000/57600=346.0207... ==> UCOS16=1, UCBR0=int(N/16)=21, UCBRF0=int(frac(N/16)*16)=0Ah, UCBRS0= fn(frac(N))=fn(0.0207)=0x00
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #21,&TERMBRW
-            MOV.W   #000A1h,&TERMMCTLW
+TERMBRW_INI     .equ 21
+TERMMCTLW_INI   .equ 000A1h
 
         .CASE 115200
 ; Configure UART_TERM @ 115200 bauds / 20MHz
 ; N=20000000/115200=173.61111... ==> UCOS16=1, UCBR0=int(N/16)=10, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0.6111)=0xAD
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #10,&TERMBRW
-            MOV.W   #0AD01h,&TERMMCTLW
+TERMBRW_INI     .equ 10
+TERMMCTLW_INI   .equ 0AD01h
 
         .CASE 230400
 ; Configure UART_TERM @ 230400 bauds / 20MHz
 ; N=20000000/230400=86.80555... ==> UCOS16=1, UCBR0=int(N/16)=5, UCBRF0=int(frac(N/16)*16)=6, UCBRS0= fn(frac(N))=fn(0.80555)=0xEE
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #5,&TERMBRW
-            MOV.W   #0EE61h,&TERMMCTLW
+TERMBRW_INI     .equ 5
+TERMMCTLW_INI   .equ 0EE61h
 
         .CASE 250000  ; DMX interface
 ; Configure UART_TERM @ 250000 bauds / 20MHz
 ; N=20000000/250000=80 ==> UCOS16=1, UCBR0=int(N/16)=5, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0)=0
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #5,     &TERMBRW
-            MOV.W   #0001h, &TERMMCTLW
+TERMBRW_INI     .equ 5
+TERMMCTLW_INI   .equ 0001h
 
         .CASE 460800
 ; Configure UART_TERM @ 460800 bauds / 20MHz
 ; N=20000000/460800=43.402777... ==> UCOS16=1, UCBR0=int(N/16)=2, UCBRF0=int(frac(N/16)*16)=0Bh, UCBRS0= fn(frac(N))=fn(0.4027)=0x92
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #2,     &TERMBRW
-            MOV.W   #92B1h,&TERMMCTLW
+TERMBRW_INI     .equ 2
+TERMMCTLW_INI   .equ 92B1h
 
         .CASE 500000 ; CP2102 baudrate
 ; Configure UART_TERM @ 500000 bauds / 20MHz
 ; N = 20000000/500000 = 40 ==> {UCOS16=1, UCBR0=int(N/16)=2, UCBRF0=int(frac(N/16)*16)=8  UCBRS0=fn(frac(N))=fn(0.00000)=0x00
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #2,  &TERMBRW
-            MOV.W   #0081h,&TERMMCTLW
+TERMBRW_INI     .equ 2
+TERMMCTLW_INI   .equ 0081h
 
         .CASE 921600
 ; Configure UART_TERM @ 921600 bauds / 20MHz
 ; N = 20000000/921600 = 21.701388... ==> {UCOS16=1, UCBR0=int(N/16)=1, UCBRF0=int(frac(N/16)*16)=5  UCBRS0=fn(frac(N))=fn(0.70138)=0xB7
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #1,     &TERMBRW
-            MOV.W   #0B751h,&TERMMCTLW
+TERMBRW_INI     .equ 1
+TERMMCTLW_INI   .equ 0B751h
 
         .CASE 1000000
 ; Configure UART_TERM @ 1000000 bauds / 20MHz
 ; N = 20000000/1000000 = 20 ==> {UCOS16=1, UCBR0=int(N/16)=1, UCBRF0=int(frac(N/16)*16)=4,  UCBRS0=fn(frac(N))=fn(0.000)=0x00
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #1,     &TERMBRW
-            MOV.W   #0041h,&TERMMCTLW
+TERMBRW_INI     .equ 1
+TERMMCTLW_INI   .equ 0041h
 
         .CASE 1228800
 ; Configure UART_TERM @ 1228800 bauds / 20MHz
 ; N = 20000000/1228800 = 16.276... ==> {UCOS16=1, UCBR0=int(N/16)=1, UCBRF0=int(frac(N/16)*16)=0,  UCBRS0=fn(frac(N))=fn(0.276)=0x44
-            MOV     #1,     &TERMBRW
-            MOV.W   #04411h,&TERMMCTLW
+TERMBRW_INI     .equ 1
+TERMMCTLW_INI   .equ 04411h
 
         .CASE 1382400
 ; Configure UART_TERM @ 1382400 bauds / 20MHz
 ; N = 20000000/1382400 = 14.46759... ==> {UCOS16=0, UCBR0=int(N)=14, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.46759)=0x55
-            MOV     #14,     &TERMBRW
-            MOV.W   #05500h,&TERMMCTLW
+TERMBRW_INI     .equ 14
+TERMMCTLW_INI   .equ 05500h
 
         .CASE 1843200
 ; Configure UART_TERM @ 1843200 bauds / 20MHz
 ; N = 20000000/1843200 = 10.85069...  {UCOS16=0, UCBR0=int(N)=10, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.85069)=0xDF
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #10,    &TERMBRW
-             MOV.W   #0DF00h,&TERMMCTLW
+TERMBRW_INI     .equ 10
+TERMMCTLW_INI   .equ 0DF00h
 
         .CASE 2457600 ; PL2303TA baudrate
 ; Configure UART_TERM @ 2457600 bauds / 20MHz
 ; N = 20000000/2457600 = 8.13802... ==> {UCOS16=0, UCBR0=int(N)=8, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.13802)=0x11
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #8,     &TERMBRW
-             MOV.W   #01100h,&TERMMCTLW
+TERMBRW_INI     .equ 8
+TERMMCTLW_INI   .equ 01100h
 
         .CASE 3000000 ; PL2303TA baudrate
 ; Configure UART_TERM @ 3000000 bauds / 20MHz
 ; N = 20000000/3000000 = 6.666666 ==> {UCOS16=0, UCBR0=int(N)=6, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.66666)=0xD6
-            MOV     #6,&TERMBRW
-             MOV.W   #0D600h,&TERMMCTLW
+TERMBRW_INI     .equ 6
+TERMMCTLW_INI   .equ 0D600h
 
         .CASE 4000000 ; PL2303HXD baudrate
 ; Configure UART_TERM @ 4000000 bauds / 20MHz
 ; N = 20000000/4000000 = 5... ==> {UCOS16=0, UCBR0=int(N)=5, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.0000000)=0
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #5,&TERMBRW
-             MOV.W   #0,&TERMMCTLW
+TERMBRW_INI     .equ 5
+TERMMCTLW_INI   .equ 0
 
         .CASE 5000000 ; PL203HXD baudrate
 ; Configure UART_TERM @ 5000000 bauds / 20MHz
 ; N = 20000000/5000000 = 4... ==> {UCOS16=0, UCBR0=int(N)=4, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.00)=0x00
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #4,&TERMBRW
-             MOV.W   #0,&TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 0
 
         .CASE 6000000 ; PL2303TA baudrate
 ; Configure UART_TERM @ 6000000 bauds / 20MHz
 ; N = 20000000/6000000 = 3.3333333 ==> {UCOS16=0, UCBR0=int(N)=3, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.33333)=0x49
-            MOV     #3,&TERMBRW
-             MOV.W   #04900h,&TERMMCTLW
+TERMBRW_INI     .equ 3
+TERMMCTLW_INI   .equ 04900h
 
         .ELSECASE
             .error "UART_TERM / 20 MHz : baudrate not implemented"
@@ -1150,137 +1150,137 @@
 ; Configure UART_TERM @ 9600 bauds / 24MHz
 ; N=24000000/9600=2500 ==> UCOS16=1, UCBR0=int(N/16)=156, UCBRF0=int(frac(N/16)*16)=4, UCBRS0= fn(frac(N))=(fn(0))=0x00
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #156,    &TERMBRW
-            MOV     #0041h, &TERMMCTLW
+TERMBRW_INI     .equ 156
+TERMMCTLW_INI   .equ 0041h
 
         .CASE 19200
 ; Configure UART_TERM @ 19200 bauds / 24MHz
 ; N=24000000/19200=1250 ==> UCOS16=1, UCBR0=int(N/16)=78, UCBRF0=int(frac(N/16)*16)=2, UCBRS0= fn(frac(N))=fn(0)=0x00
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #78,    &TERMBRW
-            MOV     #0021h, &TERMMCTLW
+TERMBRW_INI     .equ 78
+TERMMCTLW_INI   .equ 0021h
 
         .CASE 31250  ; MIDI interface
 ; Configure UART_TERM @ 31250 bauds / 8MHz
 ; N=24000000/31250=768 ==> UCOS16=1, UCBR0=int(N/16)=48, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0)=0
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #48,     &TERMBRW
-            MOV.W   #0001h,&TERMMCTLW
+TERMBRW_INI     .equ 48
+TERMMCTLW_INI   .equ 0001h
 
         .CASE 38400
 ; Configure UART_TERM @ 38400 bauds / 24MHz
 ; N=24000000/19200=625 ==> UCOS16=1, UCBR0=int(N/16)=39, UCBRF0=int(frac(N/16)*16)=1, UCBRS0= fn(frac(N))=fn(0)=0x00
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #39,    &TERMBRW
-            MOV.W   #0011h,&TERMMCTLW
+TERMBRW_INI     .equ 39
+TERMMCTLW_INI   .equ 0011h
 
         .CASE 57600
 ; Configure UART_TERM @ 57600 bauds / 24MHz
 ; N=24000000/57600=416.666... ==> UCOS16=1, UCBR0=int(N/16)=26, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0.666)=0xD6
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #26,     &TERMBRW
-            MOV.W   #0D601h,&TERMMCTLW
+TERMBRW_INI     .equ 26
+TERMMCTLW_INI   .equ 0D601h
 
         .CASE 115200
 ; Configure UART_TERM @ 115200 bauds / 24MHz
 ; N=24000000/115200=208.333... ==> UCOS16=1, UCBR0=int(N/16)=13, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0.333)=0x49
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #13,     &TERMBRW
-            MOV.W   #04901h,&TERMMCTLW
+TERMBRW_INI     .equ 13
+TERMMCTLW_INI   .equ 04901h
 
         .CASE 230400
 ; Configure UART_TERM @ 230400 bauds / 24MHz
 ; N=24000000/230400=104.1666... ==> UCOS16=1, UCBR0=int(N/16)=6, UCBRF0=int(frac(N/16)*16)=8, UCBRS0= fn(frac(N))=fn(0.1666)=0x20
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #6,     &TERMBRW
-            MOV.W   #2081h, &TERMMCTLW
+TERMBRW_INI     .equ 6
+TERMMCTLW_INI   .equ 2081h
 
         .CASE 250000  ; DMX interface
 ; Configure UART_TERM @ 250000 bauds / 24MHz
 ; N=24000000/250000=96 ==> UCOS16=1, UCBR0=int(N/16)=6, UCBRF0=int(frac(N/16)*16)=0, UCBRS0= fn(frac(N))=fn(0)=0
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #6,     &TERMBRW
-            MOV.W   #0001h, &TERMMCTLW
+TERMBRW_INI     .equ 6
+TERMMCTLW_INI   .equ 0001h
 
         .CASE 460800
 ; Configure UART_TERM @ 460800 bauds / 24MHz
 ; N=24000000/460800=52.08333... ==> UCOS16=1, UCBR0=int(N/16)=3, UCBRF0=int(frac(N/16)*16)=4, UCBRS0= fn(frac(N))=fn(0.0833)=0x02
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #3,     &TERMBRW
-            MOV.W   #0241h,&TERMMCTLW
+TERMBRW_INI     .equ 3
+TERMMCTLW_INI   .equ 0241h
 
         .CASE 500000 ; CP2102 baudrate
 ; Configure UART_TERM @ 500000 bauds / 24MHz
 ; N = 24000000/500000 = 48 ==> {UCOS16=1, UCBR0=int(N/16)=3, UCBRF0=int(frac(N/16)*16)=0  UCBRS0=fn(frac(N))=fn(0.00000)=0x00
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-;            MOV     #3,  &TERMBRW
-;            MOV.W   #0001h,&TERMMCTLW
+;TERMBRW_INI     .equ 3
+;TERMMCTLW_INI   .equ 0001h
 
         .CASE 921600
 ; Configure UART_TERM @ 921600 bauds / 24MHz
 ; N = 24000000/921600 = 26.041666... ==> {UCOS16=1, UCBR0=int(N/16)=1, UCBRF0=int(frac(N/16)*16)=10  UCBRS0=fn(frac(N))=fn(0.0416)=0x00
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #1,     &TERMBRW
-            MOV.W   #00A1h,&TERMMCTLW
+TERMBRW_INI     .equ 1
+TERMMCTLW_INI   .equ 00A1h
 
         .CASE 1000000
 ; Configure UART_TERM @ 1000000 bauds / 24MHz
 ; N = 24000000/1000000 = 24 ==> {UCOS16=1, UCBR0=int(N/16)=1, UCBRF0=int(frac(N/16)*16)=4,  UCBRS0=fn(frac(N))=fn(0.000)=0x00
 ; TERMBRW=UCBR1, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-            MOV     #1,     &TERMBRW
-            MOV.W   #0041h,&TERMMCTLW
+TERMBRW_INI     .equ 1
+TERMMCTLW_INI   .equ 0041h
 
         .CASE 1228800
 ; Configure UART_TERM @ 1228800 bauds / 24MHz
 ; N = 24000000/1228800 = 19.531... ==> {UCOS16=1, UCBR0=int(N/16)=1, UCBRF0=int(frac(N/16)*16)=3,  UCBRS0=fn(frac(N))=fn(0.531)=0xAA
-            MOV     #1,     &TERMBRW
-            MOV.W   #0AA31h,&TERMMCTLW
+TERMBRW_INI     .equ 1
+TERMMCTLW_INI   .equ 0AA31h
 
         .CASE 1382400
 ; Configure UART_TERM @ 1382400 bauds / 24MHz
 ; N = 24000000/1382400 = 17.36111... ==> {UCOS16=1, UCBR0=int(N/16)=1, UCBRF0=int(frac(N/16)*16)=1,  UCBRS0=fn(frac(N))=fn(0.3611)=0x4A
-            MOV     #1,     &TERMBRW
-            MOV.W   #04A11h,&TERMMCTLW
+TERMBRW_INI     .equ 1
+TERMMCTLW_INI   .equ 04A11h
 
         .CASE 1843200
 ; Configure UART_TERM @ 1843200 bauds / 24MHz
 ; N = 24000000/1843200 = 13.08203...  {UCOS16=0, UCBR0=int(N)=13, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.08203)=0x02
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #13,    &TERMBRW
-             MOV.W   #0200h,&TERMMCTLW
+TERMBRW_INI     .equ 13
+TERMMCTLW_INI   .equ 0200h
 
         .CASE 2457600 ; PL2303TA baudrate
 ; Configure UART_TERM @ 2457600 bauds / 24MHz
 ; N = 24000000/2457600 = 9.765625... ==> {UCOS16=0, UCBR0=int(N)=9, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.765625)=0xDD
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #9,     &TERMBRW
-             MOV.W   #0DD00h,&TERMMCTLW
+TERMBRW_INI     .equ 9
+TERMMCTLW_INI   .equ 0DD00h
 
         .CASE 3000000 ; PL2303TA baudrate
 ; Configure UART_TERM @ 3000000 bauds / 24MHz
 ; N = 24000000/3000000 = 8 ==> {UCOS16=0, UCBR0=int(N)=8, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.00000)=0x00
-            MOV     #8,&TERMBRW
-            MOV.W   #0,&TERMMCTLW
+TERMBRW_INI     .equ 8
+TERMMCTLW_INI   .equ 0
 
         .CASE 4000000 ; PL2303HXD baudrate
 ; Configure UART_TERM @ 4000000 bauds / 24MHz
 ; N = 24000000/4000000 = 6... ==> {UCOS16=0, UCBR0=int(N)=0, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.0000000)=0
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #6,&TERMBRW
-             MOV.W   #0,&TERMMCTLW
+TERMBRW_INI     .equ 6
+TERMMCTLW_INI   .equ 0
 
         .CASE 5000000 ; PL203HXD baudrate
 ; Configure UART_TERM @ 5000000 bauds / 24MHz
 ; N = 24000000/5000000 = 4.8... ==> {UCOS16=0, UCBR0=int(N)=0, UCBRF0=dont_care=0, UCBRS0=fn(frac(N))=fn(0.2)=0x11
 ; TERMBRW=UCBR0, TERMMCTLW= (UCBRS0<<8)|(UCBRF0<<4)|UCOS16
-             MOV     #4,&TERMBRW
-             MOV.W   #0EE00h,&TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 0EE00h
 
         .CASE 6000000 ; PL2303TA baudrate
 ; Configure UART_TERM @ 6000000 bauds / 24MHz
 ; N = 24000000/6000000 = 4 ==> {UCOS16=0, UCBR0=int(N)=4, UCBRF0=dont_care=0  UCBRS0=fn(frac(N))=fn(0.00000)=0x00
-            MOV     #4,&TERMBRW
-            MOV.W   #0,&TERMMCTLW
+TERMBRW_INI     .equ 4
+TERMMCTLW_INI   .equ 0
 
         .ELSECASE
             .error "UART_TERM / 24 MHz : baudrate not implemented"

diff --git a/config/gema/CHIPSTICK_FR2433.pat b/config/gema/CHIPSTICK_FR2433.pat
index 4229c5f..4551c99 100644 (file)
--- a/config/gema/CHIPSTICK_FR2433.pat
+++ b/config/gema/CHIPSTICK_FR2433.pat
@@ -66,16 +66,15 @@
 ! ============================================
 ! FORTH I/O :
 ! ============================================
-TERM_TX=\$10!          ; P1.4 = TX
+TERM_TX=\$10!          ; P1.4 = TX also Deep_RST pin
 TERM_RX=\$20!          ; P1.5 = RX
-TERM_TXRX=\$30!
+TERM_BUS=\$30!
 
+TERM_IN=\$200!
 TERM_REN=\$206!
 TERM_SEL=\$20C!
 TERM_IE=\$21A!
 TERM_IFG=\$21C!
-Deep_RST=\$10!         ; = TX pin
-Deep_RST_IN=\$200!  ; TERMINAL TX  pin as FORTH Deep_RST
 
 RTS=4!              ; P3.2
 CTS=1!              ; P3.0

diff --git a/config/gema/FastForthREGtoTI.pat b/config/gema/FastForthREGtoTI.pat
index f3afac9..edd48e2 100644 (file)
--- a/config/gema/FastForthREGtoTI.pat
+++ b/config/gema/FastForthREGtoTI.pat
@@ -11,7 +11,10 @@ rDOCON=R5!
 rDOVAR=R6!
 rEXIT=R7!
 rDOCOL=R7!
-R=R7!
+Q=R4!
+P=R5!
+M=R6!
+L=R7!
 Y=R8!
 X=R9!
 W=R10!
@@ -21,8 +24,14 @@ IP=R13!
 TOS=R14!
 PSP=R15!
 
+
+DOVAR=\$1286!   to reinit rDOVAR : MOV #DOVAR,rDOVAR
+DOCON=\$1285!   to reinit rDOCON : MOV #DOCON,rDOCON
+DODOES=\$1284!  to reinit rDODOES: MOV #DODOES,rDODOES
+
+
 ! forth words filter
-U\.R=U\.R!
+M\*=M\*
 R\>=R\>!
 R\@=R\@!
 \>R=\>R!
@@ -36,9 +45,4 @@ S\"=S\"!
 
 T\{=T\{!
 \}T=\}T!
-!_R=_R
-!_S=_S
-!_T=_T
-!_W=_W
-!_X=_X
-!_Y=_Y
+U\.R=U\.R!

diff --git a/config/gema/MSP430FR2355.pat b/config/gema/MSP430FR2355.pat
index d019a3b..1ebaf9a 100644 (file)
--- a/config/gema/MSP430FR2355.pat
+++ b/config/gema/MSP430FR2355.pat
@@ -159,9 +159,10 @@ SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
 ! KERNEL CONSTANTS
 ! ----------------------
 INI_THREAD=\$1800!      .word THREADS
-TERMINAL_INT=\$1802!    .word TERMINAL_INT
-FREQ_KHZ=\$1804!        .word FREQUENCY
-HECTOBAUDS=\$1806!      .word TERMINALBAUDRATE/100
+TERMBRW_RST=\$1802!     .word TERMBRW_RST
+TERMMCTLW_RST=\$1804!   .word TERMMCTLW_RST
+FREQ_KHZ=\$1806!        .word FREQUENCY
+
 ! ----------------------
 ! SAVED VARIABLES
 ! ----------------------
@@ -223,22 +224,29 @@ LAST_PSP=\$21BC!
 
 !STATE=\$21BE!           Interpreter state
 
-SAV_CURRENT=\$21C0!     preserve CURRENT when create assembler words
-OPCODE=\$21C2!          OPCODE adr
-ASMTYPE=\$21C4!         keep the opcode complement
+SOURCE_LEN=\$21C0!      len of input stream
+SOURCE_ADR=\$21C2!      adr of input stream
+TOIN=\$21C4!            >IN
+DP=\$21C6!              dictionary ptr
 
-SOURCE_LEN=\$21C6!      len of input stream
-SOURCE_ADR=\$21C8!      adr of input stream
-TOIN=\$21CA!            >IN
-DP=\$21CC!              dictionary ptr
-LASTVOC=\$21CE!         keep VOC-LINK
-CONTEXT=\$21D0!         CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$21E0!         CURRENT dictionnary ptr
+LASTVOC=\$21C8!         keep VOC-LINK
+CONTEXT=\$21CA!         CONTEXT dictionnary space (8 CELLS)
+CURRENT=\$21DA!         CURRENT dictionnary ptr
 
-!BASE=\$21E2!           numeric base, must be defined before first reset !
-LINE=\$21E4!           line in interpretation, activated with NOECHO, desactivated with ECHO
+!BASE=\$21DC!           numeric base, must be defined before first reset !
+LINE=\$21DE!            line in interpretation, activated with NOECHO, desactivated with ECHO
+! ---------------------------------------
+!21E0! 14 RAM bytes free conditionnaly
+! ---------------------------------------
+!SAV_CURRENT=\$21E0!    preserve CURRENT when create assembler words
+!ASMBW1=\$21E2          assembler backward reference 1
+!ASMBW2=\$21E4          assembler backward reference 2
+!ASMBW3=\$21E6          assembler backward reference 3
+!ASMFW1=\$21E8          assembler forward reference 1
+!ASMFW2=\$21EA          assembler forward reference 2
+!ASMFW3=\$21EC          assembler forward reference 3
 ! ---------------------------------------
-!21E6! 22 RAM bytes free
+!21EE! 14 RAM bytes free
 ! ---------------------------------------
 
 ! ---------------------------------------

diff --git a/config/gema/MSP430FR2433.pat b/config/gema/MSP430FR2433.pat
index cf0fdb4..4604eb1 100644 (file)
--- a/config/gema/MSP430FR2433.pat
+++ b/config/gema/MSP430FR2433.pat
@@ -141,9 +141,10 @@ SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
 ! KERNEL CONSTANTS
 ! ----------------------
 INI_THREAD=\$1800!      .word THREADS
-TERMINAL_INT=\$1802!    .word TERMINAL_INT
-FREQ_KHZ=\$1804!        .word FREQUENCY
-HECTOBAUDS=\$1806!      .word TERMINALBAUDRATE/100
+TERMBRW_RST=\$1802!     .word TERMBRW_RST
+TERMMCTLW_RST=\$1804!   .word TERMMCTLW_RST
+FREQ_KHZ=\$1806!        .word FREQUENCY
+
 ! ----------------------
 ! SAVED VARIABLES
 ! ----------------------
@@ -205,22 +206,29 @@ LAST_PSP=\$21BC!
 
 !STATE=\$21BE!           Interpreter state
 
-SAV_CURRENT=\$21C0!     preserve CURRENT when create assembler words
-OPCODE=\$21C2!          OPCODE adr
-ASMTYPE=\$21C4!         keep the opcode complement
+SOURCE_LEN=\$21C0!      len of input stream
+SOURCE_ADR=\$21C2!      adr of input stream
+TOIN=\$21C4!            >IN
+DP=\$21C6!              dictionary ptr
 
-SOURCE_LEN=\$21C6!      len of input stream
-SOURCE_ADR=\$21C8!      adr of input stream
-TOIN=\$21CA!            >IN
-DP=\$21CC!              dictionary ptr
-LASTVOC=\$21CE!         keep VOC-LINK
-CONTEXT=\$21D0!         CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$21E0!         CURRENT dictionnary ptr
+LASTVOC=\$21C8!         keep VOC-LINK
+CONTEXT=\$21CA!         CONTEXT dictionnary space (8 CELLS)
+CURRENT=\$21DA!         CURRENT dictionnary ptr
 
-!BASE=\$21E2!           numeric base, must be defined before first reset !
-LINE=\$21E4!           line in interpretation, activated with NOECHO, desactivated with ECHO
+!BASE=\$21DC!           numeric base, must be defined before first reset !
+LINE=\$21DE!            line in interpretation, activated with NOECHO, desactivated with ECHO
+! ---------------------------------------
+!21E0! 14 RAM bytes free conditionnaly
+! ---------------------------------------
+!SAV_CURRENT=\$21E0!    preserve CURRENT when create assembler words
+!ASMBW1=\$21E2          assembler backward reference 1
+!ASMBW2=\$21E4          assembler backward reference 2
+!ASMBW3=\$21E6          assembler backward reference 3
+!ASMFW1=\$21E8          assembler forward reference 1
+!ASMFW2=\$21EA          assembler forward reference 2
+!ASMFW3=\$21EC          assembler forward reference 3
 ! ---------------------------------------
-!21E6! 22 RAM bytes free
+!21EE! 14 RAM bytes free
 ! ---------------------------------------
 
 ! ---------------------------------------

diff --git a/config/gema/MSP430FR2633.pat b/config/gema/MSP430FR2633.pat
index 20ce604..5581573 100644 (file)
--- a/config/gema/MSP430FR2633.pat
+++ b/config/gema/MSP430FR2633.pat
@@ -127,9 +127,10 @@ SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
 ! KERNEL CONSTANTS
 ! ----------------------
 INI_THREAD=\$1800!      .word THREADS
-TERMINAL_INT=\$1802!    .word TERMINAL_INT
-FREQ_KHZ=\$1804!        .word FREQUENCY
-HECTOBAUDS=\$1806!      .word TERMINALBAUDRATE/100
+TERMBRW_RST=\$1802!     .word TERMBRW_RST
+TERMMCTLW_RST=\$1804!   .word TERMMCTLW_RST
+FREQ_KHZ=\$1806!        .word FREQUENCY
+
 ! ----------------------
 ! SAVED VARIABLES
 ! ----------------------
@@ -191,22 +192,29 @@ LAST_PSP=\$21BC!
 
 !STATE=\$21BE!           Interpreter state
 
-SAV_CURRENT=\$21C0!     preserve CURRENT when create assembler words
-OPCODE=\$21C2!          OPCODE adr
-ASMTYPE=\$21C4!         keep the opcode complement
+SOURCE_LEN=\$21C0!      len of input stream
+SOURCE_ADR=\$21C2!      adr of input stream
+TOIN=\$21C4!            >IN
+DP=\$21C6!              dictionary ptr
 
-SOURCE_LEN=\$21C6!      len of input stream
-SOURCE_ADR=\$21C8!      adr of input stream
-TOIN=\$21CA!            >IN
-DP=\$21CC!              dictionary ptr
-LASTVOC=\$21CE!         keep VOC-LINK
-CONTEXT=\$21D0!         CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$21E0!         CURRENT dictionnary ptr
+LASTVOC=\$21C8!         keep VOC-LINK
+CONTEXT=\$21CA!         CONTEXT dictionnary space (8 CELLS)
+CURRENT=\$21DA!         CURRENT dictionnary ptr
 
-!BASE=\$21E2!           numeric base, must be defined before first reset !
-LINE=\$21E4!           line in interpretation, activated with NOECHO, desactivated with ECHO
+!BASE=\$21DC!           numeric base, must be defined before first reset !
+LINE=\$21DE!            line in interpretation, activated with NOECHO, desactivated with ECHO
+! ---------------------------------------
+!21E0! 14 RAM bytes free conditionnaly
+! ---------------------------------------
+!SAV_CURRENT=\$21E0!    preserve CURRENT when create assembler words
+!ASMBW1=\$21E2          assembler backward reference 1
+!ASMBW2=\$21E4          assembler backward reference 2
+!ASMBW3=\$21E6          assembler backward reference 3
+!ASMFW1=\$21E8          assembler forward reference 1
+!ASMFW2=\$21EA          assembler forward reference 2
+!ASMFW3=\$21EC          assembler forward reference 3
 ! ---------------------------------------
-!21E6! 22 RAM bytes free
+!21EE! 14 RAM bytes free
 ! ---------------------------------------
 
 ! ---------------------------------------

diff --git a/config/gema/MSP430FR4133.pat b/config/gema/MSP430FR4133.pat
index 8429745..f14d6f2 100644 (file)
--- a/config/gema/MSP430FR4133.pat
+++ b/config/gema/MSP430FR4133.pat
@@ -126,9 +126,10 @@ SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
 ! KERNEL CONSTANTS
 ! ----------------------
 INI_THREAD=\$1800!      .word THREADS
-TERMINAL_INT=\$1802!    .word TERMINAL_INT
-FREQ_KHZ=\$1804!        .word FREQUENCY
-HECTOBAUDS=\$1806!      .word TERMINALBAUDRATE/100
+TERMBRW_RST=\$1802!     .word TERMBRW_RST
+TERMMCTLW_RST=\$1804!   .word TERMMCTLW_RST
+FREQ_KHZ=\$1806!        .word FREQUENCY
+
 ! ----------------------
 ! SAVED VARIABLES
 ! ----------------------
@@ -190,22 +191,29 @@ LAST_PSP=\$21BC!
 
 !STATE=\$21BE!           Interpreter state
 
-SAV_CURRENT=\$21C0!     preserve CURRENT when create assembler words
-OPCODE=\$21C2!          OPCODE adr
-ASMTYPE=\$21C4!         keep the opcode complement
+SOURCE_LEN=\$21C0!      len of input stream
+SOURCE_ADR=\$21C2!      adr of input stream
+TOIN=\$21C4!            >IN
+DP=\$21C6!              dictionary ptr
 
-SOURCE_LEN=\$21C6!      len of input stream
-SOURCE_ADR=\$21C8!      adr of input stream
-TOIN=\$21CA!            >IN
-DP=\$21CC!              dictionary ptr
-LASTVOC=\$21CE!         keep VOC-LINK
-CONTEXT=\$21D0!         CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$21E0!         CURRENT dictionnary ptr
+LASTVOC=\$21C8!         keep VOC-LINK
+CONTEXT=\$21CA!         CONTEXT dictionnary space (8 CELLS)
+CURRENT=\$21DA!         CURRENT dictionnary ptr
 
-!BASE=\$21E2!           numeric base, must be defined before first reset !
-LINE=\$21E4!           line in interpretation, activated with NOECHO, desactivated with ECHO
+!BASE=\$21DC!           numeric base, must be defined before first reset !
+LINE=\$21DE!            line in interpretation, activated with NOECHO, desactivated with ECHO
+! ---------------------------------------
+!21E0! 14 RAM bytes free conditionnaly
+! ---------------------------------------
+!SAV_CURRENT=\$21E0!    preserve CURRENT when create assembler words
+!ASMBW1=\$21E2          assembler backward reference 1
+!ASMBW2=\$21E4          assembler backward reference 2
+!ASMBW3=\$21E6          assembler backward reference 3
+!ASMFW1=\$21E8          assembler forward reference 1
+!ASMFW2=\$21EA          assembler forward reference 2
+!ASMFW3=\$21EC          assembler forward reference 3
 ! ---------------------------------------
-!21E6! 22 RAM bytes free
+!21EE! 14 RAM bytes free
 ! ---------------------------------------
 
 ! ---------------------------------------

diff --git a/config/gema/MSP430FR5738.pat b/config/gema/MSP430FR5738.pat
index e4becb0..2cbb175 100644 (file)
--- a/config/gema/MSP430FR5738.pat
+++ b/config/gema/MSP430FR5738.pat
@@ -133,14 +133,13 @@ SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
 ! KERNEL CONSTANTS
 ! ----------------------
 INI_THREAD=\$1800!      .word THREADS
-TERMINAL_INT=\$1802!    .word TERMINAL_INT
-FREQ_KHZ=\$1804!        .word FREQUENCY
-HECTOBAUDS=\$1806!      .word TERMINALBAUDRATE/100
+TERMBRW_RST=\$1802!     .word TERMBRW_RST
+TERMMCTLW_RST=\$1804!   .word TERMMCTLW_RST
+FREQ_KHZ=\$1806!        .word FREQUENCY
 
 ! ----------------------
 ! SAVED VARIABLES
 ! ----------------------
-
 SAVE_SYSRSTIV=\$1808!   to enable SYSRSTIV read
 LPM_MODE=\$180A!        LPM0+GIE is the default mode
 INIDP=\$180C!           define RST_STATE, init by wipe
@@ -239,9 +238,9 @@ HDLW_BUFofst=22!    BUFFER offset ; used by LOAD" and by WRITE"
 
 
 !OpenedFirstFile     ; "openedFile" structure 
+FirstHandle=\$1858!
 HandleMax=5!
 HandleLenght=24!
-FirstHandle=\$1858!
 HandleEnd=\$18D0!
 
 !Stack of return IP for LOADed files, preincrement stack structure
@@ -292,23 +291,29 @@ LAST_PSP=\$1DBC!
 
 !STATE=\$1DBE!          Interpreter state
 
-SAV_CURRENT=\$1DC0!     preserve CURRENT when create assembler words
-OPCODE=\$1DC2!          OPCODE adr
-ASMTYPE=\$1DC4!         keep the opcode complement
+SOURCE_LEN=\$1DC0!      len of input stream
+SOURCE_ADR=\$1DC2!      adr of input stream
+TOIN=\$1DC4!            >IN
+DP=\$1DC6!              dictionary ptr
 
-SOURCE_LEN=\$1DC6!      len of input stream
-SOURCE_ADR=\$1DC8!      adr of input stream
-TOIN=\$1DCA!            >IN
-DP=\$1DCC!              dictionary ptr
-LASTVOC=\$1DCE!         keep VOC-LINK
-CONTEXT=\$1DD0!         CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$1DE0!         CURRENT dictionnary ptr
-
-!BASE=\$1DE2!           numeric base, must be defined before first reset !
-LINE=\$1DE4!           line in interpretation, activated with NOECHO, desactivated with ECHO
+LASTVOC=\$1DC8!         keep VOC-LINK
+CONTEXT=\$1DCA!         CONTEXT dictionnary space (8 CELLS)
+CURRENT=\$1DDA!         CURRENT dictionnary ptr
 
+!BASE=\$1DDC!           numeric base, must be defined before first reset !
+LINE=\$1DDE!            line in interpretation, activated with NOECHO, desactivated with ECHO
+! ---------------------------------------
+!1DE0! 14 RAM bytes free conditionnaly
+! ---------------------------------------
+!SAV_CURRENT=\$21E0!    preserve CURRENT when create assembler words
+!ASMBW1=\$1DE2          assembler backward reference 1
+!ASMBW2=\$1DE4          assembler backward reference 2
+!ASMBW3=\$1DE6          assembler backward reference 3
+!ASMFW1=\$1DE8          assembler forward reference 1
+!ASMFW2=\$1DEA          assembler forward reference 2
+!ASMFW3=\$1DEC          assembler forward reference 3
 ! ---------------------------------------
-!1DE6! 22 bytes RAM free
+!1DEE! 14 RAM bytes free
 ! ---------------------------------------
 
 ! ---------------------------------------

diff --git a/config/gema/MSP430FR5739.pat b/config/gema/MSP430FR5739.pat
index 107a95c..865353d 100644 (file)
--- a/config/gema/MSP430FR5739.pat
+++ b/config/gema/MSP430FR5739.pat
@@ -135,9 +135,9 @@ SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
 ! KERNEL CONSTANTS
 ! ----------------------
 INI_THREAD=\$1800!      .word THREADS
-TERMINAL_INT=\$1802!    .word TERMINAL_INT
-FREQ_KHZ=\$1804!        .word FREQUENCY
-HECTOBAUDS=\$1806!      .word TERMINALBAUDRATE/100
+TERMBRW_RST=\$1802!     .word TERMBRW_RST
+TERMMCTLW_RST=\$1804!   .word TERMMCTLW_RST
+FREQ_KHZ=\$1806!        .word FREQUENCY
 
 ! ----------------------
 ! SAVED VARIABLES
@@ -294,23 +294,29 @@ LAST_PSP=\$1DBC!
 
 !STATE=\$1DBE!          Interpreter state
 
-SAV_CURRENT=\$1DC0!     preserve CURRENT when create assembler words
-OPCODE=\$1DC2!          OPCODE adr
-ASMTYPE=\$1DC4!         keep the opcode complement
+SOURCE_LEN=\$1DC0!      len of input stream
+SOURCE_ADR=\$1DC2!      adr of input stream
+TOIN=\$1DC4!            >IN
+DP=\$1DC6!              dictionary ptr
 
-SOURCE_LEN=\$1DC6!      len of input stream
-SOURCE_ADR=\$1DC8!      adr of input stream
-TOIN=\$1DCA!            >IN
-DP=\$1DCC!              dictionary ptr
-LASTVOC=\$1DCE!         keep VOC-LINK
-CONTEXT=\$1DD0!         CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$1DE0!         CURRENT dictionnary ptr
-
-!BASE=\$1DE2!           numeric base, must be defined before first reset !
-LINE=\$1DE4!           line in interpretation, activated with NOECHO, desactivated with ECHO
+LASTVOC=\$1DC8!         keep VOC-LINK
+CONTEXT=\$1DCA!         CONTEXT dictionnary space (8 CELLS)
+CURRENT=\$1DDA!         CURRENT dictionnary ptr
 
+!BASE=\$1DDC!           numeric base, must be defined before first reset !
+LINE=\$1DDE!            line in interpretation, activated with NOECHO, desactivated with ECHO
+! ---------------------------------------
+!1DE0! 14 RAM bytes free conditionnaly
+! ---------------------------------------
+!SAV_CURRENT=\$21E0!    preserve CURRENT when create assembler words
+!ASMBW1=\$1DE2          assembler backward reference 1
+!ASMBW2=\$1DE4          assembler backward reference 2
+!ASMBW3=\$1DE6          assembler backward reference 3
+!ASMFW1=\$1DE8          assembler forward reference 1
+!ASMFW2=\$1DEA          assembler forward reference 2
+!ASMFW3=\$1DEC          assembler forward reference 3
 ! ---------------------------------------
-!1DE6! 22 bytes RAM free
+!1DEE! 14 RAM bytes free
 ! ---------------------------------------
 
 ! ---------------------------------------

diff --git a/config/gema/MSP430FR5948.pat b/config/gema/MSP430FR5948.pat
index 012d3fe..bcb0666 100644 (file)
--- a/config/gema/MSP430FR5948.pat
+++ b/config/gema/MSP430FR5948.pat
@@ -143,9 +143,10 @@ SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
 ! KERNEL CONSTANTS
 ! ----------------------
 INI_THREAD=\$1800!      .word THREADS
-TERMINAL_INT=\$1802!    .word TERMINAL_INT
-FREQ_KHZ=\$1804!        .word FREQUENCY
-HECTOBAUDS=\$1806!      .word TERMINALBAUDRATE/100
+TERMBRW_RST=\$1802!     .word TERMBRW_RST
+TERMMCTLW_RST=\$1804!   .word TERMMCTLW_RST
+FREQ_KHZ=\$1806!        .word FREQUENCY
+
 ! ----------------------
 ! SAVED VARIABLES
 ! ----------------------
@@ -205,23 +206,29 @@ LAST_PSP=\$1DBC!
 
 !STATE=\$1DBE!           Interpreter state
 
-SAV_CURRENT=\$1DC0!     preserve CURRENT when create assembler words
-OPCODE=\$1DC2!          OPCODE adr
-ASMTYPE=\$1DC4!         keep the opcode complement
-
-SOURCE_LEN=\$1DC6!      len of input stream
-SOURCE_ADR=\$1DC8!      adr of input stream
-TOIN=\$1DCA!            >IN
-DP=\$1DCC!              dictionary ptr
-LASTVOC=\$1DCE!         keep VOC-LINK
-CONTEXT=\$1DD0!         CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$1DE0!         CURRENT dictionnary ptr
+SOURCE_LEN=\$1DC0!      len of input stream
+SOURCE_ADR=\$1DC2!      adr of input stream
+TOIN=\$1DC4!            >IN
+DP=\$1DC6!              dictionary ptr
 
-!BASE=\$1DE2!           numeric base, must be defined before first reset !
-LINE=\$1DE4!           line in interpretation, activated with NOECHO, desactivated with ECHO
+LASTVOC=\$1DC8!         keep VOC-LINK
+CONTEXT=\$1DCA!         CONTEXT dictionnary space (8 CELLS)
+CURRENT=\$1DDA!         CURRENT dictionnary ptr
 
+!BASE=\$1DDC!           numeric base, must be defined before first reset !
+LINE=\$1DDE!            line in interpretation, activated with NOECHO, desactivated with ECHO
+! ---------------------------------------
+!1DE0! 14 RAM bytes free conditionnaly
+! ---------------------------------------
+!SAV_CURRENT=\$21E0!    preserve CURRENT when create assembler words
+!ASMBW1=\$1DE2          assembler backward reference 1
+!ASMBW2=\$1DE4          assembler backward reference 2
+!ASMBW3=\$1DE6          assembler backward reference 3
+!ASMFW1=\$1DE8          assembler forward reference 1
+!ASMFW2=\$1DEA          assembler forward reference 2
+!ASMFW3=\$1DEC          assembler forward reference 3
 ! ---------------------------------------
-!1DE6! 22 bytes RAM free
+!1DEE! 14 RAM bytes free
 ! ---------------------------------------
 
 ! ---------------------------------------
@@ -289,7 +296,7 @@ CurrentHdl=\$2032!  contains the address of the last opened file structure, or 0
 ! Load file operation
 ! ---------------------------------------
 pathname=\$2034!
-EndOfPath=\$2436!
+EndOfPath=\$2036!
 
 ! ---------------------------------------
 ! Handle structure

diff --git a/config/gema/MSP430FR5969.pat b/config/gema/MSP430FR5969.pat
index 1084bc7..c2ee98a 100644 (file)
--- a/config/gema/MSP430FR5969.pat
+++ b/config/gema/MSP430FR5969.pat
@@ -140,9 +140,10 @@ SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
 ! KERNEL CONSTANTS
 ! ----------------------
 INI_THREAD=\$1800!      .word THREADS
-TERMINAL_INT=\$1802!    .word TERMINAL_INT
-FREQ_KHZ=\$1804!        .word FREQUENCY
-HECTOBAUDS=\$1806!      .word TERMINALBAUDRATE/100
+TERMBRW_RST=\$1802!     .word TERMBRW_RST
+TERMMCTLW_RST=\$1804!   .word TERMMCTLW_RST
+FREQ_KHZ=\$1806!        .word FREQUENCY
+
 ! ----------------------
 ! SAVED VARIABLES
 ! ----------------------
@@ -202,23 +203,29 @@ LAST_PSP=\$1DBC!
 
 !STATE=\$1DBE!           Interpreter state
 
-SAV_CURRENT=\$1DC0!     preserve CURRENT when create assembler words
-OPCODE=\$1DC2!          OPCODE adr
-ASMTYPE=\$1DC4!         keep the opcode complement
-
-SOURCE_LEN=\$1DC6!      len of input stream
-SOURCE_ADR=\$1DC8!      adr of input stream
-TOIN=\$1DCA!            >IN
-DP=\$1DCC!              dictionary ptr
-LASTVOC=\$1DCE!         keep VOC-LINK
-CONTEXT=\$1DD0!         CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$1DE0!         CURRENT dictionnary ptr
+SOURCE_LEN=\$1DC0!      len of input stream
+SOURCE_ADR=\$1DC2!      adr of input stream
+TOIN=\$1DC4!            >IN
+DP=\$1DC6!              dictionary ptr
 
-!BASE=\$1DE2!           numeric base, must be defined before first reset !
-LINE=\$1DE4!           line in interpretation, activated with NOECHO, desactivated with ECHO
+LASTVOC=\$1DC8!         keep VOC-LINK
+CONTEXT=\$1DCA!         CONTEXT dictionnary space (8 CELLS)
+CURRENT=\$1DDA!         CURRENT dictionnary ptr
 
+!BASE=\$1DDC!           numeric base, must be defined before first reset !
+LINE=\$1DDE!            line in interpretation, activated with NOECHO, desactivated with ECHO
+! ---------------------------------------
+!1DE0! 14 RAM bytes free conditionnaly
+! ---------------------------------------
+!SAV_CURRENT=\$21E0!    preserve CURRENT when create assembler words
+!ASMBW1=\$1DE2          assembler backward reference 1
+!ASMBW2=\$1DE4          assembler backward reference 2
+!ASMBW3=\$1DE6          assembler backward reference 3
+!ASMFW1=\$1DE8          assembler forward reference 1
+!ASMFW2=\$1DEA          assembler forward reference 2
+!ASMFW3=\$1DEC          assembler forward reference 3
 ! ---------------------------------------
-!1DE6! 22 bytes RAM free
+!1DEE! 14 RAM bytes free
 ! ---------------------------------------
 
 ! ---------------------------------------
@@ -286,7 +293,7 @@ CurrentHdl=\$2032!  contains the address of the last opened file structure, or 0
 ! Load file operation
 ! ---------------------------------------
 pathname=\$2034!
-EndOfPath=\$2436!
+EndOfPath=\$2036!
 
 ! ---------------------------------------
 ! Handle structure

diff --git a/config/gema/MSP430FR5994.pat b/config/gema/MSP430FR5994.pat
index 0b14a7d..3e6d9a3 100644 (file)
--- a/config/gema/MSP430FR5994.pat
+++ b/config/gema/MSP430FR5994.pat
@@ -181,9 +181,10 @@ SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
 ! KERNEL CONSTANTS
 ! ----------------------
 INI_THREAD=\$1800!      .word THREADS
-TERMINAL_INT=\$1802!    .word TERMINAL_INT
-FREQ_KHZ=\$1804!        .word FREQUENCY
-HECTOBAUDS=\$1806!      .word TERMINALBAUDRATE/100
+TERMBRW_RST=\$1802!     .word TERMBRW_RST
+TERMMCTLW_RST=\$1804!   .word TERMMCTLW_RST
+FREQ_KHZ=\$1806!        .word FREQUENCY
+
 ! ----------------------
 ! SAVED VARIABLES
 ! ----------------------
@@ -243,23 +244,29 @@ LAST_PSP=\$1DBC!
 
 !STATE=\$1DBE!           Interpreter state
 
-SAV_CURRENT=\$1DC0!     preserve CURRENT when create assembler words
-OPCODE=\$1DC2!          OPCODE adr
-ASMTYPE=\$1DC4!         keep the opcode complement
-
-SOURCE_LEN=\$1DC6!      len of input stream
-SOURCE_ADR=\$1DC8!      adr of input stream
-TOIN=\$1DCA!            >IN
-DP=\$1DCC!              dictionary ptr
-LASTVOC=\$1DCE!         keep VOC-LINK
-CONTEXT=\$1DD0!         CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$1DE0!         CURRENT dictionnary ptr
+SOURCE_LEN=\$1DC0!      len of input stream
+SOURCE_ADR=\$1DC2!      adr of input stream
+TOIN=\$1DC4!            >IN
+DP=\$1DC6!              dictionary ptr
 
-!BASE=\$1DE2!           numeric base, must be defined before first reset !
-LINE=\$1DE4!           line in interpretation, activated with NOECHO, desactivated with ECHO
+LASTVOC=\$1DC8!         keep VOC-LINK
+CONTEXT=\$1DCA!         CONTEXT dictionnary space (8 CELLS)
+CURRENT=\$1DDA!         CURRENT dictionnary ptr
 
+!BASE=\$1DDC!           numeric base, must be defined before first reset !
+LINE=\$1DDE!            line in interpretation, activated with NOECHO, desactivated with ECHO
+! ---------------------------------------
+!1DE0! 14 RAM bytes free conditionnaly
+! ---------------------------------------
+!SAV_CURRENT=\$21E0!    preserve CURRENT when create assembler words
+!ASMBW1=\$1DE2          assembler backward reference 1
+!ASMBW2=\$1DE4          assembler backward reference 2
+!ASMBW3=\$1DE6          assembler backward reference 3
+!ASMFW1=\$1DE8          assembler forward reference 1
+!ASMFW2=\$1DEA          assembler forward reference 2
+!ASMFW3=\$1DEC          assembler forward reference 3
 ! ---------------------------------------
-!1DE6! 22 bytes RAM free
+!1DEE! 14 RAM bytes free
 ! ---------------------------------------
 
 ! ---------------------------------------
@@ -327,7 +334,7 @@ CurrentHdl=\$2032!  contains the address of the last opened file structure, or 0
 ! Load file operation
 ! ---------------------------------------
 pathname=\$2034!
-EndOfPath=\$2436!
+EndOfPath=\$2036!
 
 ! ---------------------------------------
 ! Handle structure

diff --git a/config/gema/MSP430FR6989.pat b/config/gema/MSP430FR6989.pat
index 5caaab7..844ae5f 100644 (file)
--- a/config/gema/MSP430FR6989.pat
+++ b/config/gema/MSP430FR6989.pat
@@ -148,9 +148,10 @@ SEMI=MOV \@R1+,R13\nMOV \@R13+,R0!
 ! KERNEL CONSTANTS
 ! ----------------------
 INI_THREAD=\$1800!      .word THREADS
-TERMINAL_INT=\$1802!    .word TERMINAL_INT
-FREQ_KHZ=\$1804!        .word FREQUENCY
-HECTOBAUDS=\$1806!      .word TERMINALBAUDRATE/100
+TERMBRW_RST=\$1802!     .word TERMBRW_RST
+TERMMCTLW_RST=\$1804!   .word TERMMCTLW_RST
+FREQ_KHZ=\$1806!        .word FREQUENCY
+
 ! ----------------------
 ! SAVED VARIABLES
 ! ----------------------
@@ -210,23 +211,29 @@ LAST_PSP=\$1DBC!
 
 !STATE=\$1DBE!           Interpreter state
 
-SAV_CURRENT=\$1DC0!     preserve CURRENT when create assembler words
-OPCODE=\$1DC2!          OPCODE adr
-ASMTYPE=\$1DC4!         keep the opcode complement
-
-SOURCE_LEN=\$1DC6!      len of input stream
-SOURCE_ADR=\$1DC8!      adr of input stream
-TOIN=\$1DCA!            >IN
-DP=\$1DCC!              dictionary ptr
-LASTVOC=\$1DCE!         keep VOC-LINK
-CONTEXT=\$1DD0!         CONTEXT dictionnary space (8 CELLS)
-CURRENT=\$1DE0!         CURRENT dictionnary ptr
+SOURCE_LEN=\$1DC0!      len of input stream
+SOURCE_ADR=\$1DC2!      adr of input stream
+TOIN=\$1DC4!            >IN
+DP=\$1DC6!              dictionary ptr
 
-!BASE=\$1DE2!           numeric base, must be defined before first reset !
-LINE=\$1DE4!           line in interpretation, activated with NOECHO, desactivated with ECHO
+LASTVOC=\$1DC8!         keep VOC-LINK
+CONTEXT=\$1DCA!         CONTEXT dictionnary space (8 CELLS)
+CURRENT=\$1DDA!         CURRENT dictionnary ptr
 
+!BASE=\$1DDC!           numeric base, must be defined before first reset !
+LINE=\$1DDE!            line in interpretation, activated with NOECHO, desactivated with ECHO
+! ---------------------------------------
+!1DE0! 14 RAM bytes free conditionnaly
+! ---------------------------------------
+!SAV_CURRENT=\$21E0!    preserve CURRENT when create assembler words
+!ASMBW1=\$1DE2          assembler backward reference 1
+!ASMBW2=\$1DE4          assembler backward reference 2
+!ASMBW3=\$1DE6          assembler backward reference 3
+!ASMFW1=\$1DE8          assembler forward reference 1
+!ASMFW2=\$1DEA          assembler forward reference 2
+!ASMFW3=\$1DEC          assembler forward reference 3
 ! ---------------------------------------
-!1DE6! 22 bytes RAM free
+!1DEE! 14 RAM bytes free
 ! ---------------------------------------
 
 ! ---------------------------------------
@@ -294,7 +301,7 @@ CurrentHdl=\$2032!  contains the address of the last opened file structure, or 0
 ! Load file operation
 ! ---------------------------------------
 pathname=\$2034!
-EndOfPath=\$2436!
+EndOfPath=\$2036!
 
 ! ---------------------------------------
 ! Handle structure

diff --git a/config/gema/MSP_EXP430FR2355.pat b/config/gema/MSP_EXP430FR2355.pat
index c05b00f..033290e 100644 (file)
--- a/config/gema/MSP_EXP430FR2355.pat
+++ b/config/gema/MSP_EXP430FR2355.pat
@@ -151,17 +151,16 @@
 ! FORTH I/O :
 ! ============================================
 !TERMINAL 
-TERM_TX=\$8!            P4.3 = TX
+TERM_TX=\$8!            P4.3 = TX also Deep_RST pin
 TERM_RX=\$4!            P4.2 = RX
-TERM_TXRX=\$0C!
+TERM_BUS=\$0C!
 
+TERM_IN=\$220!
 TERM_REN=\$227!
 TERM_SEL=\$22D!
 TERM_IE=\$23B!
 TERM_IFG=\$23D!
 TERM_Vec=\$FFE2!        UCA1
-Deep_RST=\$8!           TX pin = pin for FORTH Deep_RST
-Deep_RST_IN=\$220!
 
 RTS=1!                  P2.0
 CTS=2!                  P2.1

diff --git a/config/gema/MSP_EXP430FR2433.pat b/config/gema/MSP_EXP430FR2433.pat
index 1dada58..49fcbb9 100644 (file)
--- a/config/gema/MSP_EXP430FR2433.pat
+++ b/config/gema/MSP_EXP430FR2433.pat
@@ -104,16 +104,15 @@
 ! ============================================
 ! FORTH I/O :
 ! ============================================
-TERM_TX=\$10!          ; P1.4 = TX
+TERM_TX=\$10!          ; P1.4 = TX also Deep_RST pin
 TERM_RX=\$20!          ; P1.5 = RX
-TERM_TXRX=\$30!
+TERM_BUS=\$30!
 
+TERM_IN=\$200!
 TERM_REN=\$206!
 TERM_SEL=\$20C!
 TERM_IE=\$21A!
 TERM_IFG=\$21C!
-Deep_RST=\$10!      ; = TX pin
-Deep_RST_IN=\$200!  ; TERMINAL TX  pin as FORTH Deep_RST
 
 RTS=1!              ; P1.0
 CTS=2!              ; P1.1

diff --git a/config/gema/MSP_EXP430FR4133.pat b/config/gema/MSP_EXP430FR4133.pat
index 1846723..d593eea 100644 (file)
--- a/config/gema/MSP_EXP430FR4133.pat
+++ b/config/gema/MSP_EXP430FR4133.pat
@@ -190,14 +190,13 @@
 ! ============================================
 TERM_TX=1!          ; P1.0 = TX
 TERM_RX=2!          ; P1.1 = RX
-TERM_TXRX=3!
+TERM_BUS=3!
 
+TERM_IN=\$200!
 TERM_REN=\$206!
 TERM_SEL=\$20C!
 TERM_IE=\$21A!
 TERM_IFG=\$21C!
-Deep_RST=1!         ; = TX pin
-Deep_RST_IN=\$200!  ; TERMINAL TX  pin as FORTH Deep_RST
 
 RTS=8!              ; P2.3
 CTS=\$10!           ; P2.4

diff --git a/config/gema/MSP_EXP430FR5739.pat b/config/gema/MSP_EXP430FR5739.pat
index 448e7d8..a71abb9 100644 (file)
--- a/config/gema/MSP_EXP430FR5739.pat
+++ b/config/gema/MSP_EXP430FR5739.pat
@@ -154,16 +154,15 @@
 ! ============================================
 ! FORTH I/O :
 ! ============================================
-TERM_TX=1!              P2.0 = TX
+TERM_TX=1!              P2.0 = TX also Deep_RST pin
 TERM_RX=2!              P2.1 = RX
-TERM_TXRX=3!
+TERM_BUS=3!
 
+TERM_IN=\$201!
 TERM_REN=\$207!
 TERM_SEL=\$20D!
 TERM_IE=\$21B!
 TERM_IFG=\$21D!
-Deep_RST=1!             TX pin
-Deep_RST_IN=\$201!      TERMINAL TX  pin as FORTH Deep_RST
 
 RTS=4!
 CTS=8!

diff --git a/config/gema/MSP_EXP430FR5969.pat b/config/gema/MSP_EXP430FR5969.pat
index 348b6f3..9ea5cd8 100644 (file)
--- a/config/gema/MSP_EXP430FR5969.pat
+++ b/config/gema/MSP_EXP430FR5969.pat
@@ -193,16 +193,15 @@
 ! ============================================
 ! FORTH I/O :
 ! ============================================
-TERM_TX=1!          ; P2.0 = TX
+TERM_TX=1!          ; P2.0 = TX also Deep_RST pin
 TERM_RX=2!          ; P2.1 = RX
-TERM_TXRX=3!
+TERM_BUS=3!
 
+TERM_IN=\$201!
 TERM_REN=\$207!
 TERM_SEL=\$20D!
 TERM_IE=\$21B!
 TERM_IFG=\$21D!
-Deep_RST=1!         ; = TX pin
-Deep_RST_IN=\$201!  ; TERMINAL TX  pin as FORTH Deep_RST
 
 RTS=2!              ; P4.1
 CTS=1!              ; P4.0

diff --git a/config/gema/MSP_EXP430FR5994.pat b/config/gema/MSP_EXP430FR5994.pat
index 8c10854..892a96f 100644 (file)
--- a/config/gema/MSP_EXP430FR5994.pat
+++ b/config/gema/MSP_EXP430FR5994.pat
@@ -144,32 +144,31 @@
 ! ============================================
 ! FORTH I/O :
 ! ============================================
-TERM_TX=1!          ; P2.0 = TX
-TERM_RX=2!          ; P2.1 = RX
-TERM_TXRX=3!
+TXD=1!              ; P2.0 = TX also FORTH Deep_RST pin
+RXD=2!              ; P2.1 = RX
+TERM_BUS=3!
 
+TERM_IN=\$201!
 TERM_REN=\$207!
 TERM_SEL=\$20D!
 TERM_IE=\$21B!
 TERM_IFG=\$21D!
-Deep_RST=1!         ; = TX pin
-Deep_RST_IN=\$201!  ; TERMINAL TX  pin as FORTH Deep_RST
 
 RTS=4!              ; P4.2
 CTS=2!              ; P4.1
 HANDSHAKIN=\$221!
 HANDSHAKOUT=\$223!
 
-SD_CD=4!        ; P7.2 as SD_CD
+SD_CD=4!            ; P7.2 as SD_CD
 SD_CDIN=\$260!
 
-SD_CS=1!        ; P4.0 as SD_CS     
+SD_CS=1!            ; P4.0 as SD_CS     
 SD_CSOUT=\$223!
 SD_CSDIR=\$225!
 
-SD_SEL1=\$20C!  ; word access, to configure UCB0
-SD_REN=\$206!   ; word access, to configure pullup resistors
-SD_BUS=\$04C0!  ; pins P2.2 as UCB0CLK, P1.6 as UCB0SIMO & P1.7 as UCB0SOMI
+SD_SEL1=\$20C!      ; word access, to configure UCB0
+SD_REN=\$206!       ; word access, to configure pullup resistors
+SD_BUS=\$04C0!      ; pins P2.2 as UCB0CLK, P1.6 as UCB0SIMO & P1.7 as UCB0SOMI
 
 
 ! ============================================

diff --git a/config/gema/MSP_EXP430FR6989.pat b/config/gema/MSP_EXP430FR6989.pat
index c313574..dd9bfec 100644 (file)
--- a/config/gema/MSP_EXP430FR6989.pat
+++ b/config/gema/MSP_EXP430FR6989.pat
@@ -102,16 +102,15 @@
 ! ============================================
 ! FORTH I/O :
 ! ============================================
-TERM_TX=\$10!          ; P3.4 = TX
+TERM_TX=\$10!          ; P3.4 = TX also FORTH Deep_RST pin
 TERM_RX=\$20!          ; P3.5 = RX
-TERM_TXRX=\$30!
+TERM_BUS=\$30!
 
+TERM_IN=\$220!
 TERM_REN=\$226!
 TERM_SEL=\$22C!
 TERM_IE=\$23A!
 TERM_IFG=\$23C!
-Deep_RST=\$10!         ; = TX pin
-Deep_RST_IN=\$220!  ; TERMINAL TX  pin as FORTH Deep_RST
 
 RTS=2!              ; P3.1
 CTS=1!              ; P3.0

diff --git a/config/gema/tiREGtoFastForth.pat b/config/gema/tiREGtoFastForth.pat
index 24d33e6..53ef972 100644 (file)
--- a/config/gema/tiREGtoFastForth.pat
+++ b/config/gema/tiREGtoFastForth.pat
@@ -11,10 +11,10 @@ R11=T
 R10=W
 R9=X
 R8=Y
-!R7=rEXIT
-!R6=rDOVAR
-!R5=rDOCON
-!R4=rDODOES
+R7=rDOCOL
+R6=rDOVAR
+R5=rDOCON
+R4=rDODOES
 R2=SR
 R1=RSP
 R0=PC

diff --git a/forthMSP430FR.asm b/forthMSP430FR.asm
index 8f5328b..5fc7923 100644 (file)
--- a/forthMSP430FR.asm
+++ b/forthMSP430FR.asm
@@ -20,11 +20,11 @@
 ; ----------------------------------------------------------------------
 ; compiled with MACROASSEMBLER AS (http://john.ccac.rwth-aachen.de:8000/as/)
 ; ----------------------------------------------------------------------
-    .cpu MSP430
+    .cpu MSP430X
     .include "mspregister.mac" ;
 ;    macexp off             ; uncomment to hide macro results
 
-VER .equ "V205"
+VER .equ "V206"
 
 ;-------------------------------------------------------------------------------
 ; Vingt fois sur le métier remettez votre ouvrage,
@@ -41,49 +41,51 @@ VER .equ "V205"
 ;===============================================================================
 
 ;-------------------------------------------------------------------------------
-; TARGETS kernel    ; sizes are for 8MHz, DTC=1, 2457600 bds, 3WIRES (XON/XOFF)
+; TARGETS kernel    ; sizes are for 8MHz, DTC=2, 3WIRES (XON/XOFF)
 ;-------------------------------------------------------------------------------
-;MSP_EXP430FR5739   ; compile for MSP-EXP430FR5739 launchpad        ; 3998 bytes
-;MSP_EXP430FR5969   ; compile for MSP-EXP430FR5969 launchpad        ; 3986 bytes
-;MSP_EXP430FR5994   ; compile for MSP-EXP430FR5994 launchpad        ; 4004 bytes
-;MSP_EXP430FR6989   ; compile for MSP-EXP430FR6989 launchpad        ; 4014 bytes
-;MSP_EXP430FR4133   ; compile for MSP-EXP430FR4133 launchpad        ; 4048 bytes
-;MSP_EXP430FR2433   ; compile for MSP-EXP430FR2433 launchpad        ; 3966 bytes
-;CHIPSTICK_FR2433   ; compile for the "CHIPSTICK" of M. Ken BOAK    ; 3958 bytes
-MSP_EXP430FR2355   ; compile for MSP-EXP430FR2355 launchpad        ; 3980 bytes
+;                                                                   ;INFO + MAIN
+;MSP_EXP430FR5739   ; compile for MSP-EXP430FR5739 launchpad        ;  26 + 3976 bytes
+MSP_EXP430FR5969   ; compile for MSP-EXP430FR5969 launchpad        ;  26 + 3966 bytes
+;MSP_EXP430FR5994   ;; compile for MSP-EXP430FR5994 launchpad        ;  26 + 3984 bytes
+;MSP_EXP430FR6989   ; compile for MSP-EXP430FR6989 launchpad        ;  26 + 3994 bytes
+;MSP_EXP430FR4133   ; compile for MSP-EXP430FR4133 launchpad        ;  26 + 4028 bytes
+;MSP_EXP430FR2433   ; compile for MSP-EXP430FR2433 launchpad        ;  26 + 3946 bytes
+;CHIPSTICK_FR2433   ; compile for the "CHIPSTICK" of M. Ken BOAK    ;  26 + 3938 bytes
+;MSP_EXP430FR2355   ; compile for MSP-EXP430FR2355 launchpad        ;  26 + 3960 bytes
 
 ; choose DTC (Direct Threaded Code) model, if you don't know, choose 2
 DTC .equ 2  ; DTC model 1 : DOCOL = CALL rDOCOL           14 cycles 1 word      shortest DTC model
             ; DTC model 2 : DOCOL = PUSH IP, CALL rEXIT   13 cycles 2 words     good compromize for mix FORTH/ASM code
             ; DTC model 3 : inlined DOCOL                  9 cycles 4 words     fastest
 
-FREQUENCY   .equ 24  ; fully tested at 0.25,0.5,1,2,4,8,16 (and 24 for MSP430FR57xx) MHz
-THREADS     .equ 16  ;  1,    2,    4,    8,   16,   32 search entries in dictionnary.
-                    ; +0, +108, +122, +138, +180, +232 bytes
-                    ; used to speed compilation; with bluetooth connection, choose 1,
-                    ; with uart usb bridge, choose 16.
+THREADS     .equ 16 ;  1,  2 ,  4 ,  8 ,  16,  32  search entries in dictionnary.
+                    ; +0, +28, +40, +56, +90, +154 bytes, usefull to speed compilation;
+                    ; choose 16
+
+FREQUENCY   .equ 16  ; fully tested at 0.25,0.5,1,2,4,8,16 (and 24 for MSP430FR57xx) MHz
+
 ;-------------------------------------------------------------------------------
 ; KERNEL ADD-ON SWITCHES
 ;-------------------------------------------------------------------------------
-MSP430ASSEMBLER     ;; + 1882 bytes : adds embedded assembler with TI syntax; without, you can do all but all much more slowly...
-CONDCOMP            ;; +  324 bytes : add conditionnal compilation : MARKER [UNDEFINED] [DEFINED] [IF] [ELSE] [THEN] COMPARE
+MSP430ASSEMBLER     ;; + 1814 bytes : adds embedded assembler with TI syntax; without, you can do all but all much more slowly...
+CONDCOMP            ;; +  324 bytes : adds conditionnal compilation : MARKER [UNDEFINED] [DEFINED] [IF] [ELSE] [THEN] COMPARE
 FIXPOINT_INPUT      ;; +   78 bytes : adds the interpretation input for Q15.16 numbers
-LOWERCASE           ;; +   30 bytes : enables to write strings in lowercase.
-VOCABULARY_SET      ;; +  102 bytes : adds words: VOCABULARY FORTH ASSEMBLER ALSO PREVIOUS ONLY DEFINITIONS (FORTH83)
-;SD_CARD_LOADER      ;; + 1740 bytes : to LOAD source files from SD_card
-;SD_CARD_READ_WRITE  ;; + 1188 bytes : to read, create, write and del files + source files direct copy from PC to SD_Card
-;BOOTLOADER          ; +   52 bytes : adds to <reset> a bootstrap to SD_CARD\BOOT.4TH.
+LOWERCASE           ;; +   46 bytes : enables to write strings in lowercase.
+VOCABULARY_SET      ;; +  104 bytes : adds words: VOCABULARY FORTH ASSEMBLER ALSO PREVIOUS ONLY DEFINITIONS (FORTH83)
+;SD_CARD_LOADER      ;; + 1748 bytes : to LOAD source files from SD_card
+;SD_CARD_READ_WRITE  ;; + 1192 bytes : to read, create, write and del files + source files direct copy from PC to SD_Card
+NONAME              ; +   64 bytes : adds :NONAME CODENN (CODENoNaMe)
+;BOOTLOADER          ; +   72 bytes : adds to <reset> a bootstrap to SD_CARD\BOOT.4TH.
 ;QUIETBOOT           ; +    2 bytes : to perform bootload without displaying.
-;NONAME              ; +   34 bytes : adds :NONAME
 ;TOTAL               ; +    4 bytes : to save R4 to R7 registers during interrupts.
 
 ;-------------------------------------------------------------------------------
-; OPTIONAL KERNEL ADD-ON SWITCHES (can be downloaded later)                     >------------------+
+; OPTIONAL KERNEL ADD-ON SWITCHES (thatcan be downloaded later)                 >------------------+
 ; Tip: when added here, ADD-ONs become protected against WIPE and Deep Reset...                    |
 ;-------------------------------------------------------------------------------                   v
 ;UARTtoI2C           ;                to redirect source file to a I2C TERMINAL FastForth device UART2IIC.f
-UTILITY             ;; +  426/508 bytes : add .S .RS WORDS U.R DUMP ?                            UTILITY.f
 ;FIXPOINT            ; +  452 bytes : add Q15.16 words HOLDS F+ F- F/ F* F#S F. S>F 2@ 2CONSTANT FIXPOINT.f
+UTILITY             ;; +  426/508 bytes : add .S .RS WORDS U.R DUMP ?                            UTILITY.f
 ;SD_TOOLS            ;; +  126 bytes for trivial DIR, FAT, CLUSTER and SECTOR view, adds UTILITY  SD_TOOLS.f
 ;ANS_CORE_COMPLIANT  ; +  876 bytes : required to pass coretest.4th ; (includes items below)     ANS_COMP.f
 ;ARITHMETIC          ; +  358 bytes : add S>D M* SM/REM FM/MOD * /MOD / MOD */MOD /MOD */
@@ -96,12 +98,13 @@ UTILITY             ;; +  426/508 bytes : add .S .RS WORDS U.R DUMP ?
 ; FAST FORTH TERMINAL configuration
 ;-------------------------------------------------------------------------------
 
-TERMINALBAUDRATE    .equ 115200 ; choose value considering the frequency and the UART2USB bridge, see explanations below.
+TERMINALBAUDRATE    .equ 5000000 ; choose value considering the frequency and the UART2USB bridge, see explanations below.
+                    .include "TERMINALBAUDRATE.inc"
 
 ;HALFDUPLEX          ; to use FAST FORTH with half duplex terminal
 
 TERMINAL3WIRES      ;;               enable 3 wires (GND,TX,RX) with XON/XOFF software flow control (PL2303TA/HXD, CP2102)
-TERMINAL4WIRES      ; + 18 bytes    enable 4 wires with hardware flow control on RX with RTS (PL2303TA/HXD, FT232RL)
+TERMINAL4WIRES      ;; + 18 bytes    enable 4 wires with hardware flow control on RX with RTS (PL2303TA/HXD, FT232RL)
 ;                                    this RTS pin may be permanently wired on SBWTCK/TEST pin without disturbing SBW 2 wires programming
 ;TERMINAL5WIRES      ; +  6 bytes    enable 5 wires with hardware flow control on RX/TX with RTS/CTS (PL2303TA/HXD, FT232RL)...
 
@@ -247,7 +250,7 @@ TERMINAL4WIRES      ; + 18 bytes    enable 4 wires with hardware flow control on
 
 ; ------------------------------------------------------------------------------
 
-    .include "Target.inc" ; to define target config: I/O, memory, SFR, vectors, TERMINAL eUSCI, SD_Card eUSCI, LF_XTAL,
+    .include "Device.inc" ; to define target config: I/O, memory, SFR, vectors, TERMINAL eUSCI, SD_Card eUSCI, LF_XTAL,
 
     .include "ForthThreads.mac" ; init vocabulary pointers
 
@@ -331,23 +334,29 @@ LAST_THREAD     .equ BASE_HOLD+6    ; used by QREVEAL
 LAST_CFA        .equ BASE_HOLD+8
 LAST_PSP        .equ BASE_HOLD+10
 STATE           .equ BASE_HOLD+12   ; Interpreter state
-SAV_CURRENT     .equ BASE_HOLD+14   ; preserve CURRENT during create assembler words
-OPCODE          .equ BASE_HOLD+16   ; OPCODE adr;                   also used as lure by :NONAME
-ASMTYPE         .equ BASE_HOLD+18   ; keep the opcode complement;   also used as lure by :NONAME
-SOURCE          .equ BASE_HOLD+20       
-SOURCE_LEN      .equ BASE_HOLD+20       
-SOURCE_ADR      .equ BASE_HOLD+22   ; len, addr of input stream
-TOIN            .equ BASE_HOLD+24   ; CurrentInputBuffer pointer
-DDP             .equ BASE_HOLD+26   ; dictionnary pointer
-LASTVOC         .equ BASE_HOLD+28   ; keep VOC-LINK
-CONTEXT         .equ BASE_HOLD+30   ; CONTEXT dictionnary space (8 CELLS)
-CURRENT         .equ BASE_HOLD+46   ; CURRENT dictionnary ptr
-BASE            .equ BASE_HOLD+48   
-LINE            .equ BASE_HOLD+50   ; line in interpretation (initialized by NOECHO)
-
-; ------------------------------------- ;
-; RAMSTART + $1E6 : free to user        ;
-; ------------------------------------- ;
+SOURCE          .equ BASE_HOLD+14       
+SOURCE_LEN      .equ BASE_HOLD+14       
+SOURCE_ADR      .equ BASE_HOLD+16   ; len, addr of input stream
+TOIN            .equ BASE_HOLD+18   ; CurrentInputBuffer pointer
+DDP             .equ BASE_HOLD+20   ; dictionnary pointer
+LASTVOC         .equ BASE_HOLD+22   ; keep VOC-LINK
+CONTEXT         .equ BASE_HOLD+24   ; CONTEXT dictionnary space (8 CELLS)
+CURRENT         .equ BASE_HOLD+40   ; CURRENT dictionnary ptr
+BASE            .equ BASE_HOLD+42   
+LINE            .equ BASE_HOLD+44   ; line in interpretation (initialized by NOECHO)
+; --------------------------------------------------------------;
+; RAMSTART + $1E0 : free for user after source file compilation  ;
+; --------------------------------------------------------------;
+SAV_CURRENT     .equ BASE_HOLD+46   ; preserve CURRENT during create assembler words
+ASMBW1          .equ BASE_HOLD+48
+ASMBW2          .equ BASE_HOLD+50
+ASMBW3          .equ BASE_HOLD+52
+ASMFW1          .equ BASE_HOLD+54
+ASMFW2          .equ BASE_HOLD+56
+ASMFW3          .equ BASE_HOLD+58
+; ----------------------------------;
+; RAMSTART + $1EE : free for user    ;
+; ----------------------------------;
 
 
 ; --------------------------------------------------
@@ -370,7 +379,8 @@ SD_BUFEND       .equ SD_BUF + 200h   ; 512bytes
 ; --------------------------
 
 INI_THREAD      .word THREADS               ; used by ADDON_UTILITY.f
-INI_TERM        .word TERMINAL_INT          ;
+TERMBRW_RST     .word TERMBRW_INI           ; set by TERMINALBAUDRATE.inc
+TERMMCTLW_RST   .word TERMMCTLW_INI         ; set by TERMINALBAUDRATE.inc
 
     .IF FREQUENCY = 0.25
 FREQ_KHZ        .word 250                   ;
@@ -379,7 +389,6 @@ FREQ_KHZ        .word 500                   ;
     .ELSE
 FREQ_KHZ        .word FREQUENCY*1000        ; user use
     .ENDIF
-HECTOBAUDS      .word TERMINALBAUDRATE/100  ; user use
 
 SAVE_SYSRSTIV   .word 05                    ; value to identify first start after core recompiling
 LPM_MODE        .word CPUOFF+GIE            ; LPM0 is the default mode
@@ -400,6 +409,7 @@ INIVOC          .word lastvoclink           ; define RST_STATE
     .ELSEIF
                 .word 0,0
     .ENDIF ; SD_CARD_LOADER
+GPFLAGS         .word 0
 
 INFO_BASE_END
 
@@ -411,6 +421,7 @@ INFO_BASE_END
     .org INFO_BASE_END
     .ELSE               ; if RAM >= 2k the variables below are in RAM
     .org SD_BUFEND
+                .word 0 ; guard
     .ENDIF
 
     .IFDEF SD_CARD_LOADER
@@ -420,17 +431,17 @@ SD_ORG_DATA
 ; ---------------------------------------
 ; FAT FileSystemInfos
 ; ---------------------------------------
-FATtype         .equ SD_ORG_DATA+2
-BS_FirstSectorL .equ SD_ORG_DATA+4  ; init by SD_Init, used by RW_Sector_CMD
-BS_FirstSectorH .equ SD_ORG_DATA+6  ; init by SD_Init, used by RW_Sector_CMD
-OrgFAT1         .equ SD_ORG_DATA+8  ; init by SD_Init,
-FATSize         .equ SD_ORG_DATA+10 ; init by SD_Init,
-OrgFAT2         .equ SD_ORG_DATA+12 ; init by SD_Init,
-OrgRootDIR      .equ SD_ORG_DATA+14 ; init by SD_Init, (FAT16 specific)
-OrgClusters     .equ SD_ORG_DATA+16 ; init by SD_Init, Sector of Cluster 0
-SecPerClus      .equ SD_ORG_DATA+18 ; init by SD_Init, byte size
-
-SD_LOW_LEVEL    .equ SD_ORG_DATA+20
+FATtype         .equ SD_ORG_DATA+0
+BS_FirstSectorL .equ SD_ORG_DATA+2  ; init by SD_Init, used by RW_Sector_CMD
+BS_FirstSectorH .equ SD_ORG_DATA+4  ; init by SD_Init, used by RW_Sector_CMD
+OrgFAT1         .equ SD_ORG_DATA+6  ; init by SD_Init,
+FATSize         .equ SD_ORG_DATA+8  ; init by SD_Init,
+OrgFAT2         .equ SD_ORG_DATA+10 ; init by SD_Init,
+OrgRootDIR      .equ SD_ORG_DATA+12 ; init by SD_Init, (FAT16 specific)
+OrgClusters     .equ SD_ORG_DATA+14 ; init by SD_Init, Sector of Cluster 0
+SecPerClus      .equ SD_ORG_DATA+16 ; init by SD_Init, byte size
+
+SD_LOW_LEVEL    .equ SD_ORG_DATA+18
 ; ---------------------------------------
 ; SD command
 ; ---------------------------------------
@@ -517,6 +528,8 @@ SDIB_I2CADR     .equ PAD_ORG-4
 SDIB_I2CCNT     .equ PAD_ORG-2
 SDIB_ORG        .equ PAD_ORG
 
+SD_END_DATA     .equ LoadStackEnd
+SD_LEN_DATA     .equ SD_END_DATA-SD_ORG_DATA
 
     .ELSEIF     ; RAM_Size > 1k all is in RAM
 
@@ -534,9 +547,10 @@ SDIB_I2CCNT     .equ SDIB_ORG-2
 SDIB_ORG        .equ LoadStackEnd+4
 SDIB_LEN        .equ 84             ; = TIB_LEN = PAD_LEN
 
+SD_END_DATA     .equ SDIB_ORG+SDIB_LEN
+
     .ENDIF ; RAM_Size
 
-SD_END_DATA     .equ LoadStackEnd
 
     .ENDIF ; SD_CARD_LOADER
 
@@ -974,7 +988,7 @@ xdo         MOV #8000h,X    ;2 compute 8000h-limit "fudge factor"
             MOV TOS,Y       ;1 loop ctr = index+fudge
             MOV @PSP+,TOS   ;2 pop new TOS
             ADD X,Y         ;1
-            .word 01519h    ;4 PUSHM X,Y, i.e. PUSHM LIMIT, INDEX
+            PUSHM #2,X      ;4 PUSHM X,Y, i.e. PUSHM LIMIT, INDEX
             mNEXT           ;4
 
 ;Z (+loop)   n --   R: sys1 sys2 --  | sys1 sys2
@@ -1102,7 +1116,7 @@ LESSNUM     MOV #BASE_HOLD,&HP
 ;https://forth-standard.org/standard/core/UMDivMOD
 ; UM/MOD   udlo|udhi u1 -- r q   unsigned 32/16->16
             FORTHWORD "UM/MOD"
-UMSLASHMOD  PUSH #DROP          ; 3 return address for MU/MOD
+UMSLASHMOD  PUSH #DROP          ;3 as return address for MU/MOD
 
 ; unsigned 32-BIT DiViDend : 16-BIT DIVisor --> 32-BIT QUOTient, 16-BIT REMainder
 ; 2 times faster if DVDhi = 0 (it's the general case)
@@ -1181,7 +1195,7 @@ NUMS        mDOCOL
             mNEXT               ;4 10 words, about 241/417 cycles/char
 
 ;https://forth-standard.org/standard/core/num-end
-;C #>    udlo:udhi=0 -- c-addr u    end conversion, get string
+;C #>    udlo:udhi -- c-addr u    end conversion, get string
             FORTHWORD "#>"
 NUMGREATER  MOV &HP,0(PSP)
             MOV #BASE_HOLD,TOS
@@ -1259,9 +1273,13 @@ CCOMMA      MOV &DDP,W
 ; TERMINAL I/O, input part
 ; ------------------------------------------------------------------------------
 
-;Z (KEY)    -- c      get character from the terminal
-            FORTHWORD "(KEY)"
-PARENKEY    MOV &TERMRXBUF,Y        ; empty buffer
+
+;https://forth-standard.org/standard/core/KEY
+;C KEY      -- c      wait character from input device ; primary DEFERred word
+            FORTHWORD "KEY"
+KEY         MOV @PC+,PC
+            .word   BODYKEY
+BODYKEY     MOV &TERMRXBUF,Y        ; empty buffer
             SUB #2,PSP              ; 1  push old TOS..
             MOV TOS,0(PSP)          ; 4  ..onto stack
             CALL #RXON
@@ -1271,12 +1289,6 @@ KEYLOOP     BIT #UCRXIFG,&TERMIFG   ; loop if bit0 = 0 in interupt flag register
             CALL #RXOFF             ;
             mNEXT
 
-;https://forth-standard.org/standard/core/KEY
-;C KEY      -- c      wait character from input device ; deferred word
-            FORTHWORD "KEY"
-KEY         MOV @PC+,PC
-            .word   PARENKEY
-
 ;-------------------------------------------------------------------------------
 ; INTERPRETER INPUT, the kernel of kernel !
 ;-------------------------------------------------------------------------------
@@ -1291,7 +1303,7 @@ DEFER_INPUT ; CIB (Current Input Buffer) and ACCEPT must to be redirected for SD
 ; CIB           --  addr          of Current Input Buffer
             FORTHWORD "CIB"
 FCIB        mDOCON
-            .WORD    TIB_ORG        ; constant, may be DEFERed as SDIB_ORG by OPEN.
+            .WORD    TIB_ORG        ; constant, may be DEFERred as SDIB_ORG by OPEN.
 
 ; : REFILL CIB DUP TIB_LEN ACCEPT ;   -- CIB CIB len    shared by QUIT and [ELSE]
 REFILL      SUB #6,PSP              ;2
@@ -1305,11 +1317,8 @@ REFILL      SUB #6,PSP              ;2
 ;C ACCEPT  addr addr len -- addr len'  get line at addr to interpret len' chars
             FORTHWORD "ACCEPT"
 ACCEPT      MOV @PC+,PC             ;3
-            .word   PARENACCEPT
-
-;C (ACCEPT)  addr addr len -- addr len'     get len' (up to len) chars from terminal (TERATERM.EXE) via USBtoUART bridge
-            FORTHWORD "(ACCEPT)"
-PARENACCEPT
+            .word   BODYACCEPT
+BODYACCEPT
 
     .ELSE
 
@@ -1347,7 +1356,7 @@ ACCEPT
     .ENDIF                          ;
             MOV #ENDACCEPT,S        ;2              S = ACCEPT XOFF return
             MOV #AKEYREAD1,T        ;2              T = default XON return
-            .word 152Dh             ;5              PUSHM IP,S,T, as IP ret, XOFF ret, XON ret
+            PUSHM #3,IP             ;5              PUSHM IP,S,T, as IP ret, XOFF ret, XON ret
             MOV TOS,W               ;1 -- addr len
             MOV @PSP,TOS            ;2 -- org ptr                                             )
             ADD TOS,W               ;1 -- org ptr   W=Bound                                   )
@@ -1361,15 +1370,15 @@ ACCEPT
             JNZ RXON                ;2                   no : RXON return = AKEYREAD1, to process first char of new line.
 ACCEPTNEXT  ADD #2,RSP              ;1                   yes: remove AKEYREAD1 as XON return,
             MOV #SLEEP,X            ;2                        and set XON return = SLEEP
-            .word 154Dh             ;7                        PUSHM IP,S,T,W,X before SLEEP (and so WAKE on any interrupts)
+            PUSHM #5,IP             ;7                        PUSHM IP,S,T,W,X before SLEEP (and so WAKE on any interrupts)
 ; ----------------------------------;
 RXON                                ;
 ; ----------------------------------;
     .IFDEF TERMINAL3WIRES           ;
-    .IF TERMINALBAUDRATE/FREQUENCY <230400
+;    .IF TERMINALBAUDRATE/FREQUENCY <230400
 RXON_LOOP   BIT #UCTXIFG,&TERMIFG   ;3  wait the sending end of XON, useless at high baudrates
             JZ RXON_LOOP            ;2
-    .ENDIF
+;    .ENDIF
             MOV #17,&TERMTXBUF      ;4  move char XON into TX_buf
     .ENDIF                          ;
     .IFDEF TERMINAL4WIRES           ;
@@ -1398,12 +1407,8 @@ RXOFF                               ;
 ; ----------------------------------;
     ASMWORD "SLEEP"                 ; may be redirected
 SLEEP       MOV @PC+,PC             ;3
-            .word   PARENSLEEP      ;
-; ----------------------------------;
-
-; ----------------------------------;
-    ASMWORD "(SLEEP)"               ;
-PARENSLEEP  BIS &LPM_MODE,SR        ;3  enter in LPMx sleep mode with GIE=1
+            .word   BODYSLEEP      ;
+BODYSLEEP  BIS &LPM_MODE,SR        ;3  enter in LPMx sleep mode with GIE=1
 ; ----------------------------------;   default FAST FORTH mode (for its input terminal use) : LPM0.
 
 ;###############################################################################################################
@@ -1440,7 +1445,7 @@ TERMINAL_INT                        ; <--- TEMR RX interrupt vector, delayed by
 ; (ACCEPT) part II under interrupt  ; Org Ptr -- len'
 ; ----------------------------------;
             ADD #4,RSP              ;1  remove SR and PC from stack, SR flags are lost (unused by FORTH interpreter)
-            .word   173Ah           ;6  POPM ;W=buffer_bound, T=0Dh,S=20h, IP=AYEMIT_RET
+            POPM #4,IP              ;6  POPM W=buffer_bound, T=0Dh,S=20h, IP=AYEMIT_RET
 ; vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv;
 ; starts the 2th stopwatch          ;
 ; ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
@@ -1473,10 +1478,10 @@ ASTORETEST  CMP W,TOS               ; 1 Bound is reached ?
             MOV.B Y,0(TOS)          ; 3 no: store char @ Ptr, send echo then loopback
             ADD #1,TOS              ; 1     increment Ptr
 YEMIT1
-    .IF TERMINALBAUDRATE/FREQUENCY <230401
+;    .IF TERMINALBAUDRATE/FREQUENCY <230401
             BIT #UCTXIFG,&TERMIFG   ; 3 wait the sending end of previous char (sent before ACCEPT), useless at high baudrates
             JZ YEMIT1               ; 2
-    .ENDIF
+;    .ENDIF
 YEMIT2
     .IFDEF  TERMINAL5WIRES          ;
             BIT.B #CTS,&HANDSHAKIN  ; 3
@@ -1507,7 +1512,7 @@ ACCEPTEND   SUB @PSP+,TOS           ; Org Ptr -- len'
             MOV @RSP+,IP            ; 2 and continue with INTERPRET with GIE=0.
                                     ; So FORTH machine is protected against any interrupt...
     .IFDEF TOTAL
-            .word 1734h             ;6              pop R4,R5,R6,R7
+            POPM #4,R7              ;6              pop R4,R5,R6,R7
     .ENDIF
             mNEXT                   ; ...until next falling down to LPMx mode of (ACCEPT) part1,
 ; **********************************;    i.e. when the FORTH interpreter has no more to do.
@@ -1516,22 +1521,17 @@ ACCEPTEND   SUB @PSP+,TOS           ; Org Ptr -- len'
 ; TERMINAL I/O, output part
 ; ------------------------------------------------------------------------------
 
-
-;Z (EMIT)   c --    output character (byte) to the terminal
-; hardware or software control on TX flow seems not necessary with UARTtoUSB bridges because
-; they stop TX when their RX buffer is full. So no problem when the terminal input is echoed to output.
-            FORTHWORD "(EMIT)"
-PARENEMIT   MOV TOS,Y               ; 1
+;https://forth-standard.org/standard/core/EMIT
+;C EMIT     c --    output character to the output device ; primary DEFERred word
+            FORTHWORD "EMIT"
+EMIT        MOV @PC+,PC             ;3  15~
+            .word   BODYEMIT
+BODYEMIT   MOV TOS,Y               ; 1
             MOV @PSP+,TOS           ; 2
             JMP YEMIT1              ;9  12~
 
     .ENDIF  ; HALFDUPLEX
 
-;https://forth-standard.org/standard/core/EMIT
-;C EMIT     c --    output character to the output device ; deferred word
-            FORTHWORD "EMIT"
-EMIT        MOV @PC+,PC             ;3  15~
-            .word   PARENEMIT
 
 ;Z ECHO     --      connect console output (default)
             FORTHWORD "ECHO"
@@ -1585,23 +1585,20 @@ TYPE_NEXT   FORTHtoASM
             SUB #2,IP               ;1
             SUB #1,2(RSP)           ;4 len-1
             JNZ TYPELOOP            ;2
-            .word   0171Dh          ;5 POPM IP,TOS
+            POPM #2,TOS             ;4 POPM IP,TOS
 TWODROP     ADD #2,PSP              ;
             MOV @PSP+,TOS           ; -- 
             mNEXT                   ;
 
-; (CR)     --               send CR+LF to the output terminal (via TYPE)
-            FORTHWORD "(CR)"
-PARENCR     mDOCOL
-            .word   XSQUOTE
-            .byte   2,13,10
-            .word   TYPE,EXIT
-
 ;https://forth-standard.org/standard/core/CR
 ;C CR      --               send CR to the output device
             FORTHWORD "CR"
 CR          MOV @PC+,PC
-            .word   PARENCR
+            .word   BODYCR
+BODYCR     mDOCOL
+            .word   XSQUOTE
+            .byte   2,13,10
+            .word   TYPE,EXIT
 
 ; ------------------------------------------------------------------------------
 ; STRINGS PROCESSING
@@ -1901,7 +1898,7 @@ QQNUMDP     CMP.B #'.',0(S)         ;4                                  rejected
     .ENDIF
 
 ; ----------------------------------;88
-QNUMNEXT1   .word   0172Bh          ;4 -- c-addr ud2lo-hi x cnt2        POPM T,S,IP  S = sign flag = {-1;0}
+QNUMNEXT1   POPM #3,IP              ;4 -- c-addr ud2lo-hi x cnt2        POPM T,S,IP  S = sign flag = {-1;0}
             MOV S,TOS               ;1 -- c-addr ud2lo-hi x sign
             MOV T,&BASE             ;3
             JZ QNUMOK               ;2 -- c-addr ud2lo-hi x sign        conversion OK
@@ -1980,7 +1977,7 @@ UMSTARNEXT2 FORTHtoASM              ; -- ud1lo ud1hi x ud4hi    r-- IP adr count
 MPLUS       ADDC @RSP+,TOS          ; -- ud1lo ud1hi x ud2hi    TOS = ud4hi+ud3lo+carry = ud2hi
             MOV X,4(PSP)            ; -- ud2lo ud1hi x ud2hi           
             MOV TOS,2(PSP)          ; -- ud2lo ud2hi x x        R-- IP adr count 
-            .word 172Bh             ; -- ud2lo ud2hi x x        T=count, S=adr  POPM T,S,IP
+            POPM #3,IP              ; -- ud2lo ud2hi x x        T=count, S=adr  POPM T,S,IP
 TONUMPLUS   ADD #1,S                ;
             SUB #1,T                ;
             JNZ TONUMLOOP           ; -- ud2lo ud2hi x x        S=adr+1, T=count-1, X=ud2lo
@@ -2083,7 +2080,7 @@ QNUMDPFOUND SUB #2,IP               ;1                                      set
     .ENDIF
 
 ; ----------------------------------;97
-QNUMNEXT1   .word 0172Bh            ;4 -- c-addr ud2lo-hi x cnt2        POPM T,S,IP   S = sign flag = {-1;0}
+QNUMNEXT1   POPM #3,IP              ;4 -- c-addr ud2lo-hi x cnt2        POPM T,S,IP   S = sign flag = {-1;0}
             MOV S,TOS               ;1 -- c-addr ud2lo-hi x sign
             MOV T,&BASE             ;3
             JZ QNUMOK               ;2 -- c-addr ud2lo-hi x sign        conversion OK
@@ -2196,7 +2193,7 @@ EVALUATE    MOV #SOURCE_LEN,X       ;2
             MOV @X+,S               ;2 S = SOURCE_LEN
             MOV @X+,T               ;2 T = SOURCE_ADR
             MOV @X+,W               ;2 W = TOIN
-            .word 153Dh             ;6 PUSHM IP,S,T,W
+            PUSHM #4,IP             ;6 PUSHM IP,S,T,W
             ASMtoFORTH
             .word   INTERPRET
             FORTHtoASM
@@ -2236,15 +2233,13 @@ BOOT    MOV #RSTACK,RSP
 ; ----------------------------------;
 
 ;https://forth-standard.org/standard/core/QUIT
-;c QUIT  --     interpret line by line the input stream, but may be redirected as here:
+;c QUIT  --     interpret line by line the input stream, primary DEFERred word
         FORTHWORD "QUIT"
 QUIT    MOV @PC+,PC
-        .word   BOOT
+        .word   BODYQUIT           ; this word may be replaced by BOOT
+BODYQUIT
 
-        FORTHWORD "(QUIT)"
-PARENQUIT
-
-    .ELSE ; no BOOTLOADER, QUIT is not defered
+    .ELSE ; no BOOTLOADER, QUIT is not DEFERred
 ;https://forth-standard.org/standard/core/QUIT
 ;c QUIT  --     interpret line by line the input stream
         FORTHWORD "QUIT"
@@ -2282,26 +2277,26 @@ QUIT4       .word   INTERPRET
 ABORT       MOV #PSTACK,PSP
             JMP QUIT
 
-WIP_DEFER   ; WIPE resets ALL factory defered words
-            MOV #PARENWARM,&WARM+2      ; (WARM) is WARM    kill user interrupts init
-            MOV #PARENSLEEP,&SLEEP+2    ; (SLEEP) is SLEEP  kill user background task
-
-QAB_DEFER   ; QABORT resets some defered words 
-            MOV #PARENEMIT,&EMIT+2      ;4 (EMIT) is EMIT   default console output
-            MOV #PARENCR,&CR+2          ;4 (CR) is CR       default CR
-            MOV #PARENKEY,&KEY+2        ;4 (KEY) is KEY     default KEY
+WIP_DEFER   ; WIPE resets ALL factory primary DEFERred words
+            MOV #BODYWARM,&WARM+2      ; (WARM) is WARM    kill user interrupts init
+            MOV #BODYSLEEP,&SLEEP+2    ; (SLEEP) is SLEEP  kill user background task
+QAB_DEFER   ; QABORT resets some primary DEFERred words 
+            MOV #BODYEMIT,&EMIT+2      ;4 (EMIT) is EMIT   default console output
+            MOV #BODYCR,&CR+2          ;4 (CR) is CR       default CR
+            MOV #BODYKEY,&KEY+2        ;4 (KEY) is KEY     default KEY
 
     .IFDEF DEFER_INPUT                  ;  true if SD_LOADER
             MOV #TIB_ORG,&FCIB+2        ;4 TIB is CIB  (Current Input Buffer)
-            MOV #PARENACCEPT,&ACCEPT+2  ;4 (ACCEPT) is ACCEPT
+            MOV #BODYACCEPT,&ACCEPT+2  ;4 (ACCEPT) is ACCEPT
     .ENDIF
     .IFDEF MSP430ASSEMBLER          ; reset all branch labels
-            MOV #0,&CLRBW1          ;3
-            MOV #0,&CLRBW2          ;3
-            MOV #0,&CLRBW3          ;3
-            MOV #0,&CLRFW1          ;3
-            MOV #0,&CLRFW2          ;3
-            MOV #0,&CLRFW3          ;3
+            MOV #10,Y
+            MOV Y,&BASE
+RAZASM      MOV #0,ASMFW1(Y)
+            SUB #2,Y
+            JHS RAZASM
+    .ELSE
+            MOV #10,&BASE           ;4
     .ENDIF  
             MOV #10,&BASE           ;4
             RET
@@ -2331,7 +2326,7 @@ QABORTCLOSEND
 ; ----------------------------------;
 QABORTYESNOECHO                     ; <== WARM jumps here, thus, if NOECHO, TERMINAL can be disconnected without freezing the app
 ; ----------------------------------;
-            CALL #QAB_DEFER         ; restore default deferred words ....else WARM and SLEEP.
+            CALL #QAB_DEFER         ; restore default part of primary DEFERred words ....except WARM and SLEEP.
 ; ----------------------------------;
 QABORTTERM                          ; wait the end of source file downloading
 ; ----------------------------------;
@@ -2503,14 +2498,15 @@ SEMICOLON   CMP #0,&STATE           ; in interpret mode semicolon becomes a comm
 ;https://forth-standard.org/standard/core/ColonNONAME
 ;CE :NONAME        -- xt
         FORTHWORD ":NONAME"
-            SUB #2,PSP
+COLONNONAME SUB #2,PSP
             MOV TOS,0(PSP)
             MOV &DDP,TOS
             MOV TOS,W
-            MOV #OPCODE,X           ; X = OPCODE as lure for semicolon LAST_THREAD REVEAL
-            MOV #ASMTYPE,Y          ; Y = ASMTYPE as lure for semicolon LAST_NFA REVEAL
-            CALL #HEADEREND
-    .ENDIF 
+            MOV #PAIN,X             ; PAIN is a read only register in all MSP430FRxxxx devices...
+            MOV X,Y                 ; so, MOV Y,0(X) writes to a read only register = lure for semicolon LAST_THREAD REVEAL...      
+            ADD #2,Y                ; so, MOV @X,-2(Y) writes to same register = lure for semicolon LAST_NFA REVEAL...
+            CALL #HEADEREND         ; ...because we don't want write preamble of word in dictionnary!
+    .ENDIF ; NONAME
 COLONNEXT
     .SWITCH DTC
     .CASE 1
@@ -2528,7 +2524,7 @@ COLONNEXT
     .ENDCASE ; of DTC
             MOV #-1,&STATE          ; enter compiling state
 SAVE_PSP    MOV PSP,&LAST_PSP       ; save PSP for check compiling, used by QREVEAL
-            mNEXT
+PFA_DEFER   mNEXT
 
 ;https://forth-standard.org/standard/core/Colon
 ;C : <name>     --      begin a colon definition
@@ -2556,7 +2552,10 @@ HEADER      mDOCOL
             ADD TOS,X               ; -- xxx        TOS= Thread   X=VOC_PFAx = thread x of VOC_PFA of CURRENT
     .ENDCASE
             MOV @PSP+,TOS           ; --
-            MOV @RSP+,IP  
+            MOV @RSP+,IP
+            MOV #4030h,0(W)        ;4              by default, HEADER create a DEFERred word: CFA = MOV @PC+,PC = BR...
+            MOV #PFA_DEFER,2(W)    ;4              by default, HEADER create a DEFERred word: PFA = address of NEXT to do nothing.
+  
 HEADEREND   MOV Y,&LAST_NFA         ; --            NFA --> LAST_NFA            used by QREVEAL, IMMEDIATE
             MOV X,&LAST_THREAD      ; --            VOC_PFAx --> LAST_THREAD    used by QREVEAL
             MOV W,&LAST_CFA         ; --            HERE=CFA --> LAST_CFA       used by DOES>, RECURSE
@@ -2622,7 +2621,7 @@ DOES        MOV &LAST_CFA,W         ; W = CFA of CREATEd word
             MOV #DODOES,0(W)        ; replace CFA (DOCON) by new CFA (DODOES)
             MOV IP,2(W)             ; replace PFA by the address after DOES> as execution address
             MOV @RSP+,IP            ; exit of the new created word
-PFA_DEFER   mNEXT
+            mNEXT
 
 ;https://forth-standard.org/standard/core/DEFER
 ;C DEFER "<spaces>name"   -- 
@@ -2634,11 +2633,17 @@ PFA_DEFER   mNEXT
 ;until the phrase ' word IS name is executed, causing a new value of xt to be assigned to name.
 
             FORTHWORD "DEFER"
-DEFER       CALL #HEADER   
-            MOV #4030h,-4(W)        ;4  CFA = MOV @PC+,PC = BR...
-            MOV #PFA_DEFER,-2(W)    ;4  PFA = address of NEXT: created word does nothing by default
+DEFER       CALL #HEADER             ; that create a secondary DEFERred word (whithout subsequent code)
+;            MOV #4030h,-4(W)        ;4  CFA = MOV @PC+,PC = BR...
+;            MOV #PFA_DEFER,-2(W)    ;4  PFA = address of NEXT: created word does nothing by default
             JMP REVEAL             
 
+;https://forth-standard.org/standard/core/toBODY
+; >BODY     -- PFA      leave BODY of a CREATEd or a primary DEFERred word
+            FORTHWORD ">BODY"
+            ADD     #4,TOS
+            mNEXT
+
     .IFDEF CONDCOMP
 
 ; ------------------------------------------------------------------------------
@@ -2840,9 +2845,9 @@ VOCDOES     .word   LIT,CONTEXT,STORE
     .IFDEF VOCABULARY_SET
             FORTHWORD "FORTH"
     .ENDIF ; VOCABULARY_SET
-FORTH       mDODOES                     ; leave FORTH_BODY on the stack and run VOCDOES
+FORTH       mDODOES                     ; leave BODYFORTH on the stack and run VOCDOES
             .word   VOCDOES
-FORTH_BODY  .word   lastforthword
+BODYFORTH   .word   lastforthword
     .SWITCH THREADS
     .CASE   2
             .word   lastforthword1
@@ -2916,7 +2921,7 @@ voclink         .set    $-2
     .IFDEF VOCABULARY_SET
             FORTHWORD "ALSO"
     .ENDIF ; VOCABULARY_SET
-ALSO        MOV #14,W               ; -- move up 7 words
+ALSO        MOV #12,W               ; -- move up 6 words, 8th word of CONTEXT area must remain to 0
             MOV #CONTEXT,X          ; X=src
             MOV #CONTEXT+2,Y        ; Y=dst
             JMP MOVEUP              ; src < dst
@@ -2925,7 +2930,7 @@ ALSO        MOV #14,W               ; -- move up 7 words
     .IFDEF VOCABULARY_SET
             FORTHWORD "PREVIOUS"
     .ENDIF ; VOCABULARY_SET
-PREVIOUS    MOV #14,W               ; -- move down 7 words
+PREVIOUS    MOV #14,W               ; move down 7 words, with recopy of the 8th word equal to 0
             MOV #CONTEXT+2,X        ; X=src
             MOV #CONTEXT,Y          ; Y=dst
             JMP MOVEDOWN            ; src > dst
@@ -3008,13 +3013,24 @@ RST_HERE    MOV &LASTVOC,&INIVOC
             MOV &DDP,&INIDP
             JMP PWR_HERE            ; ...and also for power ON...
 
+;            FORTHWORD "WIPE"        ; restore the program as it was in forthMSP430FR.txt file
+;WIPE        MOV #SIGNATURES,X       ; reset JTAG and BSL signatures   ; unlock JTAG, SBW and BSL
+;SIGNLOOP    MOV #-1,0(X)            ; reset signature; WARNING ! DON'T CHANGE THIS IMMEDIATE VALUE !
+;            ADD #2,X
+;            CMP #INTVECT,X
+;            JNZ SIGNLOOP
+;            CALL #WIP_DEFER         ; set default execute part of all factory primary DEFERred words
+;            MOV #ROMDICT,&INIDP     ; reinit this 2 factory values
+;            MOV #lastvoclink,&INIVOC
+;            JMP RST_STATE           ; then execute RST_STATE and PWR_STATE
+
             FORTHWORD "WIPE"        ; restore the program as it was in forthMSP430FR.txt file
-WIPE        MOV #SIGNATURES,X       ; reset JTAG and BSL signatures   ; unlock JTAG, SBW and BSL
-SIGNLOOP    MOV #-1,0(X)            ; reset signature; WARNING ! DON'T CHANGE THIS IMMEDIATE VALUE !
-            ADD #2,X
-            CMP #INTVECT,X
+WIPE                                ; reset JTAG and BSL signatures   ; unlock JTAG, SBW and BSL
+            MOV #16,X               ; max known SIGNATURES length = 10
+SIGNLOOP    SUB #2,X
+            MOV #-1,SIGNATURES(X)   ; reset signature; WARNING ! DON'T CHANGE THIS IMMEDIATE VALUE !
             JNZ SIGNLOOP
-            CALL #WIP_DEFER         ; reinit all DEFERed words
+            CALL #WIP_DEFER         ; set default execute part of all factory primary DEFERred words
             MOV #ROMDICT,&INIDP     ; reinit this 2 factory values
             MOV #lastvoclink,&INIVOC
             JMP RST_STATE           ; then execute RST_STATE and PWR_STATE
@@ -3023,11 +3039,12 @@ SIGNLOOP    MOV #-1,0(X)            ; reset signature; WARNING ! DON'T CHANGE TH
 ; forthMSP430FR : WARM
 ; ------------------------------------------------------------------------------
 
-;Z (WARM)   --      ; init some user variables,
-                    ; print start message if ECHO is set,
-                    ; then ABORT
-            FORTHWORD "(WARM)"
-PARENWARM 
+;Z WARM   --    ; deferred word used to init your application
+                ; define this word:  : START ...init app here... LIT RECURSE IS WARM (WARM) ;
+            FORTHWORD "WARM"
+WARM        MOV @PC+,PC                 ;3
+            .word   BODYWARM
+BODYWARM 
 ;            SUB     #4,PSP
 ;            MOV     &SYSSNIV,0(PSP)
 ;            MOV     &SYSUNIV,2(PSP)
@@ -3048,43 +3065,36 @@ PARENWARM
             .word   QABORTYESNOECHO     ; NOECHO state enables any app to execute COLD or WARM without terminal connexion
 
 
-;Z WARM   --    ; deferred word used to init your application
-                ; define this word:  : START ...init app here... LIT RECURSE IS WARM (WARM) ;
-            FORTHWORD "WARM"
-WARM        MOV @PC+,PC                 ;3
-            .word   PARENWARM
 
 ;-------------------------------------------------------------------------------
-; RESET : Target Init, limited to FORTH usage : I/O, FRAM, RTC
-; all others I/O are set as input with pullup resistor
+; RESET : Initialisation limited to FORTH usage : I/O, RAM, RTC
+; all unused I/O are set as input with pullup resistor
 ;-------------------------------------------------------------------------------
 
 ;Z COLD     --      performs a software reset
             FORTHWORD "COLD"
 COLD        MOV #0A500h+PMMSWBOR,&PMMCTL0
 
-
 RESET
     .include "Target.asm"   ; include target specific init code
 
 
-; reset all interrupt vectors to RESET vector
-            MOV #RESET,W            ; W = reset vector
-            MOV #INTVECT,X          ; interrupt vectors base address
-RESETINT    MOV W,0(X)           
-            ADD #2,X             
-            JNZ RESETINT            ; endloop when X = 0
+; fill all interrupt vectors with RESET
+            MOV #VECTLEN,X          ; length of vectors area    
+RESETINT    SUB #2,X
+            MOV #RESET,INTVECT(X)   ; begin at end of area          
+            JNZ RESETINT            ; endloop when INTVECT(X) = INTVECT
 
 ; reset default TERMINAL vector interrupt and LPM0 mode for terminal use
-            MOV &INI_TERM,&TERMVEC
+            MOV #TERMINAL_INT,&TERMVEC
             MOV #CPUOFF+GIE,&LPM_MODE
 
 ; init RAM
-            MOV #RAMSTART,X
-INITRAM     MOV #0,0(X)
-            ADD #2,X
-            CMP #RAMEND,X
-            JLO INITRAM             ; 8~ loop
+            MOV #RAMLEN,X
+INITRAM     SUB #2,X
+            MOV #0,RAMSTART(X)
+            JNZ INITRAM             ; 6~ loop
+
 ;-------------------------------------------------------------------------------
 ; RESET : INIT FORTH machine
 ;-------------------------------------------------------------------------------
@@ -3120,9 +3130,8 @@ TERM_INIT
 ; RESET : INIT TERM_UART
 ;-------------------------------------------------------------------------------
     MOV #0081h,&TERMCTLW0           ; Configure TERM_UART  UCLK = SMCLK
-
-    .include "TERMINALBAUDRATE.asm" ; configure baudrate, no registers used
-
+    MOV &TERMBRW_RST,&TERMBRW       ; RST value in FRAM
+    MOV &TERMMCTLW_RST,&TERMMCTLW   ; RST value in FRAM
     BIS.B #TERM_BUS,&TERM_SEL       ; Configure pins TXD & RXD for TERM_UART (PORTx_SEL0 xor PORTx_SEL1)
                                     ; TERM_DIR is controlled by eUSCI_Ax module
     BIC #UCSWRST,&TERMCTLW0         ; release from reset...

diff --git a/forthMSP430FR_ASM.asm b/forthMSP430FR_ASM.asm
index 716a2fe..f96051a 100644 (file)
--- a/forthMSP430FR_ASM.asm
+++ b/forthMSP430FR_ASM.asm
@@ -33,13 +33,15 @@
 ;       MOV(.B) &EDE,&TON is coded as follow: MOV(.B) EDE(R2),TON(R2)   ; (R2=0), three words   AS=01, AD=1 x(reg) mode
 ; ----------------------------------------------------------------------
 
-; PUSHM order : R15,R14,R13,R12,R11,R10, R9, R8, R7, R6, R5, R4 (TI's reg)
-; or          : PSP,TOS, IP,  S,  T,  W,  X,  Y, R7, R6, R5, R4 (FastForth reg)
-; example : PUSHM IP,Y or PUSHM R13,R8
+; PUSHM order : PSP,TOS, IP,  S,  T,  W,  X,  Y, rEXIT,rDOVAR,rDOCON, rDODOES, R3, SR,RSP, PC
+; PUSHM order : R15,R14,R13,R12,R11,R10, R9, R8,  R7  ,  R6  ,  R5  ,   R4   , R3, R2, R1, R0
 
-; POPM  order :  R4, R5, R6, R7, R8, R9,R10,R11,R12,R13,R14,R15 (TI's reg)
-; or          :  R4, R5, R6, R7,  Y,  X,  W,  T,  S, IP,TOS,PSP (FastForth reg)
-; example : POPM Y,IP or POPM R8,R13
+; example : PUSHM #6,IP pushes IP,S,T,W,X,Y registers to return stack
+;
+; POPM  order :  PC,RSP, SR, R3, rDODOES,rDOCON,rDOVAR,rEXIT,  Y,  X,  W,  T,  S, IP,TOS,PSP
+; POPM  order :  R0, R1, R2, R3,   R4   ,  R5  ,  R6  ,  R7 , R8, R9,R10,R11,R12,R13,R14,R15
+
+; example : POPM #6,IP   pop Y,X,W,T,S,IP registers from return stack
 
 ; ----------------------------------------------------------------------
 ; DTCforthMSP430FR5xxx ASSEMBLER : STRUCTURE
@@ -49,9 +51,9 @@
     .IFDEF VOCABULARY_SET
             FORTHWORD "ASSEMBLER"
     .ENDIF ; VOCABULARY_SET
-ASSEMBLER       mDODOES             ; leave ASSEMBLER_BODY on the stack and run VOCDOES
+ASSEMBLER       mDODOES             ; leave BODYASSEMBLER on the stack and run VOCDOES
                 .word   VOCDOES
-ASSEMBLER_BODY  .word   lastasmword ; here is the structure created by VOCABULARY
+BODYASSEMBLER   .word   lastasmword ; here is the structure created by VOCABULARY
     .SWITCH THREADS
     .CASE   2
                 .word   lastasmword1
@@ -136,7 +138,7 @@ HI2LONEXT   .word   ALSO,ASSEMBLER
            FORTHWORD "CODE"     ; a CODE word must be finished with ENDCODE
 ASMCODE     CALL #HEADER        ;
             SUB #4,&DDP         ;
-            mDOCOL
+ASMCODE1    mDOCOL
             .word   SAVE_PSP
             .word   BRAN,HI2LONEXT
 
@@ -151,7 +153,7 @@ ENDCODE     mDOCOL
                                 ; ASM words are only usable in another ASSEMBLER words
                                 ; an ASM word must be finished with ENDASM
             MOV     &CURRENT,&SAV_CURRENT
-            MOV     #ASSEMBLER_BODY,&CURRENT
+            MOV     #BODYASSEMBLER,&CURRENT
             JMP     ASMCODE
 
             asmword "ENDASM"    ; end of an ASM word
@@ -198,6 +200,21 @@ COLON2      MOV #-1,&STATE      ; enter in compile state
             JMP COLON1
     .ENDCASE
 
+            .IFDEF NONAME
+
+            FORTHWORD "CODENNM"  ; CODENoNaMe is the assembly counterpart of :NONAME
+CODENNM     mDOCOL
+            .word COLONNONAME,LEFTBRACKET
+            FORTHtoASM
+            MOV @RSP+,IP
+            SUB #4,W            ; to remove DEFER snippet
+            MOV W,&DDP
+            JMP ASMCODE1
+
+            .ENDIF ; NONAME
+
+
+
 ;;Z SKIP      char -- addr               ; skip all occurring character 'char' in input stream
 ;            FORTHWORD "SKIP"            ; used by assembler to parse input stream
 SKIP:       MOV     #SOURCE_LEN,Y       ;
@@ -219,43 +236,47 @@ SKIPEND:    MOV     W,TOS               ; -- addr
 ; DTCforthMSP430FR5xxx ASSEMBLER : search argument "xxxx", IP is free
 ; ----------------------------------------------------------------------
 
-; Search ARG of "#xxxx,"                    ; <== PARAM10
-; Search ARG of "&xxxx,"                    ; <== PARAM111
-; Search ARG of "xxxx(REG),"                ; <== PARAM130
-; Search ARG of ",&xxxx"                    ; <== PARAM111 <== PARAM20
-; Search ARG of ",xxxx(REG)"                ; <== PARAM210
-SearchARG   ASMtoFORTH                      ; -- separator      search word first
-            .word   WORDD,FIND              ; -- c-addr
-            .word   QZBRAN,SearchARGW       ; -- c-addr         if found
-            .word   QNUMBER                 ;
-            .word   QBRAN,NotFound          ; -- c-addr
-            .word   AsmSrchEnd              ; -- value          goto end if number found
-SearchARGW  FORTHtoASM                      ; -- xt             xt = CFA
+; Search ARG of "#xxxx,"                ; <== PARAM10
+; Search ARG of "&xxxx,"                ; <== PARAM111
+; Search ARG of "xxxx(REG),"            ; <== PARAM130
+; Search ARG of ",&xxxx"                ; <== PARAM111 <== PARAM20
+; Search ARG of ",xxxx(REG)"            ; <== PARAM210
+SearchARG   PUSHM #2,S                ;                   PUSHM S,T
+            ASMtoFORTH                  ; -- separator      search word first
+            .word   WORDD,FIND          ; -- c-addr
+            .word   QZBRAN,SearchARGW   ; -- c-addr         if found
+            .word   QNUMBER             ;
+            .word   QBRAN,NotFound      ; -- c-addr         ABORT
+            .word   SearchEnd           ; -- value          goto end if number found
+SearchARGW  FORTHtoASM                  ; -- xt             xt = CFA
             MOV     @TOS,X
 QDOVAR      CMP     #DOVAR,X
             JNZ     QDOCON
-            ADD     #2,TOS                  ; remplace CFA by PFA for VARIABLE words
-            RET
+            ADD     #2,TOS              ; remplace CFA by PFA for VARIABLE words
+            JMP     SearchEnd
 QDOCON      CMP     #DOCON,X
             JNZ     QDODOES
-            MOV     2(TOS),TOS              ; remplace CFA by [PFA] for CONSTANT (and CREATEd) words
-            RET
+            MOV     2(TOS),TOS          ; remplace CFA by [PFA] for CONSTANT (and CREATEd) words
+            JMP     SearchEnd
 QDODOES     CMP     #DODOES,X
-            JNZ     AsmSrchEnd
-            ADD     #4,TOS                  ; leave BODY address for DOES words
-AsmSrchEnd  RET                             ;
+            JNZ     SearchEnd
+            ADD     #4,TOS              ; leave BODY address for DOES words
+SearchEnd   POPM    #2,S                ; POPM T,S
+            RET                         ;
 
 ; ----------------------------------------------------------------------
 ; DTCforthMSP430FR5xxx ASSEMBLER : search REG
 ; ----------------------------------------------------------------------
 
-; STOre ARGument xxxx of "xxxx(REG),"       ; <== PARAM130
-; STOre ARGument xxxx of ",xxxx(REG)"       ; <== PARAM210
-StoARGsearchREG
+; compute "xxxx(REG),"          ; <== PARAM130
+; compute ",xxxx(REG)"          ; <== PARAM210
+ComputeARGParenREG
+            MOV #'(',TOS        ; -- "("        as WORD separator to find xxxx of "xxxx(REG),"
+            CALL #SearchARG     ; -- xxxx       aborted if not found
             MOV &DDP,X
             ADD #2,&DDP
-            MOV TOS,0(X)                    ; -- xxxx       compile xxxx
-            MOV #')',TOS                    ; -- ")"        prepare separator to search REG of "xxxx(REG)"
+            MOV TOS,0(X)        ; -- xxxx       compile xxxx
+            MOV #')',TOS        ; -- ")"        prepare separator to search REG of "xxxx(REG)"
 
 ; search REG of "xxxx(REG),"    separator = ')'  ;
 ; search REG of ",xxxx(REG)"    separator = ')'  ;
@@ -264,21 +285,22 @@ StoARGsearchREG
 ; search REG of "REG,"          separator = ','  ; <== PARAM13
 ; search REG of ",REG"          separator = ' '  ; <== PARAM21
 
-SearchREG   PUSH    &TOIN                   ; -- separator  save >IN
-            ADD     #1,&TOIN                ;               skip "R"
-            ASMtoFORTH                      ;               search xx of Rxx
-            .word   WORDD,QNUMBER           ;
-            .word   QBRAN,notREG            ; -- xxxx       if number found
-            FORTHtoASM                      ; -- c-addr     if number not found
-            ADD     #2,RSP                  ;           remove >IN
-            CMP     #16,TOS                 ; -- 000R   register > 15 ?
-            JHS     BOUNDERROR              ;           yes : abort
-            RET                             ; -- 000R   Z=0 ==> found
-
-notREG      FORTHtoASM                      ; -- c-addr
-            MOV     @RSP+,&TOIN             ; -- c-addr          restore >IN
-            BIS     #Z,SR                   ;           Z=1 ==> not found
-            RET                             ; -- c_addr
+SearchREG   PUSHM #2,S          ;               PUSHM S,T
+            PUSH &TOIN          ; -- separator  save >IN
+            ADD #1,&TOIN        ;               skip "R"
+            ASMtoFORTH          ;               search xx of Rxx
+            .word WORDD,QNUMBER ;
+            .word QBRAN,NOTaREG ; -- xxxx       if Not a Number
+            FORTHtoASM          ; -- c-addr     number is found
+            ADD #2,RSP          ;               remove >IN
+            CMP #16,TOS         ; -- 000R       register > 15 ?
+            JHS BOUNDERROR      ;               yes : abort
+            JLO SearchEnd       ; -- 000R       Z=0 ==> found
+
+NOTaREG     FORTHtoASM          ; -- c-addr     Z=1
+            MOV @RSP+,&TOIN     ; -- c-addr          restore >IN
+            JMP SearchEnd       ; -- c_addr     Z=1 ==> not a register 
+
 
 ; ----------------------------------------------------------------------
 ; DTCforthMSP430FR5xxx ASSEMBLER : INTERPRET FIRST OPERAND
@@ -290,8 +312,8 @@ notREG      FORTHtoASM                      ; -- c-addr
 PARAM1      mDOCOL                          ; -- sep
             .word   FBLANK,SKIP             ; -- sep c-addr
             FORTHtoASM                      ; -- sep c-addr
-            MOV     #0,&ASMTYPE             ; -- sep c-addr        reset ASMTYPE
-            MOV     &DDP,&OPCODE            ; -- sep c-addr        HERE --> OPCODE (opcode is preset to its address !)
+            MOV     #0,S                    ; -- sep c-addr        reset ASMTYPE
+            MOV     &DDP,T                  ; -- sep c-addr        HERE --> OPCODEADR (opcode is preset to its address !)
             ADD     #2,&DDP                 ; -- sep c-addr        cell allot for opcode
             MOV     TOS,W                   ; -- sep c-addr        W=c-addr
             MOV     @PSP+,TOS               ; -- sep               W=c-addr
@@ -305,41 +327,41 @@ PARAM10     ADD     #1,&TOIN                ; -- sep        skip # prefix
 PARAM100    CMP #0,TOS                      ; -- xxxx       = 0 ?
             JNE PARAM101
 ; case of "#0,"
-            MOV #0300h,&ASMTYPE             ; -- 0          example : MOV #0,dst <=> MOV R3,dst
+            MOV #0300h,S                    ; -- 0          example : MOV #0,dst <=> MOV R3,dst
             JMP PARAMENDOF
 
 PARAM101    CMP #1,TOS                      ; -- xxxx       = 1 ?
             JNE PARAM102
 ; case of "#1,"
-            MOV #0310h,&ASMTYPE             ; -- 1          example : MOV #1,dst <=> MOV 0(R3),dst
+            MOV #0310h,S                    ; -- 1          example : MOV #1,dst <=> MOV 0(R3),dst
             JMP PARAMENDOF
 
 PARAM102    CMP #2,TOS                      ; -- xxxx       = 2 ?
             JNE PARAM104
 ; case of "#2,"
-            MOV #0320h,&ASMTYPE             ; -- 2          ASMTYPE = 0320h  example : MOV #2, <=> MOV @R3,
+            MOV #0320h,S                    ; -- 2          ASMTYPE = 0320h  example : MOV #2, <=> MOV @R3,
             JMP PARAMENDOF
 
 PARAM104    CMP #4,TOS                      ; -- xxxx       = 4 ?
             JNE PARAM108
 ; case of "#4,"
-            MOV #0220h,&ASMTYPE             ; -- 4          ASMTYPE = 0220h  example : MOV #4, <=> MOV @SR,
+            MOV #0220h,S                    ; -- 4          ASMTYPE = 0220h  example : MOV #4, <=> MOV @SR,
             JMP PARAMENDOF
 
 PARAM108    CMP #8,TOS                      ; -- xxxx       = 8 ?
             JNE PARAM10M1
 ; case of "#8,"
-            MOV #0230h,&ASMTYPE             ; -- 8          ASMTYPE = 0230h  example : MOV #8, <=> MOV @SR+,
+            MOV #0230h,S                    ; -- 8          ASMTYPE = 0230h  example : MOV #8, <=> MOV @SR+,
             JMP PARAMENDOF
 
 PARAM10M1   CMP #-1,TOS                     ; -- xxxx       = -1 ?
             JNE PARAM1000
 ; case of "#-1,"
-            MOV #0330h,&ASMTYPE             ; -- -1         ASMTYPE = 0330h  example : XOR #-1 <=> XOR @R3+,
+            MOV #0330h,S                    ; -- -1         ASMTYPE = 0330h  example : XOR #-1 <=> XOR @R3+,
             JMP PARAMENDOF
 
 ; case of all others "#xxxx,"               ; -- xxxx
-PARAM1000   MOV #0030h,&ASMTYPE             ; -- xxxx       add immediate code type : @PC+,
+PARAM1000   MOV #0030h,S                    ; -- xxxx       add immediate code type : @PC+,
 
 ; case of "&xxxx,"                          ; <== PARAM110
 ; case of ",&xxxx"                          ; <== PARAM20
@@ -360,7 +382,7 @@ PARAM11     CMP.B   #'&',0(W)               ; -- sep
             JNE     PARAM12
 
 ; case of "&xxxx,"                          ; -- sep        search for "&xxxx,"
-PARAM110    MOV     #0210h,&ASMTYPE         ; -- sep        set code type : xxxx(SR) with AS=0b01 ==> x210h (and SR=0 !)
+PARAM110    MOV     #0210h,S                ; -- sep        set code type : xxxx(SR) with AS=0b01 ==> x210h (and SR=0 !)
 
 ; case of "&xxxx,"
 ; case of ",&xxxx"                          ; <== PARAM20
@@ -373,20 +395,20 @@ PARAM12     CMP.B   #'@',0(W)               ; -- sep
             JNE     PARAM13
 
 ; case of "@REG,"|"@REG+,"
-PARAM120    MOV     #0020h,&ASMTYPE         ; -- sep        init ASMTYPE with indirect code type : AS=0b10
+PARAM120    MOV     #0020h,S                ; -- sep        init ASMTYPE with indirect code type : AS=0b10
             ADD     #1,&TOIN                ; -- sep        skip "@" prefix
             CALL    #SearchREG              ;               Z = not found
             JNZ     PARAM123                ; -- value      REG of "@REG," found
 
 ; case of "@REG+,"                          ; -- c-addr     REG of "@REG" not found, search REG of "@REG+"
-PARAM121    ADD     #0010h,&ASMTYPE         ;               change ASMTYPE from @REG to @REG+ type
+PARAM121    ADD     #0010h,S                ;               change ASMTYPE from @REG to @REG+ type
             MOV     #'+',TOS                ; -- "+"        as WORD separator to find REG of "@REG+,"
             CALL    #SearchREG              ; -- value|c-addr   X = flag
-
+            
 ; case of "@REG+,"                          ;
 ; case of "xxxx(REG),"                      ; <== PARAM130
-PARAM122    JZ      REGnotFound             ; -- c-addr
-            CMP     &SOURCE_LEN,&TOIN       ;               test OPCODE II parameter ending by REG+ or (REG) without comma,
+                                            ;               cases of double separator:   +, and ),
+PARAM122    CMP     &SOURCE_LEN,&TOIN       ;               test OPCODE II parameter ending by REG+ or (REG) without comma,
             JZ      PARAM123                ;               i.e. >IN = SOURCE_LEN : don't skip char CR !
             ADD     #1,&TOIN                ; -- 000R       skip "," ready for the second operand search
 
@@ -400,21 +422,22 @@ PARAM123    SWPB    TOS                     ; 000R -- 0R00  swap bytes because i
 ; case of "xxxx(REG),"                      ; -- 0R00                   (src REG typeI or dst REG typeII)
 ; case of "@REG,"                           ; -- 0R00                   (src REG typeI)
 ; case of "REG,"                            ; -- 0R00                   (src REG typeI or dst REG typeII)
+
+
+
 ; case of ",REG"                            ; -- 000R   <== PARAM21     (dst REG typeI)
 ; case of ",xxxx(REG)"                      ; -- 000R   <== PARAM210    (dst REG typeI)
-PARAM124    ADD     TOS,&ASMTYPE            ; -- 0R00|000R
+PARAM124    ADD     TOS,S                   ; -- 0R00|000R
             JMP     PARAMENDOF
 ; ------------------------------------------
 
 ; case of "REG,"|"xxxx(REG),"               ;               first, searg REG of "REG,"
 PARAM13     CALL    #SearchREG              ; -- sep        save >IN for second parsing (case of "xxxx(REG),")
-            JNZ     PARAM123                ; -- 000R       REG of "REG," found, ASMTYPE=0
+            JNZ     PARAM123                ; -- 000R       REG of "REG," found, S=ASMTYPE=0
 
 ; case of "xxxx(REG),"                      ; -- c-addr     "REG," not found
-PARAM130    ADD     #0010h,&ASMTYPE         ;               AS=0b01 for indexing address
-            MOV     #'(',TOS                ; -- "("        as WORD separator to find xxxx of "xxxx(REG),"
-            CALL    #SearchARG              ; -- xxxx       aborted if not found
-            CALL    #StoARGsearchREG        ;               compile xxxx and search REG of "(REG)"
+PARAM130    ADD     #0010h,S         ;               AS=0b01 for indexing address
+            CALL    #ComputeARGparenREG     ;               compile xxxx and search REG of "(REG)"
             JMP     PARAM122                ; 
 
 ; ----------------------------------------------------------------------
@@ -423,14 +446,14 @@ PARAM130    ADD     #0010h,&ASMTYPE         ;               AS=0b01 for indexing
 
 ; PARAM2     --                             ; parse input buffer until BL and compute this 2th operand
 PARAM2      mDOCOL                          ;
-            .word   FBLANK,SKIP             ;               skip space(s) between "arg1," and "arg2" if any
+            .word   FBLANK,SKIP             ;               skip space(s) between "arg1," and "arg2" if any; use not S,T.
             FORTHtoASM                      ; -- c-addr     search for '&' of "&xxxx
             CMP.B   #'&',0(TOS)             ;
             MOV     #20h,TOS                ; -- " "        as WORD separator to find xxxx of ",&xxxx"
             JNE     PARAM21                 ;               '&' not found
 
 ; case of ",&xxxx"                          ;
-PARAM20     ADD     #0082h,&ASMTYPE         ;               change ASMTYPE : AD=1, dst = R2
+PARAM20     ADD     #0082h,S                ;               change ASMTYPE : AD=1, dst = R2
             JMP     PARAM111                ; -- " "
 ; ------------------------------------------
 
@@ -439,13 +462,9 @@ PARAM21     CALL    #SearchREG              ;
             JNZ     PARAM124                ; -- 000R       REG of ",REG" found
 
 ; case of ",xxxx(REG)                       ; -- c-addr     REG not found
-PARAM210    ADD     #0080h,&ASMTYPE         ;               set AD=1
-            MOV     #'(',TOS                ; -- "("        as WORD separator to find xxxx of ",xxxx(REG)"
-            CALL    #SearchARG              ; -- xxxx       aborted if not found
-            CALL    #StoARGsearchREG        ;               compile argument xxxx and search REG of "(REG)"
-            JNZ     PARAM124                ; -- 000R       REG of "(REG) found
-REGnotFound MOV     #NotFound,IP            ; -- c-addr     abort
-            mNEXT
+PARAM210    ADD     #0080h,S                ;               set AD=1
+            CALL    #ComputeARGparenREG     ;               compile argument xxxx and search REG of "(REG)"
+            JMP     PARAM124                ; -- 000R       REG of "(REG) found
 
 
 ; ----------------------------------------------------------------------
@@ -484,8 +503,8 @@ TYPE1DOES                                   ; -- PFADOES
             .word   PARAM2                  ; -- PFADOES            char separator (BL) included in PARAM2
             FORTHtoASM                      ; -- PFADOES
 MAKEOPCODE  MOV     @TOS,TOS                ; -- opcode             part of instruction
-            BIS     &ASMTYPE,TOS            ; -- opcode             opcode is complete
-            MOV     &OPCODE,X               ; -- opcode             X= addr to compile opcode
+            BIS     S,TOS                   ; -- opcode             opcode is complete
+            MOV     T,X                     ; -- opcode             X= OPCODEADR to compile opcode
             JMP     StoreTOS                ;                       then EXIT
 
             asmword "MOV"
@@ -606,11 +625,11 @@ TYPE2DOES                                   ; -- PFADOES
             .word   FBLANK                  ;               char separator for PARAM1
             .word   PARAM1
             FORTHtoASM                      ; -- PFADOES
-            MOV     &ASMTYPE,W              ;
-            AND     #0070h,&ASMTYPE         ;             keep B/W & AS infos in ASMTYPE
+            MOV     S,W                     ;
+            AND     #0070h,S                ;             keep B/W & AS infos in ASMTYPE
             SWPB    W                       ;             (REG org --> REG dst)
             AND     #000Fh,W                ;             keep REG
-BIS_ASMTYPE BIS     W,&ASMTYPE              ; -- PFADOES  add it in ASMTYPE
+BIS_ASMTYPE BIS     W,S                     ; -- PFADOES  add it in ASMTYPE
             JMP     MAKEOPCODE              ; -- then end
 
             asmword "RRC"          ; Rotate Right through Carry ( word)
@@ -649,40 +668,6 @@ BIS_ASMTYPE BIS     W,&ASMTYPE              ; -- PFADOES  add it in ASMTYPE
             mDODOES
             .word   TYPE2DOES,1280h
 
-; ----------------------------------------------------------------------
-; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES TYPE III : PUSHM POPM
-; ----------------------------------------------------------------------
-; syntax :  PUSHM R13,R9    ; R-- R13 R12 R11 R10 R9    (first >= last)
-;           POPM  R9,R13    ; R--                       (last >= first)
-; this syntax is more explicit than TI's one and can reuse typeI template
-
-; PUSHM order : R15,R14,R13,R12,R11,R10, R9, R8, R7, R6, R5, R4 (TI's reg)
-; or          : PSP,TOS, IP,  S,  T,  W,  X,  Y, R7, R6, R5, R4 (FastForth reg)
-; example : PUSHM IP,Y or PUSHM R13,R8
-
-; POPM  order :  R4, R5, R6, R7, R8, R9,R10,R11,R12,R13,R14,R15 (TI's reg)
-; or          :  R4, R5, R6, R7,  Y,  X,  W,  T,  S, IP,TOS,PSP (FastForth reg)
-; example : POPM Y,IP or POPM R8,R13
-
-; TYPE3DOES     -- PFADOES       parse input stream to search :"   REG, REG " as operands of PUSHM|POPM then compile instruction
-TYPE3DOES                                   ; -- PFADOES
-            .word   lit,','                 ; -- PFADOES ","        char separator for PARAM1
-            .word   PARAM1                  ; -- PFADOES            ASMTYPE contains : 0x0S00    S=REGsrc
-            .word   PARAM2                  ; -- PFADOES            ASMTYPE contains : 0x0S0D    D=REGdst
-            FORTHtoASM                      ; -- PFADOES
-            MOV.B   &ASMTYPE,X              ;                       X=REGdst
-            MOV.B   &ASMTYPE+1,W            ;                       W=REGsrc
-            MOV     W,&ASMTYPE              ;                       ASMTYPE = 0x000S
-            CMP     #1500h,0(TOS)           ; -- PFADOES            PUSHM ?
-            JNZ     POPMCASEOF
-PUSHMCASEOF SUB     X,W                     ; -- PFADOES            PUSHM : REGsrc - REGdst = n-1
-            JMP     TYPE3QERR
-POPMCASEOF  SUB     W,X                     ; -- PFADOES            POPM  : REGdst - REGsrc = n-1
-            MOV     X,W
-TYPE3QERR   CMP     #16,W
-            JHS     BOUNDERRORW             ; -- PFADOES            (u>=)
-            .word   0E5Ah                   ;                       RLAM #4,R10 --> RLAM #4,W
-            JMP     BIS_ASMTYPE             ; --            then end
 
 BOUNDERRWM1 ADD     #1,W                    ; <== RRAM|RRUM|RRCM|RLAM error
 BOUNDERRORW MOV     W,TOS                   ; <== PUSHM|POPM|ASM_branch error
@@ -692,56 +677,88 @@ BOUNDERROR                                  ; <== REG number error
             .byte   13,"out of bounds"
             .word   QABORTYES
 
-            asmword "PUSHM"
-ASM_PUSHM   mDODOES
-            .word   TYPE3DOES,01500h
+; --------------------------------------------------------------------------------
+; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES TYPE III : PUSHM|POPM|RLAM|RRAM|RRUM|RRCM
+; --------------------------------------------------------------------------------
+; PUSHM, syntax:    PUSHM #n,REG  with 0 < n < 17 
+; POPM syntax:       POPM #n,REG  with 0 < n < 17 
 
-            asmword "POPM"
-ASM_POPM    mDODOES
-            .word   TYPE3DOES,01700h
 
-; ----------------------------------------------------------------------
-; DTCforthMSP430FR5xxx ASSEMBLER, OPCODES TYPE IV : RLAM|RRAM|RRUM|RRCM
-; ----------------------------------------------------------------------
+; PUSHM order : PSP,TOS, IP,  S,  T,  W,  X,  Y, rEXIT,rDOVAR,rDOCON, rDODOES, R3, SR,RSP, PC
+; PUSHM order : R15,R14,R13,R12,R11,R10, R9, R8,  R7  ,  R6  ,  R5  ,   R4   , R3, R2, R1, R0
+
+; example : PUSHM #6,IP pushes IP,S,T,W,X,Y registers to return stack
+;
+; POPM  order :  PC,RSP, SR, R3, rDODOES,rDOCON,rDOVAR,rEXIT,  Y,  X,  W,  T,  S, IP,TOS,PSP
+; POPM  order :  R0, R1, R2, R3,   R4   ,  R5  ,  R6  ,  R7 , R8, R9,R10,R11,R12,R13,R14,R15
+
+; example : POPM #6,IP   pulls Y,X,W,T,S,IP registers from return stack
+
+; RxxM syntax: RxxM #n,REG  with 0 < n < 5 
 
-; TYPE4DOES      -- PFADOES        parse input stream to search : "   #N, REG " as operands of RLAM|RRAM|RRUM|RRCM
-TYPE4DOES                                   ; -- PFADOES
+; TYPE3DOES      -- PFADOES        parse input stream to search : "   #N, REG " as operands of RLAM|RRAM|RRUM|RRCM
+TYPE3DOES                                   ; -- PFADOES
             .word   FBLANK,SKIP             ;                       skip spaces if any
             FORTHtoASM                      ; -- PFADOES c-addr
-            MOV     #0,&ASMTYPE             ;                       init ASMTYPE=0
-            MOV     &DDP,&OPCODE            ;                       init OPCODE=DP
+            MOV     #0,S                    ;                       init ASMTYPE=0
+            MOV     &DDP,T                  ;                       init OPCODEADR=DP
             ADD     #2,&DDP                 ;                       make room for opcode
             ADD     #1,&TOIN                ;                       skip "#"
             MOV     #',',TOS                ; -- PFADOES ","
+            PUSHM   #2,S                    ;               PUSHM S,T
             ASMtoFORTH
             .word   WORDD,QNUMBER
-            .word   QBRAN,NotFound
-            .word   PARAM2                  ; -- PFADOES 0x000N     ASMTYPE = 0x000R
+            .word   QBRAN,NotFound          ;                       ABORT
+            FORTHtoASM
+            POPM  #2,S                    ;               POPM T,S
+            ASMtoFORTH
+            .word   PARAM2                  ; -- PFADOES 0x000N     S=ASMTYPE = 0x000R
             FORTHtoASM
-            MOV     TOS,W                   ; -- PFADOES 0x000N     W = 0x000N
+            MOV     TOS,W                   ; -- PFADOES n          W = n
             MOV     @PSP+,TOS               ; -- PFADOES
-            SUB     #1,W                    ;                       W = N floored to 0
-            CMP     #4,W                    ;
+            SUB     #1,W                    ;                       W = n floored to 0
+            JN      BOUNDERRWM1
+            MOV     @TOS,X                  ;                       X=OPCODE
+            RLAM    #4,X                    ;                       OPCODE bit 1000h --> C
+            JNC     RxxMINSTRU              ;                       
+PxxxINSTRU  MOV     S,Y                     ;                       S=REG, Y=REG to test
+            RLAM    #3,X                    ;                       OPCODE bit 0200h --> C                  
+            JNC     PUSHMINSTRU             ;                       W=n-1 Y=REG
+POPMINSTRU  SUB     W,S                     ;                       to make POPM opcode, keep first REG to POP; TI is complicated....
+PUSHMINSTRU SUB     W,Y                     ;                       Y=REG-(n-1)
+            CMP     #16,Y
             JHS     BOUNDERRWM1             ;                       JC=JHS    (U>=)
-            SWPB    W                       ; -- PFADOES            W = N << 8
-            .word   065Ah                   ; RLAM #2,R10           W = N << 10
-            JMP     BIS_ASMTYPE             ; --
+            RLAM.W  #4,W                    ;                       W = n << 4      
+            JMP     BIS_ASMTYPE             ; PFADOES --            
+RxxMINSTRU  CMP     #4,W                    ;
+            JHS     BOUNDERRWM1             ;                       JC=JHS    (U>=)
+            SWPB    W                       ; -- PFADOES            W = n << 8
+            RLAM.W  #2,W                    ; RLAM #2,R10           W = N << 10
+            JMP     BIS_ASMTYPE             ; PFADOES --
 
             asmword "RRCM"
             mDODOES
-            .word   TYPE4DOES,0050h
+            .word   TYPE3DOES,0050h
 
             asmword "RRAM"
             mDODOES
-            .word   TYPE4DOES,0150h
+            .word   TYPE3DOES,0150h
 
             asmword "RLAM"
             mDODOES
-            .word   TYPE4DOES,0250h
+            .word   TYPE3DOES,0250h
 
             asmword "RRUM"
             mDODOES
-            .word   TYPE4DOES,0350h
+            .word   TYPE3DOES,0350h
+
+            asmword "PUSHM"
+            mDODOES
+            .word   TYPE3DOES,1500h
+
+            asmword "POPM"
+            mDODOES
+            .word   TYPE3DOES,1700h
 
 ; ----------------------------------------------------------------------
 ; DTCforthMSP430FR5xxx ASSEMBLER, CONDITIONAL BRANCHS
@@ -873,71 +890,73 @@ ASM_REPEAT  mDOCOL                      ; -- @WHILE @BEGIN
 BACKWARDDOES        ;
     FORTHtoASM
     MOV @RSP+,IP
-    MOV TOS,Y       ; Y = CLRBWx
+    MOV @TOS,TOS
+    MOV TOS,Y       ; Y = ASMBWx
     MOV @PSP+,TOS   ; 
-    MOV @Y,W        ;               W = [CLRBWx]
+    MOV @Y,W        ;               W = [ASMBWx]
     CMP #0,W        ;               W = 0 ?
-    JNZ BACKWUSE
+    MOV #0,0(Y)     ;               preset [ASMBWx] = 0 for next use
+BACKWUSE            ; -- OPCODE
+    JNZ ASM_UNTIL1
 BACKWSET            ; --
-    MOV &DDP,0(Y)   ;               [CLRBWx] = DDP
+    MOV &DDP,0(Y)   ;               [ASMBWx] = DDP
     mNEXT
-BACKWUSE            ; -- OPCODE
-    MOV #0,0(Y)     ;               [CLRBWx] = 0 for next use
-    JMP ASM_UNTIL1  ;               resolve backward branch with W
+;    JMP ASM_UNTIL1  ;               resolve backward branch with W
 
 ; backward label 1
             asmword "BW1"
             mdodoes
             .word BACKWARDDOES
-CLRBW1      .word 0
+            .word ASMBW1
 
 ; backward label 2
             asmword "BW2"
             mdodoes
             .word BACKWARDDOES
-CLRBW2      .word 0
+            .word ASMBW2
 
 ; backward label 3
             asmword "BW3"
             mdodoes
             .word BACKWARDDOES
-CLRBW3      .word 0
+            .word ASMBW3
 
 FORWARDDOES
     FORTHtoASM
     MOV @RSP+,IP
     MOV &DDP,W      ;
-    MOV @TOS,Y      ;               Y=[CLRFWx]
-    CMP #0,Y        ;               Y = 0 ? (FWx is free?)
-    JNZ FORWUSE     ;               no
+    MOV @TOS,TOS
+    MOV @TOS,Y      ;               Y=[ASMFWx]
+    MOV #0,0(TOS)   ;               preset [ASMFWx] for next use
+    CMP #0,Y        ;               ASMFWx = 0 ? (FWx is free?)
+FORWUSE             ; PFA -- @OPCODE
+    JNZ ASM_THEN1     ;               no
 FORWSET             ; OPCODE PFA -- 
     MOV @PSP+,0(W)  ; -- PFA        compile incomplete opcode
     ADD #2,&DDP     ;               increment DDP
-    MOV W,0(TOS)    ;               store @OPCODE into CLRFWx
+    MOV W,0(TOS)    ;               store @OPCODE into ASMFWx
     MOV @PSP+,TOS   ;   --
     mNEXT
-FORWUSE             ; PFA -- @OPCODE
-    MOV #0,0(TOS)   ;               reset PFA for next use
-    JMP ASM_THEN1   ;               resolve forward branch with Y
+;    JMP ASM_THEN1   ;               resolve forward branch with Y
 
 
 ; forward label 1
             asmword "FW1"
             mdodoes
             .word FORWARDDOES
-CLRFW1      .word 0
+            .word ASMFW1
 
 ; forward label 2
             asmword "FW2"
             mdodoes
             .word FORWARDDOES
-CLRFW2      .word 0
+            .word ASMFW2
 
 ; forward label 3
             asmword "FW3"
             mdodoes
             .word FORWARDDOES
-CLRFW3      .word 0
+            .word ASMFW3
 
 
 ; invert FORTH conditionnal branch      FORTH_JMP_OPCODE -- LABEL_JMP_OPCODE

diff --git a/forthMSP430FR_CONDCOMP.asm b/forthMSP430FR_CONDCOMP.asm
index 4ac54a1..39f6ca7 100644 (file)
--- a/forthMSP430FR_CONDCOMP.asm
+++ b/forthMSP430FR_CONDCOMP.asm
@@ -21,13 +21,13 @@ COMPARE
         MOV @PSP+,Y     ;2 addr2 = Y
         MOV @PSP+,T     ;2 u1 = T     
         MOV @PSP+,X     ;2 addr1 = X
-COMPAR1 MOV T,TOS       ;1
-        ADD S,TOS       ;1
-        JZ  COMPEQUAL   ;2 end of all successfull comparisons
+COMPAR1 MOV T,TOS       ;1 TOS=u1
+        ADD S,TOS       ;1 TOS=u1+u2
+        JZ  COMPEQUAL   ;2 u1=u2=0: end of all successfull comparisons
         SUB #1,T        ;1
         JN COMPLESS     ;2 u1<u2
         SUB #1,S        ;1
-        JN COMPGREATER  ;2 u2<u1
+        JN COMPGREATER  ;2 u1>u2
         ADD #1,X        ;1
         CMP.B @Y+,-1(X) ;4 char1-char2
         JZ COMPAR1      ;2 char1=char2  17~ loop
@@ -129,18 +129,6 @@ BRACKETIF
 ;        XOR #-1,TOS
 ;        JMP BRACKETIF
 
-;[UNDEFINED]
-;https://forth-standard.org/standard/tools/BracketUNDEFINED
-;Compilation:
-;Perform the execution semantics given below.
-;Execution: ( "<spaces>name ..." -- flag )
-;Skip leading space delimiters. Parse name delimited by a space. 
-;Return a false flag if name is the name of a word that can be found,
-;otherwise return a true flag.
-        FORTHWORDIMM  "[UNDEFINED]"
-        mDOCOL
-        .word   FBLANK,WORDD,FIND,NIP,ZEROEQUAL,EXIT
-
 ;[DEFINED]
 ;https://forth-standard.org/standard/tools/BracketDEFINED
 ;Compilation:
@@ -152,9 +140,22 @@ BRACKETIF
 ;otherwise return a false flag. [DEFINED] is an immediate word.
 
         FORTHWORDIMM  "[DEFINED]"
+BRACKETDEFINED
         mDOCOL
         .word   FBLANK,WORDD,FIND,NIP,EXIT
 
+;[UNDEFINED]
+;https://forth-standard.org/standard/tools/BracketUNDEFINED
+;Compilation:
+;Perform the execution semantics given below.
+;Execution: ( "<spaces>name ..." -- flag )
+;Skip leading space delimiters. Parse name delimited by a space. 
+;Return a false flag if name is the name of a word that can be found,
+;otherwise return a true flag.
+        FORTHWORDIMM  "[UNDEFINED]"
+        mDOCOL
+        .word   BRACKETDEFINED,ZEROEQUAL,EXIT
+
 ;; CORE EXT  MARKER
 ;;https://forth-standard.org/standard/core/MARKER
 ;;( "<spaces>name" -- )

diff --git a/forthMSP430FR_HALFDUPLEX.asm b/forthMSP430FR_HALFDUPLEX.asm
index 6e1cd64..f44d654 100644 (file)
--- a/forthMSP430FR_HALFDUPLEX.asm
+++ b/forthMSP430FR_HALFDUPLEX.asm
@@ -7,12 +7,14 @@
 ; (ACCEPT) part I: prepare TERMINAL_INT ;
 ; --------------------------------------;
     .IFDEF TOTAL
-            .word 1537h                 ;6              push R7,R6,R5,R4
+;            .word 1537h                 ;6              push R7,R6,R5,R4
+            PUSHM  #4,R7
     .ENDIF                              ;
             MOV     #ENDACCEPT,S        ;2              S = ACCEPT XOFF return
             MOV     #AKEYREAD1,T        ;2              T = default XON return
-            .word   152Dh               ;5              PUSHM IP,S,T, as IP ret, XOFF ret, XON ret
-            MOV     TOS,W               ;1 -- addr len
+;            .word   152Dh               ;5              PUSHM IP,S,T, as IP ret, XOFF ret, XON ret
+             PUSHM  #3,IP
+           MOV     TOS,W               ;1 -- addr len
             MOV     @PSP,TOS            ;2 -- org ptr                                             )
             ADD     TOS,W               ;1 -- org ptr   W=Bound                                   )
             MOV     #0Dh,T              ;2              T = 'CR' to speed up char loop in part II  > prepare stack and registers
@@ -24,7 +26,8 @@
             JNZ     RXON                ;2                   no : RXON return = AKEYREAD1, to process first char of new line.
 ACCEPTNEXT  ADD     #2,RSP              ;1                   yes: remove AKEYREAD1 as XON return,
             MOV     #SLEEP,X            ;2                        and set XON return = SLEEP
-            .word   153Ch               ;6                        PUSHM S,T,W,X before SLEEP (and so WAKE on any interrupts)
+;            .word   153Ch               ;6                        PUSHM S,T,W,X before SLEEP (and so WAKE on any interrupts)
+            PUSHM  #4,S
 ; --------------------------------------;
 RXON                                    ;
 ; --------------------------------------;
@@ -60,10 +63,6 @@ RXOFF_LOOP  BIT     #UCTXIFG,&TERMIFG   ;3  wait the sending end of XOFF, useles
     ASMWORD "SLEEP"                     ; may be redirected
 SLEEP                                   ;
     MOV #PARENSLEEP,PC                  ;3
-; --------------------------------------;
-
-; --------------------------------------;
-    ASMWORD "(SLEEP)"                   ;
 PARENSLEEP                              ;
     BIS &LPM_MODE,SR                    ;3  enter in LPMx sleep mode with GIE=1
 ; --------------------------------------;   default FAST FORTH mode (for its input terminal use) : LPM0.
@@ -101,8 +100,7 @@ TERMINAL_INT                            ; <--- TEMR RX interrupt vector, delayed
 ; **************************************;      if wake up time increases, max bauds rate decreases...
 ; (ACCEPT) part II under interrupt      ; Org Ptr -- len'
 ; --------------------------------------;
-            ADD     #4,RSP              ;1  remove SR and PC from stack, SR flags are lost (unused by FORTH interpreter)
-            .word   172Ah               ;5  POPM W=buffer_bound,T=0Dh,S=20h
+             POPM  #5,S                 ;8  POPM  Y=SR,X=PC,W=buffer_bound, T=0Dh,S=20h
 ; vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv;
 ; starts the 2th stopwatch              ;
 ; ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^;
@@ -152,7 +150,7 @@ ACCEPTEND   SUB @PSP+,TOS               ; Org Ptr -- len'
             MOV @RSP+,IP                ; 2 and continue with INTERPRET with GIE=0.
                                         ; So FORTH machine is protected against any interrupt...
     .IFDEF TOTAL
-            .word 1734h                 ;6              pop R4,R5,R6,R7
+             POPM  #4,R7                 ;6              pop R4,R5,R6,R7
     .ENDIF
             mNEXT                       ; ...until next falling down to LPMx mode of (ACCEPT) part1,
 ; **************************************;    i.e. when the FORTH interpreter has no more to do.
@@ -162,10 +160,11 @@ ACCEPTEND   SUB @PSP+,TOS               ; Org Ptr -- len'
 ; ------------------------------------------------------------------------------
 
 
-;Z (EMIT)   c --    output character (byte) to the terminal
-; hardware or software control on TX flow seems not necessary with UARTtoUSB bridges because
-; they stop TX when their RX buffer is full. So no problem when the terminal input is echoed to output.
-            FORTHWORD "(EMIT)"
+;https://forth-standard.org/standard/core/EMIT
+;C EMIT     c --    output character to the output device ; deferred word
+            FORTHWORD "EMIT"
+EMIT        MOV @PC+,PC                 ;3  15~
+            .word   PARENEMIT
 PARENEMIT   MOV     TOS,Y               ; 1
             MOV     @PSP+,TOS           ; 2
 YEMIT1      BIT     #UCTXIFG,&TERMIFG   ; 3 wait the sending end of previous char, useless at high baudrates

diff --git a/forthMSP430FR_SD_INIT.asm b/forthMSP430FR_SD_INIT.asm
index 614c32d..f957896 100644 (file)
--- a/forthMSP430FR_SD_INIT.asm
+++ b/forthMSP430FR_SD_INIT.asm
@@ -141,12 +141,11 @@
 ; ===========================================================
 
     .IFDEF RAM_1K               ; case of MSP430FR57xx : SD datas are in FRAM
-        MOV #SD_ORG_DATA,X      ; so are not initialised by COLD/RESET
+        MOV #SD_LEN_DATA,X      ; so are not initialised by COLD/RESET
 InitSDdata                      ;
-        MOV #0,0(X)             ;
-        ADD #2,X                ;
-        CMP #SD_END_DATA,X      ;
-        JNE InitSDdata          ;
+        SUB #2,X
+        MOV #0,SD_ORG_DATA(X)   ;
+        JNZ InitSDdata          ;
     .ENDIF
 
 ; ===========================================================

diff --git a/forthMSP430FR_SD_LOAD.asm b/forthMSP430FR_SD_LOAD.asm
index 0eaa367..2727210 100644 (file)
--- a/forthMSP430FR_SD_LOAD.asm
+++ b/forthMSP430FR_SD_LOAD.asm
@@ -87,7 +87,8 @@ CCFS_AllOthers                      ;
 ; ----------------------------------;
     .ELSEIF                         ; case of no hardware multiplier
 ; ----------------------------------; Cluster24<<SecPerClus{1,2,4,8,16,32,64} --> ClusFrstSect
-    .word 0152Ah                    ;6 PUSHM W,X,Y
+;    .word 0152Ah                    ;6 PUSHM W,X,Y
+    PUSHM  #3,W
     MOV.B &SecPerClus,W             ;3 SecPerClus(5-1) = multiplicator
     MOV &ClusterL,X                 ;3 Cluster(16-1) --> MULTIPLICANDlo
     MOV.B &ClusterH,Y               ;3 Cluster(21-17) -->  MULTIPLICANDhi
@@ -105,7 +106,8 @@ CCFS_NEXT                           ;  C = 1, it's done
     ADDC #0,Y                       ;1
     MOV X,&SectorL                  ;3 low result
     MOV Y,&SectorH                  ;3 high result
-    .word 01728h                    ;6 POPM Y,X,W
+;    .word 01728h                    ;6 POPM Y,X,W
+    POPM  #3,W
 ; ----------------------------------;34~ + 5~ by loop
     .ENDIF ; MPY
 ; ----------------------------------;
@@ -325,7 +327,7 @@ CheckCaseOfCloseLoadedFile          ;
 RestorePreviousBuffer               ; W=-1: this LOADed file to close had not a parent file
 ; ----------------------------------;
     MOV     #TIB_ORG,&FCIB+2        ;     restore TIB as Current Input Buffer for next line (next QUIT)
-    MOV     #PARENACCEPT,&ACCEPT+2  ;     restore (ACCEPT) for next line (next QUIT)
+    MOV     #BODYACCEPT,&ACCEPT+2   ;     restore (ACCEPT) for next line (next QUIT)
     JMP     RestoreBufferContext    ;
 ; ----------------------------------;
 CheckPreviousLoadedFile             ;
@@ -546,7 +548,8 @@ OPN_LoadDIRsector                   ; <=== Dir Sector loopback
 OPN_SearchDIRentry                  ; <=== DIR Entry loopback
 ; ----------------------------------;
     MOV     W,Y                     ; 1
-    .word   0E58h                   ; 5 RLAM #4,Y --> * 16
+;    .word   0E58h                   ; 5 RLAM #4,Y --> * 16
+    RLAM.W  #4,Y
     ADD     Y,Y                     ; 1           --> * 2
     MOV     Y,&EntryOfst            ; EntryOfst points to first free entry
     CMP.B   #0,SD_BUF(Y)            ; free entry ? (end of entries in DIR)

diff --git a/mspregister.mac b/mspregister.mac
index 9a31b3d..52644f3 100644 (file)
--- a/mspregister.mac
+++ b/mspregister.mac
@@ -16,7 +16,7 @@
 
 regmspinc       equ     1
 
-                if      (MOMCPUNAME<>"MSP430")
+                if      (MOMCPUNAME<>"MSP430")&&(MOMCPUNAME<>"MSP430X")
                  fatal  "Falscher Prozessortyp eingestellt: nur MSP430 erlaubt!"
                endif
 
@@ -164,10 +164,10 @@ Z             equ 0002h
 N             equ 0004h
 V             equ 0100h
 GIE           equ 0008h
-CPUOFF        equ 0010h
-OSCOFF        equ 0020h
-SCG0          equ 0040h
-SCG1          equ 0080h
+CPUOFF        equ 0010h ; CPU Off.                  1=turn_off_CPU
+OSCOFF        equ 0020h ; Oscillator Off.           1=turn_off_LFXT1CLK
+SCG0          equ 0040h ; System Clock Generator 0. 1=turn_off_DCO
+SCG1          equ 0080h ; System Clock Generator 1. 1=turn_off_SMCLK
 UF9           equ 0200h ; = SR(9) User Flag 1 used by ?NUMBER --> INTERPRET --> LITERAL to process double numbers, else free for use.  
 UF10          equ 0400h ; = SR(10) User Flag 2  
 UF11          equ 0800h ; = SR(11) User Flag 3