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[android-x86/device-viliv-s5.git] / psb-kernel-source-4.41.1 / i915_fence.c
1 /**************************************************************************
2  *
3  * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA
4  * All Rights Reserved.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the
8  * "Software"), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sub license, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
18  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
19  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * The above copyright notice and this permission notice (including the
23  * next paragraph) shall be included in all copies or substantial portions
24  * of the Software.
25  *
26  *
27  **************************************************************************/
28 /*
29  * Authors: Thomas Hellström <thomas-at-tungstengraphics-dot-com>
30  */
31
32 #include "drmP.h"
33 #include "drm.h"
34 #include "i915_drm.h"
35 #include "i915_drv.h"
36
37 /*
38  * Initiate a sync flush if it's not already pending.
39  */
40
41 static void i915_initiate_rwflush(struct drm_i915_private *dev_priv, 
42                                   struct drm_fence_class_manager *fc)
43 {
44         if ((fc->pending_flush & DRM_I915_FENCE_TYPE_RW) && 
45             !dev_priv->flush_pending) {
46                 dev_priv->flush_sequence = (uint32_t) READ_BREADCRUMB(dev_priv);
47                 dev_priv->flush_flags = fc->pending_flush;
48                 dev_priv->saved_flush_status = READ_HWSP(dev_priv, 0);
49                 I915_WRITE(I915REG_INSTPM, (1 << 5) | (1 << 21));
50                 dev_priv->flush_pending = 1;
51                 fc->pending_flush &= ~DRM_I915_FENCE_TYPE_RW;
52         }
53 }
54
55 static void i915_fence_flush(struct drm_device *dev,
56                              uint32_t fence_class)
57 {
58         struct drm_i915_private *dev_priv = 
59                 (struct drm_i915_private *) dev->dev_private;
60         struct drm_fence_manager *fm = &dev->fm;
61         struct drm_fence_class_manager *fc = &fm->fence_class[0];
62         unsigned long irq_flags;
63
64         if (unlikely(!dev_priv))
65                 return;
66
67         write_lock_irqsave(&fm->lock, irq_flags);
68         i915_initiate_rwflush(dev_priv, fc);
69         write_unlock_irqrestore(&fm->lock, irq_flags);
70 }
71
72 static void i915_fence_poll(struct drm_device *dev, uint32_t fence_class,
73                             uint32_t waiting_types)
74 {
75         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
76         struct drm_fence_manager *fm = &dev->fm;
77         struct drm_fence_class_manager *fc = &fm->fence_class[0];
78         uint32_t flush_flags = 0;
79         uint32_t flush_sequence = 0;
80         uint32_t i_status;
81         uint32_t sequence;
82
83         if (unlikely(!dev_priv))
84                 return;
85
86         /*
87          * First, report any executed sync flush:
88          */
89
90         if (dev_priv->flush_pending) {
91                 i_status = READ_HWSP(dev_priv, 0);
92                 if ((i_status & (1 << 12)) !=
93                     (dev_priv->saved_flush_status & (1 << 12))) {
94                         flush_flags = dev_priv->flush_flags;
95                         flush_sequence = dev_priv->flush_sequence;
96                         dev_priv->flush_pending = 0;
97                         drm_fence_handler(dev, 0, flush_sequence, flush_flags, 0);
98                 }
99         }               
100
101         /*
102          * Report A new breadcrumb, and adjust IRQs.
103          */
104
105         if (waiting_types & DRM_FENCE_TYPE_EXE) {
106                 sequence = READ_BREADCRUMB(dev_priv);
107
108                 if (sequence != dev_priv->reported_sequence ||
109                     !dev_priv->reported_sequence_valid) {
110                         drm_fence_handler(dev, 0, sequence, 
111                                           DRM_FENCE_TYPE_EXE, 0);
112                         dev_priv->reported_sequence = sequence;
113                         dev_priv->reported_sequence_valid = 1;
114                 }
115
116                 if (dev_priv->fence_irq_on && !(waiting_types & DRM_FENCE_TYPE_EXE)) {
117                         i915_user_irq_off(dev_priv);
118                         dev_priv->fence_irq_on = 0;
119                 } else if (!dev_priv->fence_irq_on && (waiting_types & DRM_FENCE_TYPE_EXE)) {
120                         i915_user_irq_on(dev_priv);
121                         dev_priv->fence_irq_on = 1;
122                 }
123         }
124
125         /*
126          * There may be new RW flushes pending. Start them.
127          */
128         
129         i915_initiate_rwflush(dev_priv, fc); 
130
131         /*
132          * And possibly, but unlikely, they finish immediately. 
133          */
134
135         if (dev_priv->flush_pending) {
136                 i_status = READ_HWSP(dev_priv, 0);
137                 if (unlikely((i_status & (1 << 12)) !=
138                     (dev_priv->saved_flush_status & (1 << 12)))) {
139                         flush_flags = dev_priv->flush_flags;
140                         flush_sequence = dev_priv->flush_sequence;
141                         dev_priv->flush_pending = 0;
142                         drm_fence_handler(dev, 0, flush_sequence, flush_flags, 0);
143                 }
144         }
145 }
146
147 static int i915_fence_emit_sequence(struct drm_device *dev, uint32_t class,
148                              uint32_t flags, uint32_t *sequence,
149                              uint32_t *native_type)
150 {
151         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
152         if (unlikely(!dev_priv))
153                 return -EINVAL;
154
155         i915_emit_irq(dev);
156         *sequence = (uint32_t) dev_priv->counter;
157         *native_type = DRM_FENCE_TYPE_EXE;
158         if (flags & DRM_I915_FENCE_FLAG_FLUSHED)
159                 *native_type |= DRM_I915_FENCE_TYPE_RW;
160
161         return 0;
162 }
163
164 void i915_fence_handler(struct drm_device *dev)
165 {
166         struct drm_fence_manager *fm = &dev->fm;
167         struct drm_fence_class_manager *fc = &fm->fence_class[0];
168
169         write_lock(&fm->lock);
170         i915_fence_poll(dev, 0, fc->waiting_types);
171         write_unlock(&fm->lock);
172 }
173
174 /*
175  * We need a separate wait function since we need to poll for
176  * sync flushes.
177  */
178
179 static int i915_fence_wait(struct drm_fence_object *fence,
180                            int lazy, int interruptible, uint32_t mask)
181 {
182         struct drm_device *dev = fence->dev;
183         struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
184         struct drm_fence_manager *fm = &dev->fm;
185         struct drm_fence_class_manager *fc = &fm->fence_class[0];
186         int ret;
187         unsigned long  _end = jiffies + 3 * DRM_HZ;
188
189         drm_fence_object_flush(fence, mask);
190         if (likely(interruptible))
191                 ret = wait_event_interruptible_timeout
192                         (fc->fence_queue, drm_fence_object_signaled(fence, DRM_FENCE_TYPE_EXE), 
193                          3 * DRM_HZ);
194         else 
195                 ret = wait_event_timeout
196                         (fc->fence_queue, drm_fence_object_signaled(fence, DRM_FENCE_TYPE_EXE), 
197                          3 * DRM_HZ);
198
199         if (unlikely(ret == -ERESTARTSYS))
200                 return -EAGAIN;
201
202         if (unlikely(ret == 0))
203                 return -EBUSY;
204
205         if (likely(mask == DRM_FENCE_TYPE_EXE || 
206                    drm_fence_object_signaled(fence, mask))) 
207                 return 0;
208
209         /*
210          * Remove this code snippet when fixed. HWSTAM doesn't let
211          * flush info through...
212          */
213
214         if (unlikely(dev_priv && !dev_priv->irq_enabled)) {
215                 unsigned long irq_flags;
216
217                 DRM_ERROR("X server disabled IRQs before releasing frame buffer.\n");
218                 msleep(100);
219                 dev_priv->flush_pending = 0;
220                 write_lock_irqsave(&fm->lock, irq_flags);
221                 drm_fence_handler(dev, fence->fence_class, 
222                                   fence->sequence, fence->type, 0);
223                 write_unlock_irqrestore(&fm->lock, irq_flags);
224         }
225
226         /*
227          * Poll for sync flush completion.
228          */
229
230         return drm_fence_wait_polling(fence, lazy, interruptible, mask, _end);
231 }
232
233 static uint32_t i915_fence_needed_flush(struct drm_fence_object *fence)
234 {
235         uint32_t flush_flags = fence->waiting_types & 
236                 ~(DRM_FENCE_TYPE_EXE | fence->signaled_types);
237
238         if (likely(flush_flags == 0 || 
239                    ((flush_flags & ~fence->native_types) == 0) || 
240                    (fence->signaled_types != DRM_FENCE_TYPE_EXE)))
241                 return 0;
242         else {
243                 struct drm_device *dev = fence->dev;
244                 struct drm_i915_private *dev_priv = (struct drm_i915_private *) dev->dev_private;
245                 struct drm_fence_driver *driver = dev->driver->fence_driver;
246                 
247                 if (unlikely(!dev_priv))
248                         return 0;
249
250                 if (dev_priv->flush_pending) {
251                         uint32_t diff = (dev_priv->flush_sequence - fence->sequence) & 
252                                 driver->sequence_mask;
253
254                         if (diff < driver->wrap_diff)
255                                 return 0;
256                 }
257         }
258         return flush_flags;
259 }
260
261 /*
262  * In the very unlikely event that "poll" is not really called very often
263  * we need the following function to handle sequence wraparounds.
264  */
265
266 void i915_invalidate_reported_sequence(struct drm_device *dev)
267 {
268         struct drm_i915_private *dev_priv = (struct drm_i915_private *) 
269                 dev->dev_private;
270         struct drm_fence_manager *fm = &dev->fm;
271         unsigned long irq_flags;
272
273         if (unlikely(!dev_priv))
274                 return;
275         
276         write_lock_irqsave(&fm->lock, irq_flags);
277         dev_priv->reported_sequence_valid = 0;
278         write_unlock_irqrestore(&fm->lock, irq_flags);
279 }
280         
281
282 struct drm_fence_driver i915_fence_driver = {
283         .num_classes = 1,
284         .wrap_diff = (1U << (BREADCRUMB_BITS - 1)),
285         .flush_diff = (1U << (BREADCRUMB_BITS - 2)),
286         .sequence_mask = BREADCRUMB_MASK,
287         .has_irq = NULL,
288         .emit = i915_fence_emit_sequence,
289         .flush = i915_fence_flush,
290         .poll = i915_fence_poll,
291         .needed_flush = i915_fence_needed_flush,
292         .wait = i915_fence_wait,
293 };