From f659dc41e3c2cd5d6ca64b4d4db0a755d444e571 Mon Sep 17 00:00:00 2001 From: drow Date: Thu, 18 Oct 2007 13:53:35 +0000 Subject: [PATCH] * config/mips/mips.c (mips_dwarf_register_span): New. (TARGET_DWARF_REGISTER_SPAN): Define. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@129438 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 5 +++++ gcc/config/mips/mips.c | 30 ++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1bf4a2def8f..c8b1e2f146e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2007-10-18 Daniel Jacobowitz + + * config/mips/mips.c (mips_dwarf_register_span): New. + (TARGET_DWARF_REGISTER_SPAN): Define. + 2007-10-18 Chen Liqin * config.gcc : update score-*-elf(extra_objs). diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 889997d8c33..f9d559c5c51 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -432,6 +432,7 @@ static void mips_set_current_function (tree); static int mips_mode_rep_extended (enum machine_mode, enum machine_mode); static bool mips_offset_within_alignment_p (rtx, HOST_WIDE_INT); static void mips_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED; +static rtx mips_dwarf_register_span (rtx); /* Structure to be filled in by compute_frame_size with register save masks, and offsets for the current function. */ @@ -1386,6 +1387,9 @@ static const unsigned char mips16e_save_restore_regs[] = { #define TARGET_ASM_OUTPUT_DWARF_DTPREL mips_output_dwarf_dtprel #endif +#undef TARGET_DWARF_REGISTER_SPAN +#define TARGET_DWARF_REGISTER_SPAN mips_dwarf_register_span + struct gcc_target targetm = TARGET_INITIALIZER; @@ -12866,5 +12870,31 @@ mips_output_dwarf_dtprel (FILE *file, int size, rtx x) output_addr_const (file, x); fputs ("+0x8000", file); } + +/* Implement TARGET_DWARF_REGISTER_SPAN. */ + +static rtx +mips_dwarf_register_span (rtx reg) +{ + rtx high, low; + enum machine_mode mode; + + /* By default, GCC maps increasing register numbers to increasing + memory locations, but paired FPRs are always little-endian, + regardless of the prevailing endianness. */ + mode = GET_MODE (reg); + if (FP_REG_P (REGNO (reg)) + && TARGET_BIG_ENDIAN + && MAX_FPRS_PER_FMT > 1 + && GET_MODE_SIZE (mode) > UNITS_PER_FPREG) + { + gcc_assert (GET_MODE_SIZE (mode) == UNITS_PER_HWFPVALUE); + high = mips_subword (reg, true); + low = mips_subword (reg, false); + return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, high, low)); + } + + return NULL_RTX; +} #include "gt-mips.h" -- 2.11.0