From f31c6cbf8af08b5e6ede02c4080f36aac962e162 Mon Sep 17 00:00:00 2001
From: rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Thu, 2 Apr 1998 01:56:17 +0000
Subject: [PATCH 1/1] * final.c (alter_subreg): Allow the target to hook
 by-mode subreg hard register number changes.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@18946 138bc75d-0d04-0410-961f-82ee72b054a4
---
 gcc/ChangeLog |  2 ++
 gcc/final.c   | 13 ++++++++++++-
 gcc/tm.texi   | 11 +++++++++++
 3 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9eea255533b..578b9b7ac9b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -5,6 +5,8 @@ Thu Apr  2 01:01:34 1998  Richard Henderson  <rth@cygnus.com>
 
 	* emit-rtl.c (gen_lowpart_common): Skip count by HARD_REGNO_NREGS.
 	(gen_highpart): Likewise.
+	* final.c (alter_subreg): Allow the target to hook by-mode subreg
+	hard register number changes.
 	
 Wed Apr  1 22:26:22 1998  Jeffrey A Law  (law@cygnus.com)
 
diff --git a/gcc/final.c b/gcc/final.c
index 74a6d15d743..6b851f20be7 100644
--- a/gcc/final.c
+++ b/gcc/final.c
@@ -2891,9 +2891,20 @@ alter_subreg (x)
 
   if (GET_CODE (y) == REG)
     {
-      /* If the containing reg really gets a hard reg, so do we.  */
+      /* If the word size is larger than the size of this register,
+	 adjust the register number to compensate.  */
+      /* ??? Note that this just catches stragglers created by/for
+	 integrate.  It would be better if we either caught these
+	 earlier, or kept _all_ subregs until now and eliminate
+	 gen_lowpart and friends.  */
+
       PUT_CODE (x, REG);
+#ifdef ALTER_HARD_SUBREG
+      REGNO (x) = ALTER_HARD_SUBREG(GET_MODE (x), SUBREG_WORD (x),
+				    GET_MODE (y), REGNO (y));
+#else
       REGNO (x) = REGNO (y) + SUBREG_WORD (x);
+#endif
     }
   else if (GET_CODE (y) == MEM)
     {
diff --git a/gcc/tm.texi b/gcc/tm.texi
index d8fb7240775..ad578386be6 100644
--- a/gcc/tm.texi
+++ b/gcc/tm.texi
@@ -1403,6 +1403,17 @@ definition of this macro is
     / UNITS_PER_WORD))
 @end smallexample
 
+@findex ALTER_HARD_SUBREG
+@item ALTER_HARD_SUBREG (@var{tgt_mode}, @var{word}, @var{src_mode}, @var{regno})
+A C expression that returns an adjusted hard register number for 
+
+@smallexample
+(subreg:@var{tgt_mode} (reg:@var{src_mode} @var{regno}) @var{word})
+@end smallexample
+
+This may be needed if the target machine has mixed sized big-endian
+registers, like Sparc v9.
+
 @findex HARD_REGNO_MODE_OK
 @item HARD_REGNO_MODE_OK (@var{regno}, @var{mode})
 A C expression that is nonzero if it is permissible to store a value
-- 
2.11.0