From 9d63835d703988ad8b4450edf148e3b6600e1f25 Mon Sep 17 00:00:00 2001 From: drow Date: Fri, 23 Apr 2004 13:51:21 +0000 Subject: [PATCH 1/1] * config/arm/arm.c (arm_output_epilogue): Reverse the order of loading iWMMXt registers with a frame pointer. Use post-increment without a frame pointer. (arm_expand_prologue): Reverse the order of saving iWMMXt registers. testsuite/ * gcc.c-torture/execute/simd-5.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@81092 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 7 ++++ gcc/config/arm/arm.c | 6 +-- gcc/testsuite/ChangeLog | 4 ++ gcc/testsuite/gcc.c-torture/execute/simd-5.c | 59 ++++++++++++++++++++++++++++ 4 files changed, 73 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.c-torture/execute/simd-5.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b45f29a12bb..e544a23210a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2004-04-23 Daniel Jacobowitz + + * config/arm/arm.c (arm_output_epilogue): Reverse the order of + loading iWMMXt registers with a frame pointer. Use post-increment + without a frame pointer. + (arm_expand_prologue): Reverse the order of saving iWMMXt registers. + 2004-04-23 Paolo Bonzini * doc/invoke.texi (Optimize Options): Refer to "unit-at-a-time diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index d6c0c3d0421..1c2f2b2b494 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -9492,7 +9492,7 @@ arm_output_epilogue (rtx sibling) the live_regs_mask. */ lrm_count += (lrm_count % 2 ? 2 : 1); - for (reg = FIRST_IWMMXT_REGNUM; reg <= LAST_IWMMXT_REGNUM; reg++) + for (reg = LAST_IWMMXT_REGNUM; reg >= FIRST_IWMMXT_REGNUM; reg--) if (regs_ever_live[reg] && !call_used_regs[reg]) { asm_fprintf (f, "\twldrd\t%r, [%r, #-%d]\n", @@ -9613,7 +9613,7 @@ arm_output_epilogue (rtx sibling) if (TARGET_IWMMXT) for (reg = FIRST_IWMMXT_REGNUM; reg <= LAST_IWMMXT_REGNUM; reg++) if (regs_ever_live[reg] && !call_used_regs[reg]) - asm_fprintf (f, "\twldrd\t%r, [%r, #+8]!\n", reg, SP_REGNUM); + asm_fprintf (f, "\twldrd\t%r, [%r], #8\n", reg, SP_REGNUM); /* If we can, restore the LR into the PC. */ if (ARM_FUNC_TYPE (func_type) == ARM_FT_NORMAL @@ -10339,7 +10339,7 @@ arm_expand_prologue (void) } if (TARGET_IWMMXT) - for (reg = FIRST_IWMMXT_REGNUM; reg <= LAST_IWMMXT_REGNUM; reg++) + for (reg = LAST_IWMMXT_REGNUM; reg >= FIRST_IWMMXT_REGNUM; reg--) if (regs_ever_live[reg] && ! call_used_regs [reg]) { insn = gen_rtx_PRE_DEC (V2SImode, stack_pointer_rtx); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index b57694e76f4..f25bfd1b0c7 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2004-04-23 Daniel Jacobowitz + + * gcc.c-torture/execute/simd-5.c: New test. + 2004-04-23 Giovanni Bajo PR c++/15064 diff --git a/gcc/testsuite/gcc.c-torture/execute/simd-5.c b/gcc/testsuite/gcc.c-torture/execute/simd-5.c new file mode 100644 index 00000000000..f0584328716 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/execute/simd-5.c @@ -0,0 +1,59 @@ +/* Test saving and restoring of SIMD registers. */ + +typedef short Q __attribute__((vector_size(8))); + +Q q1 = {1, 2}, q2 = {3, 4}, q3 = {5, 6}, q4 = {7, 8}; + +Q w1, w2, w3, w4; +Q z1, z2, z3, z4; + +volatile int dummy; + +void __attribute__((__noinline__)) +func0 (void) +{ + dummy = 1; +} + +void __attribute__((__noinline__)) +func1 (void) +{ + Q a, b; + a = q1 * q2; + b = q3 * q4; + w1 = a; + w2 = b; + func0 (); + w3 = a; + w4 = b; +} + +void __attribute__((__noinline__)) +func2 (void) +{ + Q a, b; + a = q1 + q2; + b = q3 - q4; + z1 = a; + z2 = b; + func1 (); + z3 = a; + z4 = b; +} + +int +main (void) +{ + func2 (); + + if (memcmp (&w1, &w3, sizeof (Q)) != 0) + abort (); + if (memcmp (&w2, &w4, sizeof (Q)) != 0) + abort (); + if (memcmp (&z1, &z3, sizeof (Q)) != 0) + abort (); + if (memcmp (&z2, &z4, sizeof (Q)) != 0) + abort (); + + return 0; +} -- 2.11.0