From 7016928332a78407b6cee06755e4b400bfd86487 Mon Sep 17 00:00:00 2001 From: hjl Date: Thu, 5 Apr 2007 21:16:37 +0000 Subject: [PATCH] 2007-04-05 Uros Bizjak H.J. Lu PR target/31478 * config/i386/sse.md (sse2_umulv2siv2di3): Use V4SImode instead of V8HImode when calling ix86_binary_operator_ok. (sse2_pmaddwd): Call ix86_binary_operator_ok. (sdot_prodv8hi): Operands 1 and 2 must be register. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@123527 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 9 +++++++++ gcc/config/i386/sse.md | 8 ++++---- 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4f5f8f5df4a..bef1dfba51c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2007-04-05 Uros Bizjak + H.J. Lu + + PR target/31478 + * config/i386/sse.md (sse2_umulv2siv2di3): Use V4SImode instead + of V8HImode when calling ix86_binary_operator_ok. + (sse2_pmaddwd): Call ix86_binary_operator_ok. + (sdot_prodv8hi): Operands 1 and 2 must be register. + 2007-04-05 Alexandre Oliva * tree-sra.c (try_instantiate_multiple_fields): Needlessly diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 8b7d75d912b..4935653b17f 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -2752,7 +2752,7 @@ (vec_select:V2SI (match_operand:V4SI 2 "nonimmediate_operand" "xm") (parallel [(const_int 0) (const_int 2)])))))] - "TARGET_SSE2 && ix86_binary_operator_ok (MULT, V8HImode, operands)" + "TARGET_SSE2 && ix86_binary_operator_ok (MULT, V4SImode, operands)" "pmuludq\t{%2, %0|%0, %2}" [(set_attr "type" "sseimul") (set_attr "mode" "TI")]) @@ -2788,7 +2788,7 @@ (const_int 3) (const_int 5) (const_int 7)]))))))] - "TARGET_SSE2" + "TARGET_SSE2 && ix86_binary_operator_ok (MULT, V8HImode, operands)" "pmaddwd\t{%2, %0|%0, %2}" [(set_attr "type" "sseiadd") (set_attr "mode" "TI")]) @@ -3041,8 +3041,8 @@ (define_expand "sdot_prodv8hi" [(match_operand:V4SI 0 "register_operand" "") - (match_operand:V8HI 1 "nonimmediate_operand" "") - (match_operand:V8HI 2 "nonimmediate_operand" "") + (match_operand:V8HI 1 "register_operand" "") + (match_operand:V8HI 2 "register_operand" "") (match_operand:V4SI 3 "register_operand" "")] "TARGET_SSE2" { -- 2.11.0