X-Git-Url: http://git.sourceforge.jp/view?a=blobdiff_plain;f=gcc%2Frtlanal.c;h=da9774e488befcad3885d7c6e8d8c5c80e1c828e;hb=41b60827878f5f840120c95c52846ce0fe072c3f;hp=7e79a8abeec2df08bde5e99b1c77395244e94f17;hpb=29cd975191d09486fbbc2de22f78a6e364b48913;p=pf3gnuchains%2Fgcc-fork.git diff --git a/gcc/rtlanal.c b/gcc/rtlanal.c index 7e79a8abeec..da9774e488b 100644 --- a/gcc/rtlanal.c +++ b/gcc/rtlanal.c @@ -1,6 +1,6 @@ /* Analyze RTL for C-Compiler Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, - 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. + 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. This file is part of GCC. @@ -33,7 +33,6 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA #include "output.h" #include "tm_p.h" #include "flags.h" -#include "basic-block.h" #include "real.h" #include "regs.h" #include "function.h" @@ -41,12 +40,11 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA /* Forward declarations */ static int global_reg_mentioned_p_1 (rtx *, void *); static void set_of_1 (rtx, rtx, void *); -static void insn_dependent_p_1 (rtx, rtx, void *); +static bool covers_regno_p (rtx, unsigned int); +static bool covers_regno_no_parallel_p (rtx, unsigned int); static int rtx_referenced_p_1 (rtx *, void *); static int computed_jump_p_1 (rtx); static void parms_set (rtx, rtx, void *); -static bool hoist_test_store (rtx, rtx, regset); -static void hoist_update_store (rtx, rtx *, rtx, rtx); static unsigned HOST_WIDE_INT cached_nonzero_bits (rtx, enum machine_mode, rtx, enum machine_mode, @@ -60,6 +58,10 @@ static unsigned int cached_num_sign_bit_copies (rtx, enum machine_mode, rtx, static unsigned int num_sign_bit_copies1 (rtx, enum machine_mode, rtx, enum machine_mode, unsigned int); +/* Offset of the first 'e', 'E' or 'V' operand for each rtx code, or + -1 if a code has no such operand. */ +static int non_rtx_starting_operands[NUM_RTX_CODE]; + /* Bit flags that specify the machine subtype we are compiling for. Bits are tested using macros TARGET_... defined in the tm.h file and set by `-m...' switches. Must be defined in rtlanal.c. */ @@ -650,19 +652,6 @@ no_labels_between_p (rtx beg, rtx end) return 1; } -/* Return 1 if in between BEG and END, exclusive of BEG and END, there is - no JUMP_INSN insn. */ - -int -no_jumps_between_p (rtx beg, rtx end) -{ - rtx p; - for (p = NEXT_INSN (beg); p != end; p = NEXT_INSN (p)) - if (JUMP_P (p)) - return 0; - return 1; -} - /* Nonzero if register REG is used in an insn between FROM_INSN and TO_INSN (exclusive of those two). */ @@ -760,27 +749,6 @@ reg_referenced_p (rtx x, rtx body) return 0; } } - -/* Nonzero if register REG is referenced in an insn between - FROM_INSN and TO_INSN (exclusive of those two). Sets of REG do - not count. */ - -int -reg_referenced_between_p (rtx reg, rtx from_insn, rtx to_insn) -{ - rtx insn; - - if (from_insn == to_insn) - return 0; - - for (insn = NEXT_INSN (from_insn); insn != to_insn; insn = NEXT_INSN (insn)) - if (INSN_P (insn) - && (reg_referenced_p (reg, PATTERN (insn)) - || (CALL_P (insn) - && find_reg_fusage (insn, USE, reg)))) - return 1; - return 0; -} /* Nonzero if register REG is set or clobbered in an insn between FROM_INSN and TO_INSN (exclusive of those two). */ @@ -820,51 +788,6 @@ reg_set_p (rtx reg, rtx insn) } /* Similar to reg_set_between_p, but check all registers in X. Return 0 - only if none of them are modified between START and END. Do not - consider non-registers one way or the other. */ - -int -regs_set_between_p (rtx x, rtx start, rtx end) -{ - enum rtx_code code = GET_CODE (x); - const char *fmt; - int i, j; - - switch (code) - { - case CONST_INT: - case CONST_DOUBLE: - case CONST_VECTOR: - case CONST: - case SYMBOL_REF: - case LABEL_REF: - case PC: - case CC0: - return 0; - - case REG: - return reg_set_between_p (x, start, end); - - default: - break; - } - - fmt = GET_RTX_FORMAT (code); - for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) - { - if (fmt[i] == 'e' && regs_set_between_p (XEXP (x, i), start, end)) - return 1; - - else if (fmt[i] == 'E') - for (j = XVECLEN (x, i) - 1; j >= 0; j--) - if (regs_set_between_p (XVECEXP (x, i, j), start, end)) - return 1; - } - - return 0; -} - -/* Similar to reg_set_between_p, but check all registers in X. Return 0 only if none of them are modified between START and END. Return 1 if X contains a MEM; this routine does usememory aliasing. */ @@ -894,10 +817,10 @@ modified_between_p (rtx x, rtx start, rtx end) return 1; case MEM: - if (MEM_READONLY_P (x)) - return 0; if (modified_between_p (XEXP (x, 0), start, end)) return 1; + if (MEM_READONLY_P (x)) + return 0; for (insn = NEXT_INSN (start); insn != end; insn = NEXT_INSN (insn)) if (memory_modified_in_insn_p (x, insn)) return 1; @@ -952,10 +875,10 @@ modified_in_p (rtx x, rtx insn) return 1; case MEM: - if (MEM_READONLY_P (x)) - return 0; if (modified_in_p (XEXP (x, 0), insn)) return 1; + if (MEM_READONLY_P (x)) + return 0; if (memory_modified_in_insn_p (x, insn)) return 1; return 0; @@ -982,41 +905,6 @@ modified_in_p (rtx x, rtx insn) return 0; } - -/* Return true if anything in insn X is (anti,output,true) dependent on - anything in insn Y. */ - -int -insn_dependent_p (rtx x, rtx y) -{ - rtx tmp; - - gcc_assert (INSN_P (x)); - gcc_assert (INSN_P (y)); - - tmp = PATTERN (y); - note_stores (PATTERN (x), insn_dependent_p_1, &tmp); - if (tmp == NULL_RTX) - return 1; - - tmp = PATTERN (x); - note_stores (PATTERN (y), insn_dependent_p_1, &tmp); - if (tmp == NULL_RTX) - return 1; - - return 0; -} - -/* A helper routine for insn_dependent_p called through note_stores. */ - -static void -insn_dependent_p_1 (rtx x, rtx pat ATTRIBUTE_UNUSED, void *data) -{ - rtx * pinsn = (rtx *) data; - - if (*pinsn && reg_mentioned_p (x, *pinsn)) - *pinsn = NULL_RTX; -} /* Helper function for set_of. */ struct set_of_data @@ -1146,8 +1034,7 @@ set_noop_p (rtx set) if (MEM_P (dst) && MEM_P (src)) return rtx_equal_p (dst, src) && !side_effects_p (dst); - if (GET_CODE (dst) == SIGN_EXTRACT - || GET_CODE (dst) == ZERO_EXTRACT) + if (GET_CODE (dst) == ZERO_EXTRACT) return rtx_equal_p (XEXP (dst, 0), src) && ! BYTES_BIG_ENDIAN && XEXP (dst, 2) == const0_rtx && !side_effects_p (src); @@ -1476,7 +1363,6 @@ note_stores (rtx x, void (*fun) (rtx, rtx, void *), void *data) && (!REG_P (SUBREG_REG (dest)) || REGNO (SUBREG_REG (dest)) >= FIRST_PSEUDO_REGISTER)) || GET_CODE (dest) == ZERO_EXTRACT - || GET_CODE (dest) == SIGN_EXTRACT || GET_CODE (dest) == STRICT_LOW_PART) dest = XEXP (dest, 0); @@ -1585,8 +1471,8 @@ note_uses (rtx *pbody, void (*fun) (rtx *, void *), void *data) This will be true if X is (cc0) or if X is a register and X dies in INSN or because INSN entirely sets X. - "Entirely set" means set directly and not through a SUBREG, - ZERO_EXTRACT or SIGN_EXTRACT, so no trace of the old contents remains. + "Entirely set" means set directly and not through a SUBREG, or + ZERO_EXTRACT, so no trace of the old contents remains. Likewise, REG_INC does not count. REG may be a hard or pseudo reg. Renumbering is not taken into account, @@ -1621,13 +1507,64 @@ dead_or_set_p (rtx insn, rtx x) return 1; } +/* Return TRUE iff DEST is a register or subreg of a register and + doesn't change the number of words of the inner register, and any + part of the register is TEST_REGNO. */ + +static bool +covers_regno_no_parallel_p (rtx dest, unsigned int test_regno) +{ + unsigned int regno, endregno; + + if (GET_CODE (dest) == SUBREG + && (((GET_MODE_SIZE (GET_MODE (dest)) + + UNITS_PER_WORD - 1) / UNITS_PER_WORD) + == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) + + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) + dest = SUBREG_REG (dest); + + if (!REG_P (dest)) + return false; + + regno = REGNO (dest); + endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 + : regno + hard_regno_nregs[regno][GET_MODE (dest)]); + return (test_regno >= regno && test_regno < endregno); +} + +/* Like covers_regno_no_parallel_p, but also handles PARALLELs where + any member matches the covers_regno_no_parallel_p criteria. */ + +static bool +covers_regno_p (rtx dest, unsigned int test_regno) +{ + if (GET_CODE (dest) == PARALLEL) + { + /* Some targets place small structures in registers for return + values of functions, and those registers are wrapped in + PARALLELs that we may see as the destination of a SET. */ + int i; + + for (i = XVECLEN (dest, 0) - 1; i >= 0; i--) + { + rtx inner = XEXP (XVECEXP (dest, 0, i), 0); + if (inner != NULL_RTX + && covers_regno_no_parallel_p (inner, test_regno)) + return true; + } + + return false; + } + else + return covers_regno_no_parallel_p (dest, test_regno); +} + /* Utility function for dead_or_set_p to check an individual register. Also called from flow.c. */ int dead_or_set_regno_p (rtx insn, unsigned int test_regno) { - unsigned int regno, endregno; rtx pattern; /* See if there is a death note for something that includes TEST_REGNO. */ @@ -1644,28 +1581,7 @@ dead_or_set_regno_p (rtx insn, unsigned int test_regno) pattern = COND_EXEC_CODE (pattern); if (GET_CODE (pattern) == SET) - { - rtx dest = SET_DEST (pattern); - - /* A value is totally replaced if it is the destination or the - destination is a SUBREG of REGNO that does not change the number of - words in it. */ - if (GET_CODE (dest) == SUBREG - && (((GET_MODE_SIZE (GET_MODE (dest)) - + UNITS_PER_WORD - 1) / UNITS_PER_WORD) - == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) - dest = SUBREG_REG (dest); - - if (!REG_P (dest)) - return 0; - - regno = REGNO (dest); - endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 - : regno + hard_regno_nregs[regno][GET_MODE (dest)]); - - return (test_regno >= regno && test_regno < endregno); - } + return covers_regno_p (SET_DEST (pattern), test_regno); else if (GET_CODE (pattern) == PARALLEL) { int i; @@ -1677,27 +1593,9 @@ dead_or_set_regno_p (rtx insn, unsigned int test_regno) if (GET_CODE (body) == COND_EXEC) body = COND_EXEC_CODE (body); - if (GET_CODE (body) == SET || GET_CODE (body) == CLOBBER) - { - rtx dest = SET_DEST (body); - - if (GET_CODE (dest) == SUBREG - && (((GET_MODE_SIZE (GET_MODE (dest)) - + UNITS_PER_WORD - 1) / UNITS_PER_WORD) - == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - + UNITS_PER_WORD - 1) / UNITS_PER_WORD))) - dest = SUBREG_REG (dest); - - if (!REG_P (dest)) - continue; - - regno = REGNO (dest); - endregno = (regno >= FIRST_PSEUDO_REGISTER ? regno + 1 - : regno + hard_regno_nregs[regno][GET_MODE (dest)]); - - if (test_regno >= regno && test_regno < endregno) - return 1; - } + if ((GET_CODE (body) == SET || GET_CODE (body) == CLOBBER) + && covers_regno_p (SET_DEST (body), test_regno)) + return 1; } } @@ -2207,11 +2105,9 @@ may_trap_p (rtx x) case UMOD: if (HONOR_SNANS (GET_MODE (x))) return 1; - if (! CONSTANT_P (XEXP (x, 1)) - || (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT - && flag_trapping_math)) - return 1; - if (XEXP (x, 1) == const0_rtx) + if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) + return flag_trapping_math; + if (!CONSTANT_P (XEXP (x, 1)) || (XEXP (x, 1) == const0_rtx)) return 1; break; @@ -2730,6 +2626,82 @@ computed_jump_p (rtx insn) return 0; } +/* Optimized loop of for_each_rtx, trying to avoid useless recursive + calls. Processes the subexpressions of EXP and passes them to F. */ +static int +for_each_rtx_1 (rtx exp, int n, rtx_function f, void *data) +{ + int result, i, j; + const char *format = GET_RTX_FORMAT (GET_CODE (exp)); + rtx *x; + + for (; format[n] != '\0'; n++) + { + switch (format[n]) + { + case 'e': + /* Call F on X. */ + x = &XEXP (exp, n); + result = (*f) (x, data); + if (result == -1) + /* Do not traverse sub-expressions. */ + continue; + else if (result != 0) + /* Stop the traversal. */ + return result; + + if (*x == NULL_RTX) + /* There are no sub-expressions. */ + continue; + + i = non_rtx_starting_operands[GET_CODE (*x)]; + if (i >= 0) + { + result = for_each_rtx_1 (*x, i, f, data); + if (result != 0) + return result; + } + break; + + case 'V': + case 'E': + if (XVEC (exp, n) == 0) + continue; + for (j = 0; j < XVECLEN (exp, n); ++j) + { + /* Call F on X. */ + x = &XVECEXP (exp, n, j); + result = (*f) (x, data); + if (result == -1) + /* Do not traverse sub-expressions. */ + continue; + else if (result != 0) + /* Stop the traversal. */ + return result; + + if (*x == NULL_RTX) + /* There are no sub-expressions. */ + continue; + + i = non_rtx_starting_operands[GET_CODE (*x)]; + if (i >= 0) + { + result = for_each_rtx_1 (*x, i, f, data); + if (result != 0) + return result; + } + } + break; + + default: + /* Nothing to do. */ + break; + } + } + + return 0; +} + /* Traverse X via depth-first search, calling F for each sub-expression (including X itself). F is also passed the DATA. If F returns -1, do not traverse sub-expressions, but continue @@ -2747,8 +2719,6 @@ int for_each_rtx (rtx *x, rtx_function f, void *data) { int result; - int length; - const char *format; int i; /* Call F on X. */ @@ -2764,43 +2734,14 @@ for_each_rtx (rtx *x, rtx_function f, void *data) /* There are no sub-expressions. */ return 0; - length = GET_RTX_LENGTH (GET_CODE (*x)); - format = GET_RTX_FORMAT (GET_CODE (*x)); - - for (i = 0; i < length; ++i) - { - switch (format[i]) - { - case 'e': - result = for_each_rtx (&XEXP (*x, i), f, data); - if (result != 0) - return result; - break; - - case 'V': - case 'E': - if (XVEC (*x, i) != 0) - { - int j; - for (j = 0; j < XVECLEN (*x, i); ++j) - { - result = for_each_rtx (&XVECEXP (*x, i, j), f, data); - if (result != 0) - return result; - } - } - break; - - default: - /* Nothing to do. */ - break; - } - - } + i = non_rtx_starting_operands[GET_CODE (*x)]; + if (i < 0) + return 0; - return 0; + return for_each_rtx_1 (*x, i, f, data); } + /* Searches X for any reference to REGNO, returning the rtx of the reference found if any. Otherwise, returns NULL_RTX. */ @@ -3216,12 +3157,15 @@ parms_set (rtx x, rtx pat ATTRIBUTE_UNUSED, void *data) } /* Look backward for first parameter to be loaded. + Note that loads of all parameters will not necessarily be + found if CSE has eliminated some of them (e.g., an argument + to the outer function is passed down as a parameter). Do not skip BOUNDARY. */ rtx find_first_parameter_load (rtx call_insn, rtx boundary) { struct parms_set_data parm; - rtx p, before; + rtx p, before, first_set; /* Since different machines initialize their parameter registers in different orders, assume nothing. Collect the set of all @@ -3243,6 +3187,7 @@ find_first_parameter_load (rtx call_insn, rtx boundary) parm.nregs++; } before = call_insn; + first_set = call_insn; /* Search backward for the first set of a register in this set. */ while (parm.nregs && before != boundary) @@ -3265,9 +3210,20 @@ find_first_parameter_load (rtx call_insn, rtx boundary) } if (INSN_P (before)) - note_stores (PATTERN (before), parms_set, &parm); + { + int nregs_old = parm.nregs; + note_stores (PATTERN (before), parms_set, &parm); + /* If we found something that did not set a parameter reg, + we're done. Do not keep going, as that might result + in hoisting an insn before the setting of a pseudo + that is used by the hoisted insn. */ + if (nregs_old != parm.nregs) + first_set = before; + else + break; + } } - return before; + return first_set; } /* Return true if we should avoid inserting code between INSN and preceding @@ -3303,260 +3259,6 @@ keep_with_call_p (rtx insn) return false; } -/* Return true when store to register X can be hoisted to the place - with LIVE registers (can be NULL). Value VAL contains destination - whose value will be used. */ - -static bool -hoist_test_store (rtx x, rtx val, regset live) -{ - if (GET_CODE (x) == SCRATCH) - return true; - - if (rtx_equal_p (x, val)) - return true; - - /* Allow subreg of X in case it is not writing just part of multireg pseudo. - Then we would need to update all users to care hoisting the store too. - Caller may represent that by specifying whole subreg as val. */ - - if (GET_CODE (x) == SUBREG && rtx_equal_p (SUBREG_REG (x), val)) - { - if (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD - && GET_MODE_BITSIZE (GET_MODE (x)) < - GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))) - return false; - return true; - } - if (GET_CODE (x) == SUBREG) - x = SUBREG_REG (x); - - /* Anything except register store is not hoistable. This includes the - partial stores to registers. */ - - if (!REG_P (x)) - return false; - - /* Pseudo registers can be always replaced by another pseudo to avoid - the side effect, for hard register we must ensure that they are dead. - Eventually we may want to add code to try turn pseudos to hards, but it - is unlikely useful. */ - - if (REGNO (x) < FIRST_PSEUDO_REGISTER) - { - int regno = REGNO (x); - int n = hard_regno_nregs[regno][GET_MODE (x)]; - - if (!live) - return false; - if (REGNO_REG_SET_P (live, regno)) - return false; - while (--n > 0) - if (REGNO_REG_SET_P (live, regno + n)) - return false; - } - return true; -} - - -/* Return true if INSN can be hoisted to place with LIVE hard registers - (LIVE can be NULL when unknown). VAL is expected to be stored by the insn - and used by the hoisting pass. */ - -bool -can_hoist_insn_p (rtx insn, rtx val, regset live) -{ - rtx pat = PATTERN (insn); - int i; - - /* It probably does not worth the complexity to handle multiple - set stores. */ - if (!single_set (insn)) - return false; - /* We can move CALL_INSN, but we need to check that all caller clobbered - regs are dead. */ - if (CALL_P (insn)) - return false; - /* In future we will handle hoisting of libcall sequences, but - give up for now. */ - if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) - return false; - switch (GET_CODE (pat)) - { - case SET: - if (!hoist_test_store (SET_DEST (pat), val, live)) - return false; - break; - case USE: - /* USES do have sick semantics, so do not move them. */ - return false; - break; - case CLOBBER: - if (!hoist_test_store (XEXP (pat, 0), val, live)) - return false; - break; - case PARALLEL: - for (i = 0; i < XVECLEN (pat, 0); i++) - { - rtx x = XVECEXP (pat, 0, i); - switch (GET_CODE (x)) - { - case SET: - if (!hoist_test_store (SET_DEST (x), val, live)) - return false; - break; - case USE: - /* We need to fix callers to really ensure availability - of all values insn uses, but for now it is safe to prohibit - hoisting of any insn having such a hidden uses. */ - return false; - break; - case CLOBBER: - if (!hoist_test_store (SET_DEST (x), val, live)) - return false; - break; - default: - break; - } - } - break; - default: - gcc_unreachable (); - } - return true; -} - -/* Update store after hoisting - replace all stores to pseudo registers - by new ones to avoid clobbering of values except for store to VAL that will - be updated to NEW. */ - -static void -hoist_update_store (rtx insn, rtx *xp, rtx val, rtx new) -{ - rtx x = *xp; - - if (GET_CODE (x) == SCRATCH) - return; - - if (GET_CODE (x) == SUBREG && SUBREG_REG (x) == val) - validate_change (insn, xp, - simplify_gen_subreg (GET_MODE (x), new, GET_MODE (new), - SUBREG_BYTE (x)), 1); - if (rtx_equal_p (x, val)) - { - validate_change (insn, xp, new, 1); - return; - } - if (GET_CODE (x) == SUBREG) - { - xp = &SUBREG_REG (x); - x = *xp; - } - - gcc_assert (REG_P (x)); - - /* We've verified that hard registers are dead, so we may keep the side - effect. Otherwise replace it by new pseudo. */ - if (REGNO (x) >= FIRST_PSEUDO_REGISTER) - validate_change (insn, xp, gen_reg_rtx (GET_MODE (x)), 1); - REG_NOTES (insn) - = alloc_EXPR_LIST (REG_UNUSED, *xp, REG_NOTES (insn)); -} - -/* Create a copy of INSN after AFTER replacing store of VAL to NEW - and each other side effect to pseudo register by new pseudo register. */ - -rtx -hoist_insn_after (rtx insn, rtx after, rtx val, rtx new) -{ - rtx pat; - int i; - rtx note; - int applied; - - insn = emit_copy_of_insn_after (insn, after); - pat = PATTERN (insn); - - /* Remove REG_UNUSED notes as we will re-emit them. */ - while ((note = find_reg_note (insn, REG_UNUSED, NULL_RTX))) - remove_note (insn, note); - - /* To get this working callers must ensure to move everything referenced - by REG_EQUAL/REG_EQUIV notes too. Lets remove them, it is probably - easier. */ - while ((note = find_reg_note (insn, REG_EQUAL, NULL_RTX))) - remove_note (insn, note); - while ((note = find_reg_note (insn, REG_EQUIV, NULL_RTX))) - remove_note (insn, note); - - /* Remove REG_DEAD notes as they might not be valid anymore in case - we create redundancy. */ - while ((note = find_reg_note (insn, REG_DEAD, NULL_RTX))) - remove_note (insn, note); - switch (GET_CODE (pat)) - { - case SET: - hoist_update_store (insn, &SET_DEST (pat), val, new); - break; - case USE: - break; - case CLOBBER: - hoist_update_store (insn, &XEXP (pat, 0), val, new); - break; - case PARALLEL: - for (i = 0; i < XVECLEN (pat, 0); i++) - { - rtx x = XVECEXP (pat, 0, i); - switch (GET_CODE (x)) - { - case SET: - hoist_update_store (insn, &SET_DEST (x), val, new); - break; - case USE: - break; - case CLOBBER: - hoist_update_store (insn, &SET_DEST (x), val, new); - break; - default: - break; - } - } - break; - default: - gcc_unreachable (); - } - applied = apply_change_group (); - gcc_assert (applied); - - return insn; -} - -rtx -hoist_insn_to_edge (rtx insn, edge e, rtx val, rtx new) -{ - rtx new_insn; - - /* We cannot insert instructions on an abnormal critical edge. - It will be easier to find the culprit if we die now. */ - gcc_assert (!(e->flags & EDGE_ABNORMAL) || !EDGE_CRITICAL_P (e)); - - /* Do not use emit_insn_on_edge as we want to preserve notes and similar - stuff. We also emit CALL_INSNS and firends. */ - if (e->insns.r == NULL_RTX) - { - start_sequence (); - emit_note (NOTE_INSN_DELETED); - } - else - push_to_sequence (e->insns.r); - - new_insn = hoist_insn_after (insn, get_last_insn (), val, new); - - e->insns.r = get_insns (); - end_sequence (); - return new_insn; -} - /* Return true if LABEL is a target of JUMP_INSN. This applies only to non-complex jumps. That is, direct unconditional, conditional, and tablejumps, but not computed jumps or returns. It also does @@ -3630,6 +3332,7 @@ rtx_cost (rtx x, enum rtx_code outer_code ATTRIBUTE_UNUSED) return 0; case SUBREG: + total = 0; /* If we can't tie these modes, make this expensive. The larger the mode, the more expensive it is. */ if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x)))) @@ -4659,3 +4362,329 @@ insn_rtx_cost (rtx pat) cost = rtx_cost (SET_SRC (set), SET); return cost > 0 ? cost : COSTS_N_INSNS (1); } + +/* Given an insn INSN and condition COND, return the condition in a + canonical form to simplify testing by callers. Specifically: + + (1) The code will always be a comparison operation (EQ, NE, GT, etc.). + (2) Both operands will be machine operands; (cc0) will have been replaced. + (3) If an operand is a constant, it will be the second operand. + (4) (LE x const) will be replaced with (LT x ) and similarly + for GE, GEU, and LEU. + + If the condition cannot be understood, or is an inequality floating-point + comparison which needs to be reversed, 0 will be returned. + + If REVERSE is nonzero, then reverse the condition prior to canonizing it. + + If EARLIEST is nonzero, it is a pointer to a place where the earliest + insn used in locating the condition was found. If a replacement test + of the condition is desired, it should be placed in front of that + insn and we will be sure that the inputs are still valid. + + If WANT_REG is nonzero, we wish the condition to be relative to that + register, if possible. Therefore, do not canonicalize the condition + further. If ALLOW_CC_MODE is nonzero, allow the condition returned + to be a compare to a CC mode register. + + If VALID_AT_INSN_P, the condition must be valid at both *EARLIEST + and at INSN. */ + +rtx +canonicalize_condition (rtx insn, rtx cond, int reverse, rtx *earliest, + rtx want_reg, int allow_cc_mode, int valid_at_insn_p) +{ + enum rtx_code code; + rtx prev = insn; + rtx set; + rtx tem; + rtx op0, op1; + int reverse_code = 0; + enum machine_mode mode; + + code = GET_CODE (cond); + mode = GET_MODE (cond); + op0 = XEXP (cond, 0); + op1 = XEXP (cond, 1); + + if (reverse) + code = reversed_comparison_code (cond, insn); + if (code == UNKNOWN) + return 0; + + if (earliest) + *earliest = insn; + + /* If we are comparing a register with zero, see if the register is set + in the previous insn to a COMPARE or a comparison operation. Perform + the same tests as a function of STORE_FLAG_VALUE as find_comparison_args + in cse.c */ + + while ((GET_RTX_CLASS (code) == RTX_COMPARE + || GET_RTX_CLASS (code) == RTX_COMM_COMPARE) + && op1 == CONST0_RTX (GET_MODE (op0)) + && op0 != want_reg) + { + /* Set nonzero when we find something of interest. */ + rtx x = 0; + +#ifdef HAVE_cc0 + /* If comparison with cc0, import actual comparison from compare + insn. */ + if (op0 == cc0_rtx) + { + if ((prev = prev_nonnote_insn (prev)) == 0 + || !NONJUMP_INSN_P (prev) + || (set = single_set (prev)) == 0 + || SET_DEST (set) != cc0_rtx) + return 0; + + op0 = SET_SRC (set); + op1 = CONST0_RTX (GET_MODE (op0)); + if (earliest) + *earliest = prev; + } +#endif + + /* If this is a COMPARE, pick up the two things being compared. */ + if (GET_CODE (op0) == COMPARE) + { + op1 = XEXP (op0, 1); + op0 = XEXP (op0, 0); + continue; + } + else if (!REG_P (op0)) + break; + + /* Go back to the previous insn. Stop if it is not an INSN. We also + stop if it isn't a single set or if it has a REG_INC note because + we don't want to bother dealing with it. */ + + if ((prev = prev_nonnote_insn (prev)) == 0 + || !NONJUMP_INSN_P (prev) + || FIND_REG_INC_NOTE (prev, NULL_RTX)) + break; + + set = set_of (op0, prev); + + if (set + && (GET_CODE (set) != SET + || !rtx_equal_p (SET_DEST (set), op0))) + break; + + /* If this is setting OP0, get what it sets it to if it looks + relevant. */ + if (set) + { + enum machine_mode inner_mode = GET_MODE (SET_DEST (set)); +#ifdef FLOAT_STORE_FLAG_VALUE + REAL_VALUE_TYPE fsfv; +#endif + + /* ??? We may not combine comparisons done in a CCmode with + comparisons not done in a CCmode. This is to aid targets + like Alpha that have an IEEE compliant EQ instruction, and + a non-IEEE compliant BEQ instruction. The use of CCmode is + actually artificial, simply to prevent the combination, but + should not affect other platforms. + + However, we must allow VOIDmode comparisons to match either + CCmode or non-CCmode comparison, because some ports have + modeless comparisons inside branch patterns. + + ??? This mode check should perhaps look more like the mode check + in simplify_comparison in combine. */ + + if ((GET_CODE (SET_SRC (set)) == COMPARE + || (((code == NE + || (code == LT + && GET_MODE_CLASS (inner_mode) == MODE_INT + && (GET_MODE_BITSIZE (inner_mode) + <= HOST_BITS_PER_WIDE_INT) + && (STORE_FLAG_VALUE + & ((HOST_WIDE_INT) 1 + << (GET_MODE_BITSIZE (inner_mode) - 1)))) +#ifdef FLOAT_STORE_FLAG_VALUE + || (code == LT + && GET_MODE_CLASS (inner_mode) == MODE_FLOAT + && (fsfv = FLOAT_STORE_FLAG_VALUE (inner_mode), + REAL_VALUE_NEGATIVE (fsfv))) +#endif + )) + && COMPARISON_P (SET_SRC (set)))) + && (((GET_MODE_CLASS (mode) == MODE_CC) + == (GET_MODE_CLASS (inner_mode) == MODE_CC)) + || mode == VOIDmode || inner_mode == VOIDmode)) + x = SET_SRC (set); + else if (((code == EQ + || (code == GE + && (GET_MODE_BITSIZE (inner_mode) + <= HOST_BITS_PER_WIDE_INT) + && GET_MODE_CLASS (inner_mode) == MODE_INT + && (STORE_FLAG_VALUE + & ((HOST_WIDE_INT) 1 + << (GET_MODE_BITSIZE (inner_mode) - 1)))) +#ifdef FLOAT_STORE_FLAG_VALUE + || (code == GE + && GET_MODE_CLASS (inner_mode) == MODE_FLOAT + && (fsfv = FLOAT_STORE_FLAG_VALUE (inner_mode), + REAL_VALUE_NEGATIVE (fsfv))) +#endif + )) + && COMPARISON_P (SET_SRC (set)) + && (((GET_MODE_CLASS (mode) == MODE_CC) + == (GET_MODE_CLASS (inner_mode) == MODE_CC)) + || mode == VOIDmode || inner_mode == VOIDmode)) + + { + reverse_code = 1; + x = SET_SRC (set); + } + else + break; + } + + else if (reg_set_p (op0, prev)) + /* If this sets OP0, but not directly, we have to give up. */ + break; + + if (x) + { + /* If the caller is expecting the condition to be valid at INSN, + make sure X doesn't change before INSN. */ + if (valid_at_insn_p) + if (modified_in_p (x, prev) || modified_between_p (x, prev, insn)) + break; + if (COMPARISON_P (x)) + code = GET_CODE (x); + if (reverse_code) + { + code = reversed_comparison_code (x, prev); + if (code == UNKNOWN) + return 0; + reverse_code = 0; + } + + op0 = XEXP (x, 0), op1 = XEXP (x, 1); + if (earliest) + *earliest = prev; + } + } + + /* If constant is first, put it last. */ + if (CONSTANT_P (op0)) + code = swap_condition (code), tem = op0, op0 = op1, op1 = tem; + + /* If OP0 is the result of a comparison, we weren't able to find what + was really being compared, so fail. */ + if (!allow_cc_mode + && GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC) + return 0; + + /* Canonicalize any ordered comparison with integers involving equality + if we can do computations in the relevant mode and we do not + overflow. */ + + if (GET_MODE_CLASS (GET_MODE (op0)) != MODE_CC + && GET_CODE (op1) == CONST_INT + && GET_MODE (op0) != VOIDmode + && GET_MODE_BITSIZE (GET_MODE (op0)) <= HOST_BITS_PER_WIDE_INT) + { + HOST_WIDE_INT const_val = INTVAL (op1); + unsigned HOST_WIDE_INT uconst_val = const_val; + unsigned HOST_WIDE_INT max_val + = (unsigned HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (op0)); + + switch (code) + { + case LE: + if ((unsigned HOST_WIDE_INT) const_val != max_val >> 1) + code = LT, op1 = gen_int_mode (const_val + 1, GET_MODE (op0)); + break; + + /* When cross-compiling, const_val might be sign-extended from + BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */ + case GE: + if ((HOST_WIDE_INT) (const_val & max_val) + != (((HOST_WIDE_INT) 1 + << (GET_MODE_BITSIZE (GET_MODE (op0)) - 1)))) + code = GT, op1 = gen_int_mode (const_val - 1, GET_MODE (op0)); + break; + + case LEU: + if (uconst_val < max_val) + code = LTU, op1 = gen_int_mode (uconst_val + 1, GET_MODE (op0)); + break; + + case GEU: + if (uconst_val != 0) + code = GTU, op1 = gen_int_mode (uconst_val - 1, GET_MODE (op0)); + break; + + default: + break; + } + } + + /* Never return CC0; return zero instead. */ + if (CC0_P (op0)) + return 0; + + return gen_rtx_fmt_ee (code, VOIDmode, op0, op1); +} + +/* Given a jump insn JUMP, return the condition that will cause it to branch + to its JUMP_LABEL. If the condition cannot be understood, or is an + inequality floating-point comparison which needs to be reversed, 0 will + be returned. + + If EARLIEST is nonzero, it is a pointer to a place where the earliest + insn used in locating the condition was found. If a replacement test + of the condition is desired, it should be placed in front of that + insn and we will be sure that the inputs are still valid. If EARLIEST + is null, the returned condition will be valid at INSN. + + If ALLOW_CC_MODE is nonzero, allow the condition returned to be a + compare CC mode register. + + VALID_AT_INSN_P is the same as for canonicalize_condition. */ + +rtx +get_condition (rtx jump, rtx *earliest, int allow_cc_mode, int valid_at_insn_p) +{ + rtx cond; + int reverse; + rtx set; + + /* If this is not a standard conditional jump, we can't parse it. */ + if (!JUMP_P (jump) + || ! any_condjump_p (jump)) + return 0; + set = pc_set (jump); + + cond = XEXP (SET_SRC (set), 0); + + /* If this branches to JUMP_LABEL when the condition is false, reverse + the condition. */ + reverse + = GET_CODE (XEXP (SET_SRC (set), 2)) == LABEL_REF + && XEXP (XEXP (SET_SRC (set), 2), 0) == JUMP_LABEL (jump); + + return canonicalize_condition (jump, cond, reverse, earliest, NULL_RTX, + allow_cc_mode, valid_at_insn_p); +} + + +/* Initialize non_rtx_starting_operands, which is used to speed up + for_each_rtx. */ +void +init_rtlanal (void) +{ + int i; + for (i = 0; i < NUM_RTX_CODE; i++) + { + const char *format = GET_RTX_FORMAT (i); + const char *first = strpbrk (format, "eEV"); + non_rtx_starting_operands[i] = first ? first - format : -1; + } +}