X-Git-Url: http://git.sourceforge.jp/view?a=blobdiff_plain;f=gcc%2Fregrename.c;h=1823558f4517f2e4a62b84b808fcaa703bd3d24e;hb=0a9ca5de5663f6e84b301bd4b08f6590de0c8c5d;hp=e4b7894d73705eaadaba49e9430fb1609e9865c0;hpb=6cf818413ee4807efba3073e69bfbf5b97fcd2b0;p=pf3gnuchains%2Fgcc-fork.git diff --git a/gcc/regrename.c b/gcc/regrename.c index e4b7894d737..1823558f451 100644 --- a/gcc/regrename.c +++ b/gcc/regrename.c @@ -1,12 +1,12 @@ /* Register renaming for the GNU compiler. - Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005 - Free Software Foundation, Inc. + Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, + 2010 Free Software Foundation, Inc. This file is part of GCC. GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2, or (at your option) + the Free Software Foundation; either version 3, or (at your option) any later version. GCC is distributed in the hope that it will be useful, but WITHOUT @@ -15,18 +15,18 @@ License for more details. You should have received a copy of the GNU General Public License - along with GCC; see the file COPYING. If not, write to the Free - Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA - 02110-1301, USA. */ + along with GCC; see the file COPYING3. If not see + . */ #include "config.h" #include "system.h" #include "coretypes.h" #include "tm.h" -#include "rtl.h" +#include "rtl-error.h" #include "tm_p.h" #include "insn-config.h" #include "regs.h" +#include "addresses.h" #include "hard-reg-set.h" #include "basic-block.h" #include "reload.h" @@ -34,29 +34,52 @@ #include "function.h" #include "recog.h" #include "flags.h" -#include "toplev.h" #include "obstack.h" #include "timevar.h" #include "tree-pass.h" - -struct du_chain -{ - struct du_chain *next_chain; - struct du_chain *next_use; - - rtx insn; - rtx *loc; - ENUM_BITFIELD(reg_class) cl : 16; - unsigned int need_caller_save_reg:1; - unsigned int earlyclobber:1; -}; +#include "df.h" +#include "target.h" +#include "emit-rtl.h" +#include "regrename.h" + +/* This file implements the RTL register renaming pass of the compiler. It is + a semi-local pass whose goal is to maximize the usage of the register file + of the processor by substituting registers for others in the solution given + by the register allocator. The algorithm is as follows: + + 1. Local def/use chains are built: within each basic block, chains are + opened and closed; if a chain isn't closed at the end of the block, + it is dropped. We pre-open chains if we have already examined a + predecessor block and found chains live at the end which match + live registers at the start of the new block. + + 2. We try to combine the local chains across basic block boundaries by + comparing chains that were open at the start or end of a block to + those in successor/predecessor blocks. + + 3. For each chain, the set of possible renaming registers is computed. + This takes into account the renaming of previously processed chains. + Optionally, a preferred class is computed for the renaming register. + + 4. The best renaming register is computed for the chain in the above set, + using a round-robin allocation. If a preferred class exists, then the + round-robin allocation is done within the class first, if possible. + The round-robin allocation of renaming registers itself is global. + + 5. If a renaming register has been found, it is substituted in the chain. + + Targets can parameterize the pass by specifying a preferred class for the + renaming register for a given (super)class of registers to be renamed. */ + +#if HOST_BITS_PER_WIDE_INT <= MAX_RECOG_OPERANDS +#error "Use a different bitmap implementation for untracked_operands." +#endif enum scan_actions { - terminate_all_read, - terminate_overlapping_read, terminate_write, terminate_dead, + mark_all_read, mark_read, mark_write, /* mark_access is for marking the destination regs in @@ -67,458 +90,1111 @@ enum scan_actions static const char * const scan_actions_name[] = { - "terminate_all_read", - "terminate_overlapping_read", "terminate_write", "terminate_dead", + "mark_all_read", "mark_read", "mark_write", "mark_access" }; +/* TICK and THIS_TICK are used to record the last time we saw each + register. */ +static int tick[FIRST_PSEUDO_REGISTER]; +static int this_tick = 0; + static struct obstack rename_obstack; -static void do_replace (struct du_chain *, int); -static void scan_rtx_reg (rtx, rtx *, enum reg_class, - enum scan_actions, enum op_type, int); -static void scan_rtx_address (rtx, rtx *, enum reg_class, - enum scan_actions, enum machine_mode); -static void scan_rtx (rtx, rtx *, enum reg_class, enum scan_actions, - enum op_type, int); -static struct du_chain *build_def_use (basic_block); -static void dump_def_use_chain (struct du_chain *); -static void note_sets (rtx, rtx, void *); -static void clear_dead_regs (HARD_REG_SET *, enum machine_mode, rtx); -static void merge_overlapping_regs (basic_block, HARD_REG_SET *, - struct du_chain *); +/* If nonnull, the code calling into the register renamer requested + information about insn operands, and we store it here. */ +VEC(insn_rr_info, heap) *insn_rr; -/* Called through note_stores from update_life. Find sets of registers, and - record them in *DATA (which is actually a HARD_REG_SET *). */ +static void scan_rtx (rtx, rtx *, enum reg_class, enum scan_actions, + enum op_type); +static bool build_def_use (basic_block); -static void -note_sets (rtx x, rtx set ATTRIBUTE_UNUSED, void *data) -{ - HARD_REG_SET *pset = (HARD_REG_SET *) data; - unsigned int regno; - int nregs; +/* The id to be given to the next opened chain. */ +static unsigned current_id; - if (GET_CODE (x) == SUBREG) - x = SUBREG_REG (x); - if (!REG_P (x)) - return; - regno = REGNO (x); - nregs = hard_regno_nregs[regno][GET_MODE (x)]; +/* A mapping of unique id numbers to chains. */ +static VEC(du_head_p, heap) *id_to_chain; - /* There must not be pseudos at this point. */ - gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER); +/* List of currently open chains. */ +static struct du_head *open_chains; - while (nregs-- > 0) - SET_HARD_REG_BIT (*pset, regno + nregs); -} +/* Bitmap of open chains. The bits set always match the list found in + open_chains. */ +static bitmap_head open_chains_set; -/* Clear all registers from *PSET for which a note of kind KIND can be found - in the list NOTES. */ +/* Record the registers being tracked in open_chains. */ +static HARD_REG_SET live_in_chains; -static void -clear_dead_regs (HARD_REG_SET *pset, enum machine_mode kind, rtx notes) -{ - rtx note; - for (note = notes; note; note = XEXP (note, 1)) - if (REG_NOTE_KIND (note) == kind && REG_P (XEXP (note, 0))) - { - rtx reg = XEXP (note, 0); - unsigned int regno = REGNO (reg); - int nregs = hard_regno_nregs[regno][GET_MODE (reg)]; +/* Record the registers that are live but not tracked. The intersection + between this and live_in_chains is empty. */ +static HARD_REG_SET live_hard_regs; - /* There must not be pseudos at this point. */ - gcc_assert (regno + nregs <= FIRST_PSEUDO_REGISTER); +/* Set while scanning RTL if INSN_RR is nonnull, i.e. if the current analysis + is for a caller that requires operand data. Used in + record_operand_use. */ +static operand_rr_info *cur_operand; - while (nregs-- > 0) - CLEAR_HARD_REG_BIT (*pset, regno + nregs); - } +/* Return the chain corresponding to id number ID. Take into account that + chains may have been merged. */ +du_head_p +regrename_chain_from_id (unsigned int id) +{ + du_head_p first_chain = VEC_index (du_head_p, id_to_chain, id); + du_head_p chain = first_chain; + while (chain->id != id) + { + id = chain->id; + chain = VEC_index (du_head_p, id_to_chain, id); + } + first_chain->id = id; + return chain; } -/* For a def-use chain CHAIN in basic block B, find which registers overlap - its lifetime and set the corresponding bits in *PSET. */ +/* Dump all def/use chains, starting at id FROM. */ static void -merge_overlapping_regs (basic_block b, HARD_REG_SET *pset, - struct du_chain *chain) +dump_def_use_chain (int from) { - struct du_chain *t = chain; - rtx insn; - HARD_REG_SET live; - - REG_SET_TO_HARD_REG_SET (live, b->il.rtl->global_live_at_start); - insn = BB_HEAD (b); - while (t) + du_head_p head; + int i; + FOR_EACH_VEC_ELT_FROM (du_head_p, id_to_chain, i, head, from) { - /* Search forward until the next reference to the register to be - renamed. */ - while (insn != t->insn) + struct du_chain *this_du = head->first; + + fprintf (dump_file, "Register %s (%d):", + reg_names[head->regno], head->nregs); + while (this_du) { - if (INSN_P (insn)) - { - clear_dead_regs (&live, REG_DEAD, REG_NOTES (insn)); - note_stores (PATTERN (insn), note_sets, (void *) &live); - /* Only record currently live regs if we are inside the - reg's live range. */ - if (t != chain) - IOR_HARD_REG_SET (*pset, live); - clear_dead_regs (&live, REG_UNUSED, REG_NOTES (insn)); - } - insn = NEXT_INSN (insn); + fprintf (dump_file, " %d [%s]", INSN_UID (this_du->insn), + reg_class_names[this_du->cl]); + this_du = this_du->next_use; } + fprintf (dump_file, "\n"); + head = head->next_chain; + } +} + +static void +free_chain_data (void) +{ + int i; + du_head_p ptr; + for (i = 0; VEC_iterate(du_head_p, id_to_chain, i, ptr); i++) + bitmap_clear (&ptr->conflicts); - IOR_HARD_REG_SET (*pset, live); + VEC_free (du_head_p, heap, id_to_chain); +} - /* For the last reference, also merge in all registers set in the - same insn. - @@@ We only have take earlyclobbered sets into account. */ - if (! t->next_use) - note_stores (PATTERN (insn), note_sets, (void *) pset); +/* Walk all chains starting with CHAINS and record that they conflict with + another chain whose id is ID. */ - t = t->next_use; +static void +mark_conflict (struct du_head *chains, unsigned id) +{ + while (chains) + { + bitmap_set_bit (&chains->conflicts, id); + chains = chains->next_chain; } } -/* Perform register renaming on the current function. */ +/* Examine cur_operand, and if it is nonnull, record information about the + use THIS_DU which is part of the chain HEAD. */ static void -regrename_optimize (void) +record_operand_use (struct du_head *head, struct du_chain *this_du) { - int tick[FIRST_PSEUDO_REGISTER]; - int this_tick = 0; - basic_block bb; - char *first_obj; + if (cur_operand == NULL) + return; + gcc_assert (cur_operand->n_chains < MAX_REGS_PER_ADDRESS); + cur_operand->heads[cur_operand->n_chains] = head; + cur_operand->chains[cur_operand->n_chains++] = this_du; +} - memset (tick, 0, sizeof tick); +/* Create a new chain for THIS_NREGS registers starting at THIS_REGNO, + and record its occurrence in *LOC, which is being written to in INSN. + This access requires a register of class CL. */ - gcc_obstack_init (&rename_obstack); - first_obj = obstack_alloc (&rename_obstack, 0); +static du_head_p +create_new_chain (unsigned this_regno, unsigned this_nregs, rtx *loc, + rtx insn, enum reg_class cl) +{ + struct du_head *head = XOBNEW (&rename_obstack, struct du_head); + struct du_chain *this_du; + int nregs; - FOR_EACH_BB (bb) - { - struct du_chain *all_chains = 0; - HARD_REG_SET unavailable; - HARD_REG_SET regs_seen; + head->next_chain = open_chains; + head->regno = this_regno; + head->nregs = this_nregs; + head->need_caller_save_reg = 0; + head->cannot_rename = 0; - CLEAR_HARD_REG_SET (unavailable); + VEC_safe_push (du_head_p, heap, id_to_chain, head); + head->id = current_id++; - if (dump_file) - fprintf (dump_file, "\nBasic block %d:\n", bb->index); + bitmap_initialize (&head->conflicts, &bitmap_default_obstack); + bitmap_copy (&head->conflicts, &open_chains_set); + mark_conflict (open_chains, head->id); - all_chains = build_def_use (bb); + /* Since we're tracking this as a chain now, remove it from the + list of conflicting live hard registers and track it in + live_in_chains instead. */ + nregs = head->nregs; + while (nregs-- > 0) + { + SET_HARD_REG_BIT (live_in_chains, head->regno + nregs); + CLEAR_HARD_REG_BIT (live_hard_regs, head->regno + nregs); + } - if (dump_file) - dump_def_use_chain (all_chains); + COPY_HARD_REG_SET (head->hard_conflicts, live_hard_regs); + bitmap_set_bit (&open_chains_set, head->id); - CLEAR_HARD_REG_SET (unavailable); - /* Don't clobber traceback for noreturn functions. */ - if (frame_pointer_needed) - { - int i; + open_chains = head; + + if (dump_file) + { + fprintf (dump_file, "Creating chain %s (%d)", + reg_names[head->regno], head->id); + if (insn != NULL_RTX) + fprintf (dump_file, " at insn %d", INSN_UID (insn)); + fprintf (dump_file, "\n"); + } - for (i = hard_regno_nregs[FRAME_POINTER_REGNUM][Pmode]; i--;) - SET_HARD_REG_BIT (unavailable, FRAME_POINTER_REGNUM + i); + if (insn == NULL_RTX) + { + head->first = head->last = NULL; + return head; + } -#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM - for (i = hard_regno_nregs[HARD_FRAME_POINTER_REGNUM][Pmode]; i--;) - SET_HARD_REG_BIT (unavailable, HARD_FRAME_POINTER_REGNUM + i); -#endif - } + this_du = XOBNEW (&rename_obstack, struct du_chain); + head->first = head->last = this_du; - CLEAR_HARD_REG_SET (regs_seen); - while (all_chains) - { - int new_reg, best_new_reg; - int n_uses; - struct du_chain *this = all_chains; - struct du_chain *tmp, *last; - HARD_REG_SET this_unavailable; - int reg = REGNO (*this->loc); - int i; + this_du->next_use = 0; + this_du->loc = loc; + this_du->insn = insn; + this_du->cl = cl; + record_operand_use (head, this_du); + return head; +} - all_chains = this->next_chain; +/* For a def-use chain HEAD, find which registers overlap its lifetime and + set the corresponding bits in *PSET. */ - best_new_reg = reg; +static void +merge_overlapping_regs (HARD_REG_SET *pset, struct du_head *head) +{ + bitmap_iterator bi; + unsigned i; + IOR_HARD_REG_SET (*pset, head->hard_conflicts); + EXECUTE_IF_SET_IN_BITMAP (&head->conflicts, 0, i, bi) + { + du_head_p other = regrename_chain_from_id (i); + unsigned j = other->nregs; + gcc_assert (other != head); + while (j-- > 0) + SET_HARD_REG_BIT (*pset, other->regno + j); + } +} -#if 0 /* This just disables optimization opportunities. */ - /* Only rename once we've seen the reg more than once. */ - if (! TEST_HARD_REG_BIT (regs_seen, reg)) - { - SET_HARD_REG_BIT (regs_seen, reg); - continue; - } -#endif +/* Check if NEW_REG can be the candidate register to rename for + REG in THIS_HEAD chain. THIS_UNAVAILABLE is a set of unavailable hard + registers. */ - if (fixed_regs[reg] || global_regs[reg] -#if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM - || (frame_pointer_needed && reg == HARD_FRAME_POINTER_REGNUM) -#else - || (frame_pointer_needed && reg == FRAME_POINTER_REGNUM) +static bool +check_new_reg_p (int reg ATTRIBUTE_UNUSED, int new_reg, + struct du_head *this_head, HARD_REG_SET this_unavailable) +{ + enum machine_mode mode = GET_MODE (*this_head->first->loc); + int nregs = hard_regno_nregs[new_reg][mode]; + int i; + struct du_chain *tmp; + + for (i = nregs - 1; i >= 0; --i) + if (TEST_HARD_REG_BIT (this_unavailable, new_reg + i) + || fixed_regs[new_reg + i] + || global_regs[new_reg + i] + /* Can't use regs which aren't saved by the prologue. */ + || (! df_regs_ever_live_p (new_reg + i) + && ! call_used_regs[new_reg + i]) +#ifdef LEAF_REGISTERS + /* We can't use a non-leaf register if we're in a + leaf function. */ + || (current_function_is_leaf + && !LEAF_REGISTERS[new_reg + i]) #endif - ) - continue; +#ifdef HARD_REGNO_RENAME_OK + || ! HARD_REGNO_RENAME_OK (reg + i, new_reg + i) +#endif + ) + return false; - COPY_HARD_REG_SET (this_unavailable, unavailable); + /* See whether it accepts all modes that occur in + definition and uses. */ + for (tmp = this_head->first; tmp; tmp = tmp->next_use) + if ((! HARD_REGNO_MODE_OK (new_reg, GET_MODE (*tmp->loc)) + && ! DEBUG_INSN_P (tmp->insn)) + || (this_head->need_caller_save_reg + && ! (HARD_REGNO_CALL_PART_CLOBBERED + (reg, GET_MODE (*tmp->loc))) + && (HARD_REGNO_CALL_PART_CLOBBERED + (new_reg, GET_MODE (*tmp->loc))))) + return false; - /* Find last entry on chain (which has the need_caller_save bit), - count number of uses, and narrow the set of registers we can - use for renaming. */ - n_uses = 0; - for (last = this; last->next_use; last = last->next_use) - { - n_uses++; - IOR_COMPL_HARD_REG_SET (this_unavailable, - reg_class_contents[last->cl]); - } - if (n_uses < 1) + return true; +} + +/* For the chain THIS_HEAD, compute and return the best register to + rename to. SUPER_CLASS is the superunion of register classes in + the chain. UNAVAILABLE is a set of registers that cannot be used. + OLD_REG is the register currently used for the chain. */ + +int +find_best_rename_reg (du_head_p this_head, enum reg_class super_class, + HARD_REG_SET *unavailable, int old_reg) +{ + bool has_preferred_class; + enum reg_class preferred_class; + int pass; + int best_new_reg = old_reg; + + /* Further narrow the set of registers we can use for renaming. + If the chain needs a call-saved register, mark the call-used + registers as unavailable. */ + if (this_head->need_caller_save_reg) + IOR_HARD_REG_SET (*unavailable, call_used_reg_set); + + /* Mark registers that overlap this chain's lifetime as unavailable. */ + merge_overlapping_regs (unavailable, this_head); + + /* Compute preferred rename class of super union of all the classes + in the chain. */ + preferred_class + = (enum reg_class) targetm.preferred_rename_class (super_class); + + /* If PREFERRED_CLASS is not NO_REGS, we iterate in the first pass + over registers that belong to PREFERRED_CLASS and try to find the + best register within the class. If that failed, we iterate in + the second pass over registers that don't belong to the class. + If PREFERRED_CLASS is NO_REGS, we iterate over all registers in + ascending order without any preference. */ + has_preferred_class = (preferred_class != NO_REGS); + for (pass = (has_preferred_class ? 0 : 1); pass < 2; pass++) + { + int new_reg; + for (new_reg = 0; new_reg < FIRST_PSEUDO_REGISTER; new_reg++) + { + if (has_preferred_class + && (pass == 0) + != TEST_HARD_REG_BIT (reg_class_contents[preferred_class], + new_reg)) continue; - IOR_COMPL_HARD_REG_SET (this_unavailable, - reg_class_contents[last->cl]); + /* In the first pass, we force the renaming of registers that + don't belong to PREFERRED_CLASS to registers that do, even + though the latters were used not very long ago. */ + if (check_new_reg_p (old_reg, new_reg, this_head, + *unavailable) + && ((pass == 0 + && !TEST_HARD_REG_BIT (reg_class_contents[preferred_class], + best_new_reg)) + || tick[best_new_reg] > tick[new_reg])) + best_new_reg = new_reg; + } + if (pass == 0 && best_new_reg != old_reg) + break; + } + return best_new_reg; +} - if (this->need_caller_save_reg) - IOR_HARD_REG_SET (this_unavailable, call_used_reg_set); +/* Perform register renaming on the current function. */ +static void +rename_chains (void) +{ + HARD_REG_SET unavailable; + du_head_p this_head; + int i; - merge_overlapping_regs (bb, &this_unavailable, this); + memset (tick, 0, sizeof tick); - /* Now potential_regs is a reasonable approximation, let's - have a closer look at each register still in there. */ - for (new_reg = 0; new_reg < FIRST_PSEUDO_REGISTER; new_reg++) - { - int nregs = hard_regno_nregs[new_reg][GET_MODE (*this->loc)]; - - for (i = nregs - 1; i >= 0; --i) - if (TEST_HARD_REG_BIT (this_unavailable, new_reg + i) - || fixed_regs[new_reg + i] - || global_regs[new_reg + i] - /* Can't use regs which aren't saved by the prologue. */ - || (! regs_ever_live[new_reg + i] - && ! call_used_regs[new_reg + i]) -#ifdef LEAF_REGISTERS - /* We can't use a non-leaf register if we're in a - leaf function. */ - || (current_function_is_leaf - && !LEAF_REGISTERS[new_reg + i]) + CLEAR_HARD_REG_SET (unavailable); + /* Don't clobber traceback for noreturn functions. */ + if (frame_pointer_needed) + { + add_to_hard_reg_set (&unavailable, Pmode, FRAME_POINTER_REGNUM); +#if !HARD_FRAME_POINTER_IS_FRAME_POINTER + add_to_hard_reg_set (&unavailable, Pmode, HARD_FRAME_POINTER_REGNUM); #endif -#ifdef HARD_REGNO_RENAME_OK - || ! HARD_REGNO_RENAME_OK (reg + i, new_reg + i) + } + + FOR_EACH_VEC_ELT (du_head_p, id_to_chain, i, this_head) + { + int best_new_reg; + int n_uses; + struct du_chain *tmp; + HARD_REG_SET this_unavailable; + int reg = this_head->regno; + enum reg_class super_class = NO_REGS; + + if (this_head->cannot_rename) + continue; + + if (fixed_regs[reg] || global_regs[reg] +#if !HARD_FRAME_POINTER_IS_FRAME_POINTER + || (frame_pointer_needed && reg == HARD_FRAME_POINTER_REGNUM) +#else + || (frame_pointer_needed && reg == FRAME_POINTER_REGNUM) #endif - ) - break; - if (i >= 0) - continue; + ) + continue; - /* See whether it accepts all modes that occur in - definition and uses. */ - for (tmp = this; tmp; tmp = tmp->next_use) - if (! HARD_REGNO_MODE_OK (new_reg, GET_MODE (*tmp->loc)) - || (tmp->need_caller_save_reg - && ! (HARD_REGNO_CALL_PART_CLOBBERED - (reg, GET_MODE (*tmp->loc))) - && (HARD_REGNO_CALL_PART_CLOBBERED - (new_reg, GET_MODE (*tmp->loc))))) - break; - if (! tmp) - { - if (tick[best_new_reg] > tick[new_reg]) - best_new_reg = new_reg; - } - } + COPY_HARD_REG_SET (this_unavailable, unavailable); - if (dump_file) - { - fprintf (dump_file, "Register %s in insn %d", - reg_names[reg], INSN_UID (last->insn)); - if (last->need_caller_save_reg) - fprintf (dump_file, " crosses a call"); - } + /* Iterate over elements in the chain in order to: + 1. Count number of uses, and narrow the set of registers we can + use for renaming. + 2. Compute the superunion of register classes in this chain. */ + n_uses = 0; + super_class = NO_REGS; + for (tmp = this_head->first; tmp; tmp = tmp->next_use) + { + if (DEBUG_INSN_P (tmp->insn)) + continue; + n_uses++; + IOR_COMPL_HARD_REG_SET (this_unavailable, + reg_class_contents[tmp->cl]); + super_class + = reg_class_superunion[(int) super_class][(int) tmp->cl]; + } - if (best_new_reg == reg) - { - tick[reg] = ++this_tick; - if (dump_file) - fprintf (dump_file, "; no available better choice\n"); - continue; - } + if (n_uses < 2) + continue; + + best_new_reg = find_best_rename_reg (this_head, super_class, + &this_unavailable, reg); - do_replace (this, best_new_reg); - tick[best_new_reg] = ++this_tick; - regs_ever_live[best_new_reg] = 1; + if (dump_file) + { + fprintf (dump_file, "Register %s in insn %d", + reg_names[reg], INSN_UID (this_head->first->insn)); + if (this_head->need_caller_save_reg) + fprintf (dump_file, " crosses a call"); + } + if (best_new_reg == reg) + { + tick[reg] = ++this_tick; if (dump_file) - fprintf (dump_file, ", renamed as %s\n", reg_names[best_new_reg]); + fprintf (dump_file, "; no available better choice\n"); + continue; } - obstack_free (&rename_obstack, first_obj); - } + if (dump_file) + fprintf (dump_file, ", renamed as %s\n", reg_names[best_new_reg]); - obstack_free (&rename_obstack, NULL); + regrename_do_replace (this_head, best_new_reg); + tick[best_new_reg] = ++this_tick; + df_set_regs_ever_live (best_new_reg, true); + } +} - if (dump_file) - fputc ('\n', dump_file); +/* A structure to record information for each hard register at the start of + a basic block. */ +struct incoming_reg_info { + /* Holds the number of registers used in the chain that gave us information + about this register. Zero means no information known yet, while a + negative value is used for something that is part of, but not the first + register in a multi-register value. */ + int nregs; + /* Set to true if we have accesses that conflict in the number of registers + used. */ + bool unusable; +}; - count_or_remove_death_notes (NULL, 1); - update_life_info (NULL, UPDATE_LIFE_LOCAL, - PROP_DEATH_NOTES); -} +/* A structure recording information about each basic block. It is saved + and restored around basic block boundaries. + A pointer to such a structure is stored in each basic block's aux field + during regrename_analyze, except for blocks we know can't be optimized + (such as entry and exit blocks). */ +struct bb_rename_info +{ + /* The basic block corresponding to this structure. */ + basic_block bb; + /* Copies of the global information. */ + bitmap_head open_chains_set; + bitmap_head incoming_open_chains_set; + struct incoming_reg_info incoming[FIRST_PSEUDO_REGISTER]; +}; +/* Initialize a rename_info structure P for basic block BB, which starts a new + scan. */ static void -do_replace (struct du_chain *chain, int reg) +init_rename_info (struct bb_rename_info *p, basic_block bb) { - while (chain) + int i; + df_ref *def_rec; + HARD_REG_SET start_chains_set; + + p->bb = bb; + bitmap_initialize (&p->open_chains_set, &bitmap_default_obstack); + bitmap_initialize (&p->incoming_open_chains_set, &bitmap_default_obstack); + + open_chains = NULL; + bitmap_clear (&open_chains_set); + + CLEAR_HARD_REG_SET (live_in_chains); + REG_SET_TO_HARD_REG_SET (live_hard_regs, df_get_live_in (bb)); + for (def_rec = df_get_artificial_defs (bb->index); *def_rec; def_rec++) { - unsigned int regno = ORIGINAL_REGNO (*chain->loc); - struct reg_attrs * attr = REG_ATTRS (*chain->loc); + df_ref def = *def_rec; + if (DF_REF_FLAGS (def) & DF_REF_AT_TOP) + SET_HARD_REG_BIT (live_hard_regs, DF_REF_REGNO (def)); + } - *chain->loc = gen_raw_REG (GET_MODE (*chain->loc), reg); - if (regno >= FIRST_PSEUDO_REGISTER) - ORIGINAL_REGNO (*chain->loc) = regno; - REG_ATTRS (*chain->loc) = attr; - chain = chain->next_use; + /* Open chains based on information from (at least one) predecessor + block. This gives us a chance later on to combine chains across + basic block boundaries. Inconsistencies (in access sizes) will + be caught normally and dealt with conservatively by disabling the + chain for renaming, and there is no risk of losing optimization + opportunities by opening chains either: if we did not open the + chains, we'd have to track the live register as a hard reg, and + we'd be unable to rename it in any case. */ + CLEAR_HARD_REG_SET (start_chains_set); + for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) + { + struct incoming_reg_info *iri = p->incoming + i; + if (iri->nregs > 0 && !iri->unusable + && range_in_hard_reg_set_p (live_hard_regs, i, iri->nregs)) + { + SET_HARD_REG_BIT (start_chains_set, i); + remove_range_from_hard_reg_set (&live_hard_regs, i, iri->nregs); + } + } + for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) + { + struct incoming_reg_info *iri = p->incoming + i; + if (TEST_HARD_REG_BIT (start_chains_set, i)) + { + du_head_p chain; + if (dump_file) + fprintf (dump_file, "opening incoming chain\n"); + chain = create_new_chain (i, iri->nregs, NULL, NULL_RTX, NO_REGS); + bitmap_set_bit (&p->incoming_open_chains_set, chain->id); + } } } - -static struct du_chain *open_chains; -static struct du_chain *closed_chains; - +/* Record in RI that the block corresponding to it has an incoming + live value, described by CHAIN. */ static void -scan_rtx_reg (rtx insn, rtx *loc, enum reg_class cl, - enum scan_actions action, enum op_type type, int earlyclobber) +set_incoming_from_chain (struct bb_rename_info *ri, du_head_p chain) { - struct du_chain **p; - rtx x = *loc; - enum machine_mode mode = GET_MODE (x); - int this_regno = REGNO (x); - int this_nregs = hard_regno_nregs[this_regno][mode]; + int i; + int incoming_nregs = ri->incoming[chain->regno].nregs; + int nregs; - if (action == mark_write) + /* If we've recorded the same information before, everything is fine. */ + if (incoming_nregs == chain->nregs) { - if (type == OP_OUT) - { - struct du_chain *this - = obstack_alloc (&rename_obstack, sizeof (struct du_chain)); - this->next_use = 0; - this->next_chain = open_chains; - this->loc = loc; - this->insn = insn; - this->cl = cl; - this->need_caller_save_reg = 0; - this->earlyclobber = earlyclobber; - open_chains = this; - } + if (dump_file) + fprintf (dump_file, "reg %d/%d already recorded\n", + chain->regno, chain->nregs); return; } - if ((type == OP_OUT) != (action == terminate_write || action == mark_access)) + /* If we have no information for any of the involved registers, update + the incoming array. */ + nregs = chain->nregs; + while (nregs-- > 0) + if (ri->incoming[chain->regno + nregs].nregs != 0 + || ri->incoming[chain->regno + nregs].unusable) + break; + if (nregs < 0) + { + nregs = chain->nregs; + ri->incoming[chain->regno].nregs = nregs; + while (nregs-- > 1) + ri->incoming[chain->regno + nregs].nregs = -nregs; + if (dump_file) + fprintf (dump_file, "recorded reg %d/%d\n", + chain->regno, chain->nregs); + return; + } + + /* There must be some kind of conflict. Prevent both the old and + new ranges from being used. */ + if (incoming_nregs < 0) + ri->incoming[chain->regno + incoming_nregs].unusable = true; + for (i = 0; i < chain->nregs; i++) + ri->incoming[chain->regno + i].unusable = true; +} + +/* Merge the two chains C1 and C2 so that all conflict information is + recorded and C1, and the id of C2 is changed to that of C1. */ +static void +merge_chains (du_head_p c1, du_head_p c2) +{ + if (c1 == c2) return; - for (p = &open_chains; *p;) + if (c2->first != NULL) { - struct du_chain *this = *p; + if (c1->first == NULL) + c1->first = c2->first; + else + c1->last->next_use = c2->first; + c1->last = c2->last; + } + + c2->first = c2->last = NULL; + c2->id = c1->id; + + IOR_HARD_REG_SET (c1->hard_conflicts, c2->hard_conflicts); + bitmap_ior_into (&c1->conflicts, &c2->conflicts); + + c1->need_caller_save_reg |= c2->need_caller_save_reg; + c1->cannot_rename |= c2->cannot_rename; +} + +/* Analyze the current function and build chains for renaming. */ - /* Check if the chain has been terminated if it has then skip to - the next chain. +void +regrename_analyze (bitmap bb_mask) +{ + struct bb_rename_info *rename_info; + int i; + basic_block bb; + int n_bbs; + int *inverse_postorder; - This can happen when we've already appended the location to - the chain in Step 3, but are trying to hide in-out operands - from terminate_write in Step 5. */ + inverse_postorder = XNEWVEC (int, last_basic_block); + n_bbs = pre_and_rev_post_order_compute (NULL, inverse_postorder, false); - if (*this->loc == cc0_rtx) - p = &this->next_chain; + /* Gather some information about the blocks in this function. */ + rename_info = XCNEWVEC (struct bb_rename_info, n_basic_blocks); + i = 0; + FOR_EACH_BB (bb) + { + struct bb_rename_info *ri = rename_info + i; + ri->bb = bb; + if (bb_mask != NULL && !bitmap_bit_p (bb_mask, bb->index)) + bb->aux = NULL; else - { - int regno = REGNO (*this->loc); - int nregs = hard_regno_nregs[regno][GET_MODE (*this->loc)]; - int exact_match = (regno == this_regno && nregs == this_nregs); + bb->aux = ri; + i++; + } - if (regno + nregs <= this_regno - || this_regno + this_nregs <= regno) - { - p = &this->next_chain; - continue; - } + current_id = 0; + id_to_chain = VEC_alloc (du_head_p, heap, 0); + bitmap_initialize (&open_chains_set, &bitmap_default_obstack); - if (action == mark_read || action == mark_access) - { - gcc_assert (exact_match); + /* The order in which we visit blocks ensures that whenever + possible, we only process a block after at least one of its + predecessors, which provides a "seeding" effect to make the logic + in set_incoming_from_chain and init_rename_info useful. */ - /* ??? Class NO_REGS can happen if the md file makes use of - EXTRA_CONSTRAINTS to match registers. Which is arguably - wrong, but there we are. Since we know not what this may - be replaced with, terminate the chain. */ - if (cl != NO_REGS) - { - this = obstack_alloc (&rename_obstack, sizeof (struct du_chain)); - this->next_use = 0; - this->next_chain = (*p)->next_chain; - this->loc = loc; - this->insn = insn; - this->cl = cl; - this->need_caller_save_reg = 0; - while (*p) - p = &(*p)->next_use; - *p = this; - return; - } - } + for (i = 0; i < n_bbs; i++) + { + basic_block bb1 = BASIC_BLOCK (inverse_postorder[i]); + struct bb_rename_info *this_info; + bool success; + edge e; + edge_iterator ei; + int old_length = VEC_length (du_head_p, id_to_chain); + + this_info = (struct bb_rename_info *) bb1->aux; + if (this_info == NULL) + continue; - if (action != terminate_overlapping_read || ! exact_match) - { - struct du_chain *next = this->next_chain; + if (dump_file) + fprintf (dump_file, "\nprocessing block %d:\n", bb1->index); - /* Whether the terminated chain can be used for renaming - depends on the action and this being an exact match. - In either case, we remove this element from open_chains. */ + init_rename_info (this_info, bb1); - if ((action == terminate_dead || action == terminate_write) - && exact_match) - { - this->next_chain = closed_chains; - closed_chains = this; - if (dump_file) - fprintf (dump_file, - "Closing chain %s at insn %d (%s)\n", - reg_names[REGNO (*this->loc)], INSN_UID (insn), - scan_actions_name[(int) action]); - } - else + success = build_def_use (bb1); + if (!success) + { + if (dump_file) + fprintf (dump_file, "failed\n"); + bb1->aux = NULL; + VEC_truncate (du_head_p, id_to_chain, old_length); + current_id = old_length; + bitmap_clear (&this_info->incoming_open_chains_set); + open_chains = NULL; + if (insn_rr != NULL) + { + rtx insn; + FOR_BB_INSNS (bb1, insn) { - if (dump_file) - fprintf (dump_file, - "Discarding chain %s at insn %d (%s)\n", - reg_names[REGNO (*this->loc)], INSN_UID (insn), - scan_actions_name[(int) action]); + insn_rr_info *p = VEC_index (insn_rr_info, insn_rr, + INSN_UID (insn)); + p->op_info = NULL; } - *p = next; } - else - p = &this->next_chain; + continue; + } + + if (dump_file) + dump_def_use_chain (old_length); + bitmap_copy (&this_info->open_chains_set, &open_chains_set); + + /* Add successor blocks to the worklist if necessary, and record + data about our own open chains at the end of this block, which + will be used to pre-open chains when processing the successors. */ + FOR_EACH_EDGE (e, ei, bb1->succs) + { + struct bb_rename_info *dest_ri; + struct du_head *chain; + + if (dump_file) + fprintf (dump_file, "successor block %d\n", e->dest->index); + + if (e->flags & (EDGE_EH | EDGE_ABNORMAL)) + continue; + dest_ri = (struct bb_rename_info *)e->dest->aux; + if (dest_ri == NULL) + continue; + for (chain = open_chains; chain; chain = chain->next_chain) + set_incoming_from_chain (dest_ri, chain); } } -} -/* Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or - BASE_REG_CLASS depending on how the register is being considered. */ + free (inverse_postorder); -static void -scan_rtx_address (rtx insn, rtx *loc, enum reg_class cl, - enum scan_actions action, enum machine_mode mode) -{ - rtx x = *loc; - RTX_CODE code = GET_CODE (x); - const char *fmt; - int i, j; + /* Now, combine the chains data we have gathered across basic block + boundaries. - if (action == mark_write || action == mark_access) - return; + For every basic block, there may be chains open at the start, or at the + end. Rather than exclude them from renaming, we look for open chains + with matching registers at the other side of the CFG edge. - switch (code) + For a given chain using register R, open at the start of block B, we + must find an open chain using R on the other side of every edge leading + to B, if the register is live across this edge. In the code below, + N_PREDS_USED counts the number of edges where the register is live, and + N_PREDS_JOINED counts those where we found an appropriate chain for + joining. + + We perform the analysis for both incoming and outgoing edges, but we + only need to merge once (in the second part, after verifying outgoing + edges). */ + FOR_EACH_BB (bb) { - case PLUS: + struct bb_rename_info *bb_ri = (struct bb_rename_info *) bb->aux; + unsigned j; + bitmap_iterator bi; + + if (bb_ri == NULL) + continue; + + if (dump_file) + fprintf (dump_file, "processing bb %d in edges\n", bb->index); + + EXECUTE_IF_SET_IN_BITMAP (&bb_ri->incoming_open_chains_set, 0, j, bi) + { + edge e; + edge_iterator ei; + struct du_head *chain = regrename_chain_from_id (j); + int n_preds_used = 0, n_preds_joined = 0; + + FOR_EACH_EDGE (e, ei, bb->preds) + { + struct bb_rename_info *src_ri; + unsigned k; + bitmap_iterator bi2; + HARD_REG_SET live; + bool success = false; + + REG_SET_TO_HARD_REG_SET (live, df_get_live_out (e->src)); + if (!range_overlaps_hard_reg_set_p (live, chain->regno, + chain->nregs)) + continue; + n_preds_used++; + + if (e->flags & (EDGE_EH | EDGE_ABNORMAL)) + continue; + + src_ri = (struct bb_rename_info *)e->src->aux; + if (src_ri == NULL) + continue; + + EXECUTE_IF_SET_IN_BITMAP (&src_ri->open_chains_set, + 0, k, bi2) + { + struct du_head *outgoing_chain = regrename_chain_from_id (k); + + if (outgoing_chain->regno == chain->regno + && outgoing_chain->nregs == chain->nregs) + { + n_preds_joined++; + success = true; + break; + } + } + if (!success && dump_file) + fprintf (dump_file, "failure to match with pred block %d\n", + e->src->index); + } + if (n_preds_joined < n_preds_used) + { + if (dump_file) + fprintf (dump_file, "cannot rename chain %d\n", j); + chain->cannot_rename = 1; + } + } + } + FOR_EACH_BB (bb) + { + struct bb_rename_info *bb_ri = (struct bb_rename_info *) bb->aux; + unsigned j; + bitmap_iterator bi; + + if (bb_ri == NULL) + continue; + + if (dump_file) + fprintf (dump_file, "processing bb %d out edges\n", bb->index); + + EXECUTE_IF_SET_IN_BITMAP (&bb_ri->open_chains_set, 0, j, bi) + { + edge e; + edge_iterator ei; + struct du_head *chain = regrename_chain_from_id (j); + int n_succs_used = 0, n_succs_joined = 0; + + FOR_EACH_EDGE (e, ei, bb->succs) + { + bool printed = false; + struct bb_rename_info *dest_ri; + unsigned k; + bitmap_iterator bi2; + HARD_REG_SET live; + + REG_SET_TO_HARD_REG_SET (live, df_get_live_in (e->dest)); + if (!range_overlaps_hard_reg_set_p (live, chain->regno, + chain->nregs)) + continue; + + n_succs_used++; + + dest_ri = (struct bb_rename_info *)e->dest->aux; + if (dest_ri == NULL) + continue; + + EXECUTE_IF_SET_IN_BITMAP (&dest_ri->incoming_open_chains_set, + 0, k, bi2) + { + struct du_head *incoming_chain = regrename_chain_from_id (k); + + if (incoming_chain->regno == chain->regno + && incoming_chain->nregs == chain->nregs) + { + if (dump_file) + { + if (!printed) + fprintf (dump_file, + "merging blocks for edge %d -> %d\n", + e->src->index, e->dest->index); + printed = true; + fprintf (dump_file, + " merging chains %d (->%d) and %d (->%d) [%s]\n", + k, incoming_chain->id, j, chain->id, + reg_names[incoming_chain->regno]); + } + + merge_chains (chain, incoming_chain); + n_succs_joined++; + break; + } + } + } + if (n_succs_joined < n_succs_used) + { + if (dump_file) + fprintf (dump_file, "cannot rename chain %d\n", + j); + chain->cannot_rename = 1; + } + } + } + + free (rename_info); + + FOR_EACH_BB (bb) + bb->aux = NULL; +} + +void +regrename_do_replace (struct du_head *head, int reg) +{ + struct du_chain *chain; + unsigned int base_regno = head->regno; + enum machine_mode mode; + + for (chain = head->first; chain; chain = chain->next_use) + { + unsigned int regno = ORIGINAL_REGNO (*chain->loc); + struct reg_attrs *attr = REG_ATTRS (*chain->loc); + int reg_ptr = REG_POINTER (*chain->loc); + + if (DEBUG_INSN_P (chain->insn) && REGNO (*chain->loc) != base_regno) + INSN_VAR_LOCATION_LOC (chain->insn) = gen_rtx_UNKNOWN_VAR_LOC (); + else + { + *chain->loc = gen_raw_REG (GET_MODE (*chain->loc), reg); + if (regno >= FIRST_PSEUDO_REGISTER) + ORIGINAL_REGNO (*chain->loc) = regno; + REG_ATTRS (*chain->loc) = attr; + REG_POINTER (*chain->loc) = reg_ptr; + } + + df_insn_rescan (chain->insn); + } + + mode = GET_MODE (*head->first->loc); + head->regno = reg; + head->nregs = hard_regno_nregs[reg][mode]; +} + + +/* True if we found a register with a size mismatch, which means that we + can't track its lifetime accurately. If so, we abort the current block + without renaming. */ +static bool fail_current_block; + +/* Return true if OP is a reg for which all bits are set in PSET, false + if all bits are clear. + In other cases, set fail_current_block and return false. */ + +static bool +verify_reg_in_set (rtx op, HARD_REG_SET *pset) +{ + unsigned regno, nregs; + bool all_live, all_dead; + if (!REG_P (op)) + return false; + + regno = REGNO (op); + nregs = hard_regno_nregs[regno][GET_MODE (op)]; + all_live = all_dead = true; + while (nregs-- > 0) + if (TEST_HARD_REG_BIT (*pset, regno + nregs)) + all_dead = false; + else + all_live = false; + if (!all_dead && !all_live) + { + fail_current_block = true; + return false; + } + return all_live; +} + +/* Return true if OP is a reg that is being tracked already in some form. + May set fail_current_block if it sees an unhandled case of overlap. */ + +static bool +verify_reg_tracked (rtx op) +{ + return (verify_reg_in_set (op, &live_hard_regs) + || verify_reg_in_set (op, &live_in_chains)); +} + +/* Called through note_stores. DATA points to a rtx_code, either SET or + CLOBBER, which tells us which kind of rtx to look at. If we have a + match, record the set register in live_hard_regs and in the hard_conflicts + bitmap of open chains. */ + +static void +note_sets_clobbers (rtx x, const_rtx set, void *data) +{ + enum rtx_code code = *(enum rtx_code *)data; + struct du_head *chain; + + if (GET_CODE (x) == SUBREG) + x = SUBREG_REG (x); + if (!REG_P (x) || GET_CODE (set) != code) + return; + /* There must not be pseudos at this point. */ + gcc_assert (HARD_REGISTER_P (x)); + add_to_hard_reg_set (&live_hard_regs, GET_MODE (x), REGNO (x)); + for (chain = open_chains; chain; chain = chain->next_chain) + add_to_hard_reg_set (&chain->hard_conflicts, GET_MODE (x), REGNO (x)); +} + +static void +scan_rtx_reg (rtx insn, rtx *loc, enum reg_class cl, enum scan_actions action, + enum op_type type) +{ + struct du_head **p; + rtx x = *loc; + enum machine_mode mode = GET_MODE (x); + unsigned this_regno = REGNO (x); + int this_nregs = hard_regno_nregs[this_regno][mode]; + + if (action == mark_write) + { + if (type == OP_OUT) + create_new_chain (this_regno, this_nregs, loc, insn, cl); + return; + } + + if ((type == OP_OUT) != (action == terminate_write || action == mark_access)) + return; + + for (p = &open_chains; *p;) + { + struct du_head *head = *p; + struct du_head *next = head->next_chain; + int exact_match = (head->regno == this_regno + && head->nregs == this_nregs); + int superset = (this_regno <= head->regno + && this_regno + this_nregs >= head->regno + head->nregs); + int subset = (this_regno >= head->regno + && this_regno + this_nregs <= head->regno + head->nregs); + + if (!bitmap_bit_p (&open_chains_set, head->id) + || head->regno + head->nregs <= this_regno + || this_regno + this_nregs <= head->regno) + { + p = &head->next_chain; + continue; + } + + if (action == mark_read || action == mark_access) + { + /* ??? Class NO_REGS can happen if the md file makes use of + EXTRA_CONSTRAINTS to match registers. Which is arguably + wrong, but there we are. */ + + if (cl == NO_REGS || (!exact_match && !DEBUG_INSN_P (insn))) + { + if (dump_file) + fprintf (dump_file, + "Cannot rename chain %s (%d) at insn %d (%s)\n", + reg_names[head->regno], head->id, INSN_UID (insn), + scan_actions_name[(int) action]); + head->cannot_rename = 1; + if (superset) + { + unsigned nregs = this_nregs; + head->regno = this_regno; + head->nregs = this_nregs; + while (nregs-- > 0) + SET_HARD_REG_BIT (live_in_chains, head->regno + nregs); + if (dump_file) + fprintf (dump_file, + "Widening register in chain %s (%d) at insn %d\n", + reg_names[head->regno], head->id, INSN_UID (insn)); + } + else if (!subset) + { + fail_current_block = true; + if (dump_file) + fprintf (dump_file, + "Failing basic block due to unhandled overlap\n"); + } + } + else + { + struct du_chain *this_du; + this_du = XOBNEW (&rename_obstack, struct du_chain); + this_du->next_use = 0; + this_du->loc = loc; + this_du->insn = insn; + this_du->cl = cl; + if (head->first == NULL) + head->first = this_du; + else + head->last->next_use = this_du; + record_operand_use (head, this_du); + head->last = this_du; + } + /* Avoid adding the same location in a DEBUG_INSN multiple times, + which could happen with non-exact overlap. */ + if (DEBUG_INSN_P (insn)) + return; + /* Otherwise, find any other chains that do not match exactly; + ensure they all get marked unrenamable. */ + p = &head->next_chain; + continue; + } + + /* Whether the terminated chain can be used for renaming + depends on the action and this being an exact match. + In either case, we remove this element from open_chains. */ + + if ((action == terminate_dead || action == terminate_write) + && (superset || subset)) + { + unsigned nregs; + + if (subset && !superset) + head->cannot_rename = 1; + bitmap_clear_bit (&open_chains_set, head->id); + + nregs = head->nregs; + while (nregs-- > 0) + { + CLEAR_HARD_REG_BIT (live_in_chains, head->regno + nregs); + if (subset && !superset + && (head->regno + nregs < this_regno + || head->regno + nregs >= this_regno + this_nregs)) + SET_HARD_REG_BIT (live_hard_regs, head->regno + nregs); + } + + *p = next; + if (dump_file) + fprintf (dump_file, + "Closing chain %s (%d) at insn %d (%s%s)\n", + reg_names[head->regno], head->id, INSN_UID (insn), + scan_actions_name[(int) action], + superset ? ", superset" : subset ? ", subset" : ""); + } + else if (action == terminate_dead || action == terminate_write) + { + /* In this case, tracking liveness gets too hard. Fail the + entire basic block. */ + if (dump_file) + fprintf (dump_file, + "Failing basic block due to unhandled overlap\n"); + fail_current_block = true; + return; + } + else + { + head->cannot_rename = 1; + if (dump_file) + fprintf (dump_file, + "Cannot rename chain %s (%d) at insn %d (%s)\n", + reg_names[head->regno], head->id, INSN_UID (insn), + scan_actions_name[(int) action]); + p = &head->next_chain; + } + } +} + +/* Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or + BASE_REG_CLASS depending on how the register is being considered. */ + +static void +scan_rtx_address (rtx insn, rtx *loc, enum reg_class cl, + enum scan_actions action, enum machine_mode mode) +{ + rtx x = *loc; + RTX_CODE code = GET_CODE (x); + const char *fmt; + int i, j; + + if (action == mark_write || action == mark_access) + return; + + switch (code) + { + case PLUS: { rtx orig_op0 = XEXP (x, 0); rtx orig_op1 = XEXP (x, 1); @@ -528,7 +1204,7 @@ scan_rtx_address (rtx insn, rtx *loc, enum reg_class cl, rtx op1 = orig_op1; rtx *locI = NULL; rtx *locB = NULL; - rtx *locB_reg = NULL; + enum rtx_code index_code = SCRATCH; if (GET_CODE (op0) == SUBREG) { @@ -547,59 +1223,69 @@ scan_rtx_address (rtx insn, rtx *loc, enum reg_class cl, { locI = &XEXP (x, 0); locB = &XEXP (x, 1); + index_code = GET_CODE (*locI); } else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE || code1 == ZERO_EXTEND || code0 == MEM) { locI = &XEXP (x, 1); locB = &XEXP (x, 0); + index_code = GET_CODE (*locI); } else if (code0 == CONST_INT || code0 == CONST || code0 == SYMBOL_REF || code0 == LABEL_REF) - locB = &XEXP (x, 1); + { + locB = &XEXP (x, 1); + index_code = GET_CODE (XEXP (x, 0)); + } else if (code1 == CONST_INT || code1 == CONST || code1 == SYMBOL_REF || code1 == LABEL_REF) - locB = &XEXP (x, 0); + { + locB = &XEXP (x, 0); + index_code = GET_CODE (XEXP (x, 1)); + } else if (code0 == REG && code1 == REG) { int index_op; + unsigned regno0 = REGNO (op0), regno1 = REGNO (op1); - if (REG_OK_FOR_INDEX_P (op0) - && REG_MODE_OK_FOR_REG_BASE_P (op1, mode)) - index_op = 0; - else if (REG_OK_FOR_INDEX_P (op1) - && REG_MODE_OK_FOR_REG_BASE_P (op0, mode)) + if (REGNO_OK_FOR_INDEX_P (regno1) + && regno_ok_for_base_p (regno0, mode, PLUS, REG)) index_op = 1; - else if (REG_MODE_OK_FOR_REG_BASE_P (op1, mode)) + else if (REGNO_OK_FOR_INDEX_P (regno0) + && regno_ok_for_base_p (regno1, mode, PLUS, REG)) index_op = 0; - else if (REG_MODE_OK_FOR_REG_BASE_P (op0, mode)) - index_op = 1; - else if (REG_OK_FOR_INDEX_P (op1)) + else if (regno_ok_for_base_p (regno0, mode, PLUS, REG) + || REGNO_OK_FOR_INDEX_P (regno1)) index_op = 1; - else + else if (regno_ok_for_base_p (regno1, mode, PLUS, REG)) index_op = 0; + else + index_op = 1; locI = &XEXP (x, index_op); - locB_reg = &XEXP (x, !index_op); + locB = &XEXP (x, !index_op); + index_code = GET_CODE (*locI); } else if (code0 == REG) { locI = &XEXP (x, 0); locB = &XEXP (x, 1); + index_code = GET_CODE (*locI); } else if (code1 == REG) { locI = &XEXP (x, 1); locB = &XEXP (x, 0); + index_code = GET_CODE (*locI); } if (locI) scan_rtx_address (insn, locI, INDEX_REG_CLASS, action, mode); if (locB) - scan_rtx_address (insn, locB, MODE_BASE_REG_CLASS (mode), action, mode); - if (locB_reg) - scan_rtx_address (insn, locB_reg, MODE_BASE_REG_REG_CLASS (mode), + scan_rtx_address (insn, locB, base_reg_class (mode, PLUS, index_code), action, mode); + return; } @@ -612,18 +1298,18 @@ scan_rtx_address (rtx insn, rtx *loc, enum reg_class cl, #ifndef AUTO_INC_DEC /* If the target doesn't claim to handle autoinc, this must be something special, like a stack push. Kill this chain. */ - action = terminate_all_read; + action = mark_all_read; #endif break; case MEM: scan_rtx_address (insn, &XEXP (x, 0), - MODE_BASE_REG_CLASS (GET_MODE (x)), action, + base_reg_class (GET_MODE (x), MEM, SCRATCH), action, GET_MODE (x)); return; case REG: - scan_rtx_reg (insn, loc, cl, action, OP_IN, 0); + scan_rtx_reg (insn, loc, cl, action, OP_IN); return; default: @@ -642,8 +1328,8 @@ scan_rtx_address (rtx insn, rtx *loc, enum reg_class cl, } static void -scan_rtx (rtx insn, rtx *loc, enum reg_class cl, - enum scan_actions action, enum op_type type, int earlyclobber) +scan_rtx (rtx insn, rtx *loc, enum reg_class cl, enum scan_actions action, + enum op_type type) { const char *fmt; rtx x = *loc; @@ -656,6 +1342,7 @@ scan_rtx (rtx insn, rtx *loc, enum reg_class cl, case CONST: case CONST_INT: case CONST_DOUBLE: + case CONST_FIXED: case CONST_VECTOR: case SYMBOL_REF: case LABEL_REF: @@ -664,31 +1351,34 @@ scan_rtx (rtx insn, rtx *loc, enum reg_class cl, return; case REG: - scan_rtx_reg (insn, loc, cl, action, type, earlyclobber); + scan_rtx_reg (insn, loc, cl, action, type); return; case MEM: scan_rtx_address (insn, &XEXP (x, 0), - MODE_BASE_REG_CLASS (GET_MODE (x)), action, + base_reg_class (GET_MODE (x), MEM, SCRATCH), action, GET_MODE (x)); return; case SET: - scan_rtx (insn, &SET_SRC (x), cl, action, OP_IN, 0); + scan_rtx (insn, &SET_SRC (x), cl, action, OP_IN); scan_rtx (insn, &SET_DEST (x), cl, action, - GET_CODE (PATTERN (insn)) == COND_EXEC ? OP_INOUT : OP_OUT, 0); + (GET_CODE (PATTERN (insn)) == COND_EXEC + && verify_reg_tracked (SET_DEST (x))) ? OP_INOUT : OP_OUT); return; case STRICT_LOW_PART: - scan_rtx (insn, &XEXP (x, 0), cl, action, OP_INOUT, earlyclobber); + scan_rtx (insn, &XEXP (x, 0), cl, action, + verify_reg_tracked (XEXP (x, 0)) ? OP_INOUT : OP_OUT); return; case ZERO_EXTRACT: case SIGN_EXTRACT: scan_rtx (insn, &XEXP (x, 0), cl, action, - type == OP_IN ? OP_IN : OP_INOUT, earlyclobber); - scan_rtx (insn, &XEXP (x, 1), cl, action, OP_IN, 0); - scan_rtx (insn, &XEXP (x, 2), cl, action, OP_IN, 0); + (type == OP_IN ? OP_IN : + verify_reg_tracked (XEXP (x, 0)) ? OP_INOUT : OP_OUT)); + scan_rtx (insn, &XEXP (x, 1), cl, action, OP_IN); + scan_rtx (insn, &XEXP (x, 2), cl, action, OP_IN); return; case POST_INC: @@ -702,13 +1392,14 @@ scan_rtx (rtx insn, rtx *loc, enum reg_class cl, case CLOBBER: scan_rtx (insn, &SET_DEST (x), cl, action, - GET_CODE (PATTERN (insn)) == COND_EXEC ? OP_INOUT : OP_OUT, 0); + (GET_CODE (PATTERN (insn)) == COND_EXEC + && verify_reg_tracked (SET_DEST (x))) ? OP_INOUT : OP_OUT); return; case EXPR_LIST: - scan_rtx (insn, &XEXP (x, 0), cl, action, type, 0); + scan_rtx (insn, &XEXP (x, 0), cl, action, type); if (XEXP (x, 1)) - scan_rtx (insn, &XEXP (x, 1), cl, action, type, 0); + scan_rtx (insn, &XEXP (x, 1), cl, action, type); return; default: @@ -719,119 +1410,257 @@ scan_rtx (rtx insn, rtx *loc, enum reg_class cl, for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) { if (fmt[i] == 'e') - scan_rtx (insn, &XEXP (x, i), cl, action, type, 0); + scan_rtx (insn, &XEXP (x, i), cl, action, type); else if (fmt[i] == 'E') for (j = XVECLEN (x, i) - 1; j >= 0; j--) - scan_rtx (insn, &XVECEXP (x, i, j), cl, action, type, 0); + scan_rtx (insn, &XVECEXP (x, i, j), cl, action, type); + } +} + +/* Hide operands of the current insn (of which there are N_OPS) by + substituting cc0 for them. + Previous values are stored in the OLD_OPERANDS and OLD_DUPS. + For every bit set in DO_NOT_HIDE, we leave the operand alone. + If INOUT_AND_EC_ONLY is set, we only do this for OP_INOUT type operands + and earlyclobbers. */ + +static void +hide_operands (int n_ops, rtx *old_operands, rtx *old_dups, + unsigned HOST_WIDE_INT do_not_hide, bool inout_and_ec_only) +{ + int i; + int alt = which_alternative; + for (i = 0; i < n_ops; i++) + { + old_operands[i] = recog_data.operand[i]; + /* Don't squash match_operator or match_parallel here, since + we don't know that all of the contained registers are + reachable by proper operands. */ + if (recog_data.constraints[i][0] == '\0') + continue; + if (do_not_hide & (1 << i)) + continue; + if (!inout_and_ec_only || recog_data.operand_type[i] == OP_INOUT + || recog_op_alt[i][alt].earlyclobber) + *recog_data.operand_loc[i] = cc0_rtx; + } + for (i = 0; i < recog_data.n_dups; i++) + { + int opn = recog_data.dup_num[i]; + old_dups[i] = *recog_data.dup_loc[i]; + if (do_not_hide & (1 << opn)) + continue; + if (!inout_and_ec_only || recog_data.operand_type[opn] == OP_INOUT + || recog_op_alt[opn][alt].earlyclobber) + *recog_data.dup_loc[i] = cc0_rtx; + } +} + +/* Undo the substitution performed by hide_operands. INSN is the insn we + are processing; the arguments are the same as in hide_operands. */ + +static void +restore_operands (rtx insn, int n_ops, rtx *old_operands, rtx *old_dups) +{ + int i; + for (i = 0; i < recog_data.n_dups; i++) + *recog_data.dup_loc[i] = old_dups[i]; + for (i = 0; i < n_ops; i++) + *recog_data.operand_loc[i] = old_operands[i]; + if (recog_data.n_dups) + df_insn_rescan (insn); +} + +/* For each output operand of INSN, call scan_rtx to create a new + open chain. Do this only for normal or earlyclobber outputs, + depending on EARLYCLOBBER. If INSN_INFO is nonnull, use it to + record information about the operands in the insn. */ + +static void +record_out_operands (rtx insn, bool earlyclobber, insn_rr_info *insn_info) +{ + int n_ops = recog_data.n_operands; + int alt = which_alternative; + + int i; + + for (i = 0; i < n_ops + recog_data.n_dups; i++) + { + int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops]; + rtx *loc = (i < n_ops + ? recog_data.operand_loc[opn] + : recog_data.dup_loc[i - n_ops]); + rtx op = *loc; + enum reg_class cl = recog_op_alt[opn][alt].cl; + + struct du_head *prev_open; + + if (recog_data.operand_type[opn] != OP_OUT + || recog_op_alt[opn][alt].earlyclobber != earlyclobber) + continue; + + if (insn_info) + cur_operand = insn_info->op_info + i; + + prev_open = open_chains; + scan_rtx (insn, loc, cl, mark_write, OP_OUT); + + /* ??? Many targets have output constraints on the SET_DEST + of a call insn, which is stupid, since these are certainly + ABI defined hard registers. For these, and for asm operands + that originally referenced hard registers, we must record that + the chain cannot be renamed. */ + if (CALL_P (insn) + || (asm_noperands (PATTERN (insn)) > 0 + && REG_P (op) + && REGNO (op) == ORIGINAL_REGNO (op))) + { + if (prev_open != open_chains) + open_chains->cannot_rename = 1; + } } + cur_operand = NULL; } /* Build def/use chain. */ -static struct du_chain * +static bool build_def_use (basic_block bb) { rtx insn; + unsigned HOST_WIDE_INT untracked_operands; - open_chains = closed_chains = NULL; + fail_current_block = false; for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn)) { - if (INSN_P (insn)) + if (NONDEBUG_INSN_P (insn)) { int n_ops; rtx note; rtx old_operands[MAX_RECOG_OPERANDS]; rtx old_dups[MAX_DUP_OPERANDS]; - int i, icode; + int i; int alt; int predicated; + enum rtx_code set_code = SET; + enum rtx_code clobber_code = CLOBBER; + insn_rr_info *insn_info = NULL; /* Process the insn, determining its effect on the def-use - chains. We perform the following steps with the register - references in the insn: - (1) Any read that overlaps an open chain, but doesn't exactly - match, causes that chain to be closed. We can't deal - with overlaps yet. + chains and live hard registers. We perform the following + steps with the register references in the insn, simulating + its effect: + (1) Deal with earlyclobber operands and CLOBBERs of non-operands + by creating chains and marking hard regs live. (2) Any read outside an operand causes any chain it overlaps - with to be closed, since we can't replace it. + with to be marked unrenamable. (3) Any read inside an operand is added if there's already an open chain for it. (4) For any REG_DEAD note we find, close open chains that overlap it. - (5) For any write we find, close open chains that overlap it. - (6) For any write we find in an operand, make a new chain. - (7) For any REG_UNUSED, close any chains we just opened. */ + (5) For any non-earlyclobber write we find, close open chains + that overlap it. + (6) For any non-earlyclobber write we find in an operand, make + a new chain or mark the hard register as live. + (7) For any REG_UNUSED, close any chains we just opened. + + We cannot deal with situations where we track a reg in one mode + and see a reference in another mode; these will cause the chain + to be marked unrenamable or even cause us to abort the entire + basic block. */ - icode = recog_memoized (insn); extract_insn (insn); if (! constrain_operands (1)) fatal_insn_not_found (insn); preprocess_constraints (); alt = which_alternative; n_ops = recog_data.n_operands; + untracked_operands = 0; + + if (insn_rr != NULL) + { + insn_info = VEC_index (insn_rr_info, insn_rr, INSN_UID (insn)); + insn_info->op_info = XOBNEWVEC (&rename_obstack, operand_rr_info, + recog_data.n_operands); + memset (insn_info->op_info, 0, + sizeof (operand_rr_info) * recog_data.n_operands); + } /* Simplify the code below by rewriting things to reflect - matching constraints. Also promote OP_OUT to OP_INOUT - in predicated instructions. */ + matching constraints. Also promote OP_OUT to OP_INOUT in + predicated instructions, but only for register operands + that are already tracked, so that we can create a chain + when the first SET makes a register live. */ predicated = GET_CODE (PATTERN (insn)) == COND_EXEC; for (i = 0; i < n_ops; ++i) { + rtx op = recog_data.operand[i]; int matches = recog_op_alt[i][alt].matches; if (matches >= 0) recog_op_alt[i][alt].cl = recog_op_alt[matches][alt].cl; if (matches >= 0 || recog_op_alt[i][alt].matched >= 0 || (predicated && recog_data.operand_type[i] == OP_OUT)) - recog_data.operand_type[i] = OP_INOUT; + { + recog_data.operand_type[i] = OP_INOUT; + /* A special case to deal with instruction patterns that + have matching operands with different modes. If we're + not already tracking such a reg, we won't start here, + and we must instead make sure to make the operand visible + to the machinery that tracks hard registers. */ + if (matches >= 0 + && (GET_MODE_SIZE (recog_data.operand_mode[i]) + != GET_MODE_SIZE (recog_data.operand_mode[matches])) + && !verify_reg_in_set (op, &live_in_chains)) + { + untracked_operands |= 1 << i; + untracked_operands |= 1 << matches; + } + } + /* If there's an in-out operand with a register that is not + being tracked at all yet, open a chain. */ + if (recog_data.operand_type[i] == OP_INOUT + && !(untracked_operands & (1 << i)) + && REG_P (op) + && !verify_reg_tracked (op)) + { + enum machine_mode mode = GET_MODE (op); + unsigned this_regno = REGNO (op); + unsigned this_nregs = hard_regno_nregs[this_regno][mode]; + create_new_chain (this_regno, this_nregs, NULL, NULL_RTX, + NO_REGS); + } } - /* Step 1: Close chains for which we have overlapping reads. */ - for (i = 0; i < n_ops; i++) - scan_rtx (insn, recog_data.operand_loc[i], - NO_REGS, terminate_overlapping_read, - recog_data.operand_type[i], 0); - - /* Step 2: Close chains for which we have reads outside operands. - We do this by munging all operands into CC0, and closing - everything remaining. */ - - for (i = 0; i < n_ops; i++) - { - old_operands[i] = recog_data.operand[i]; - /* Don't squash match_operator or match_parallel here, since - we don't know that all of the contained registers are - reachable by proper operands. */ - if (recog_data.constraints[i][0] == '\0') - continue; - *recog_data.operand_loc[i] = cc0_rtx; - } - for (i = 0; i < recog_data.n_dups; i++) - { - int dup_num = recog_data.dup_num[i]; + if (fail_current_block) + break; - old_dups[i] = *recog_data.dup_loc[i]; - *recog_data.dup_loc[i] = cc0_rtx; + /* Step 1a: Mark hard registers that are clobbered in this insn, + outside an operand, as live. */ + hide_operands (n_ops, old_operands, old_dups, untracked_operands, + false); + note_stores (PATTERN (insn), note_sets_clobbers, &clobber_code); + restore_operands (insn, n_ops, old_operands, old_dups); - /* For match_dup of match_operator or match_parallel, share - them, so that we don't miss changes in the dup. */ - if (icode >= 0 - && insn_data[icode].operand[dup_num].eliminable == 0) - old_dups[i] = recog_data.operand[dup_num]; - } + /* Step 1b: Begin new chains for earlyclobbered writes inside + operands. */ + record_out_operands (insn, true, insn_info); - scan_rtx (insn, &PATTERN (insn), NO_REGS, terminate_all_read, - OP_IN, 0); + /* Step 2: Mark chains for which we have reads outside operands + as unrenamable. + We do this by munging all operands into CC0, and closing + everything remaining. */ - for (i = 0; i < recog_data.n_dups; i++) - *recog_data.dup_loc[i] = old_dups[i]; - for (i = 0; i < n_ops; i++) - *recog_data.operand_loc[i] = old_operands[i]; + hide_operands (n_ops, old_operands, old_dups, untracked_operands, + false); + scan_rtx (insn, &PATTERN (insn), NO_REGS, mark_all_read, OP_IN); + restore_operands (insn, n_ops, old_operands, old_dups); /* Step 2B: Can't rename function call argument registers. */ if (CALL_P (insn) && CALL_INSN_FUNCTION_USAGE (insn)) scan_rtx (insn, &CALL_INSN_FUNCTION_USAGE (insn), - NO_REGS, terminate_all_read, OP_IN, 0); + NO_REGS, mark_all_read, OP_IN); /* Step 2C: Can't rename asm operands that were originally hard registers. */ @@ -845,7 +1674,7 @@ build_def_use (basic_block bb) && REGNO (op) == ORIGINAL_REGNO (op) && (recog_data.operand_type[i] == OP_IN || recog_data.operand_type[i] == OP_INOUT)) - scan_rtx (insn, loc, NO_REGS, terminate_all_read, OP_IN, 0); + scan_rtx (insn, loc, NO_REGS, mark_all_read, OP_IN); } /* Step 3: Append to chains for reads inside operands. */ @@ -861,14 +1690,18 @@ build_def_use (basic_block bb) /* Don't scan match_operand here, since we've no reg class information to pass down. Any operands that we could substitute in will be represented elsewhere. */ - if (recog_data.constraints[opn][0] == '\0') + if (recog_data.constraints[opn][0] == '\0' + || untracked_operands & (1 << opn)) continue; + if (insn_info) + cur_operand = i == opn ? insn_info->op_info + i : NULL; if (recog_op_alt[opn][alt].is_address) scan_rtx_address (insn, loc, cl, mark_read, VOIDmode); else - scan_rtx (insn, loc, cl, mark_read, type, 0); + scan_rtx (insn, loc, cl, mark_read, type); } + cur_operand = NULL; /* Step 3B: Record updates for regs in REG_INC notes, and source regs in REG_FRAME_RELATED_EXPR notes. */ @@ -876,1097 +1709,140 @@ build_def_use (basic_block bb) if (REG_NOTE_KIND (note) == REG_INC || REG_NOTE_KIND (note) == REG_FRAME_RELATED_EXPR) scan_rtx (insn, &XEXP (note, 0), ALL_REGS, mark_read, - OP_INOUT, 0); + OP_INOUT); /* Step 4: Close chains for registers that die here. */ for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) if (REG_NOTE_KIND (note) == REG_DEAD) - scan_rtx (insn, &XEXP (note, 0), NO_REGS, terminate_dead, - OP_IN, 0); + { + remove_from_hard_reg_set (&live_hard_regs, + GET_MODE (XEXP (note, 0)), + REGNO (XEXP (note, 0))); + scan_rtx (insn, &XEXP (note, 0), NO_REGS, terminate_dead, + OP_IN); + } /* Step 4B: If this is a call, any chain live at this point requires a caller-saved reg. */ if (CALL_P (insn)) { - struct du_chain *p; + struct du_head *p; for (p = open_chains; p; p = p->next_chain) p->need_caller_save_reg = 1; } /* Step 5: Close open chains that overlap writes. Similar to step 2, we hide in-out operands, since we do not want to - close these chains. */ - - for (i = 0; i < n_ops; i++) - { - old_operands[i] = recog_data.operand[i]; - if (recog_data.operand_type[i] == OP_INOUT) - *recog_data.operand_loc[i] = cc0_rtx; - } - for (i = 0; i < recog_data.n_dups; i++) - { - int opn = recog_data.dup_num[i]; - old_dups[i] = *recog_data.dup_loc[i]; - if (recog_data.operand_type[opn] == OP_INOUT) - *recog_data.dup_loc[i] = cc0_rtx; - } - - scan_rtx (insn, &PATTERN (insn), NO_REGS, terminate_write, OP_IN, 0); - - for (i = 0; i < recog_data.n_dups; i++) - *recog_data.dup_loc[i] = old_dups[i]; - for (i = 0; i < n_ops; i++) - *recog_data.operand_loc[i] = old_operands[i]; - - /* Step 6: Begin new chains for writes inside operands. */ - /* ??? Many targets have output constraints on the SET_DEST - of a call insn, which is stupid, since these are certainly - ABI defined hard registers. Don't change calls at all. - Similarly take special care for asm statement that originally - referenced hard registers. */ - if (asm_noperands (PATTERN (insn)) > 0) - { - for (i = 0; i < n_ops; i++) - if (recog_data.operand_type[i] == OP_OUT) - { - rtx *loc = recog_data.operand_loc[i]; - rtx op = *loc; - enum reg_class cl = recog_op_alt[i][alt].cl; - - if (REG_P (op) - && REGNO (op) == ORIGINAL_REGNO (op)) - continue; - - scan_rtx (insn, loc, cl, mark_write, OP_OUT, - recog_op_alt[i][alt].earlyclobber); - } - } - else if (!CALL_P (insn)) - for (i = 0; i < n_ops + recog_data.n_dups; i++) - { - int opn = i < n_ops ? i : recog_data.dup_num[i - n_ops]; - rtx *loc = (i < n_ops - ? recog_data.operand_loc[opn] - : recog_data.dup_loc[i - n_ops]); - enum reg_class cl = recog_op_alt[opn][alt].cl; - - if (recog_data.operand_type[opn] == OP_OUT) - scan_rtx (insn, loc, cl, mark_write, OP_OUT, - recog_op_alt[opn][alt].earlyclobber); - } - - /* Step 6B: Record destination regs in REG_FRAME_RELATED_EXPR - notes for update. */ - for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) - if (REG_NOTE_KIND (note) == REG_FRAME_RELATED_EXPR) - scan_rtx (insn, &XEXP (note, 0), ALL_REGS, mark_access, - OP_INOUT, 0); + close these chains. We also hide earlyclobber operands, + since we've opened chains for them in step 1, and earlier + chains they would overlap with must have been closed at + the previous insn at the latest, as such operands cannot + possibly overlap with any input operands. */ + + hide_operands (n_ops, old_operands, old_dups, untracked_operands, + true); + scan_rtx (insn, &PATTERN (insn), NO_REGS, terminate_write, OP_IN); + restore_operands (insn, n_ops, old_operands, old_dups); + + /* Step 6a: Mark hard registers that are set in this insn, + outside an operand, as live. */ + hide_operands (n_ops, old_operands, old_dups, untracked_operands, + false); + note_stores (PATTERN (insn), note_sets_clobbers, &set_code); + restore_operands (insn, n_ops, old_operands, old_dups); + + /* Step 6b: Begin new chains for writes inside operands. */ + record_out_operands (insn, false, insn_info); + + /* Step 6c: Record destination regs in REG_FRAME_RELATED_EXPR + notes for update. */ + for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) + if (REG_NOTE_KIND (note) == REG_FRAME_RELATED_EXPR) + scan_rtx (insn, &XEXP (note, 0), ALL_REGS, mark_access, + OP_INOUT); /* Step 7: Close chains for registers that were never really used here. */ for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) if (REG_NOTE_KIND (note) == REG_UNUSED) - scan_rtx (insn, &XEXP (note, 0), NO_REGS, terminate_dead, - OP_IN, 0); + { + remove_from_hard_reg_set (&live_hard_regs, + GET_MODE (XEXP (note, 0)), + REGNO (XEXP (note, 0))); + scan_rtx (insn, &XEXP (note, 0), NO_REGS, terminate_dead, + OP_IN); + } } - if (insn == BB_END (bb)) - break; - } - - /* Since we close every chain when we find a REG_DEAD note, anything that - is still open lives past the basic block, so it can't be renamed. */ - return closed_chains; -} - -/* Dump all def/use chains in CHAINS to DUMP_FILE. They are - printed in reverse order as that's how we build them. */ - -static void -dump_def_use_chain (struct du_chain *chains) -{ - while (chains) - { - struct du_chain *this = chains; - int r = REGNO (*this->loc); - int nregs = hard_regno_nregs[r][GET_MODE (*this->loc)]; - fprintf (dump_file, "Register %s (%d):", reg_names[r], nregs); - while (this) + else if (DEBUG_INSN_P (insn) + && !VAR_LOC_UNKNOWN_P (INSN_VAR_LOCATION_LOC (insn))) { - fprintf (dump_file, " %d [%s]", INSN_UID (this->insn), - reg_class_names[this->cl]); - this = this->next_use; + scan_rtx (insn, &INSN_VAR_LOCATION_LOC (insn), + ALL_REGS, mark_read, OP_IN); } - fprintf (dump_file, "\n"); - chains = chains->next_chain; - } -} - -/* The following code does forward propagation of hard register copies. - The object is to eliminate as many dependencies as possible, so that - we have the most scheduling freedom. As a side effect, we also clean - up some silly register allocation decisions made by reload. This - code may be obsoleted by a new register allocator. */ - -/* For each register, we have a list of registers that contain the same - value. The OLDEST_REGNO field points to the head of the list, and - the NEXT_REGNO field runs through the list. The MODE field indicates - what mode the data is known to be in; this field is VOIDmode when the - register is not known to contain valid data. */ - -struct value_data_entry -{ - enum machine_mode mode; - unsigned int oldest_regno; - unsigned int next_regno; -}; - -struct value_data -{ - struct value_data_entry e[FIRST_PSEUDO_REGISTER]; - unsigned int max_value_regs; -}; - -static void kill_value_one_regno (unsigned, struct value_data *); -static void kill_value_regno (unsigned, unsigned, struct value_data *); -static void kill_value (rtx, struct value_data *); -static void set_value_regno (unsigned, enum machine_mode, struct value_data *); -static void init_value_data (struct value_data *); -static void kill_clobbered_value (rtx, rtx, void *); -static void kill_set_value (rtx, rtx, void *); -static int kill_autoinc_value (rtx *, void *); -static void copy_value (rtx, rtx, struct value_data *); -static bool mode_change_ok (enum machine_mode, enum machine_mode, - unsigned int); -static rtx maybe_mode_change (enum machine_mode, enum machine_mode, - enum machine_mode, unsigned int, unsigned int); -static rtx find_oldest_value_reg (enum reg_class, rtx, struct value_data *); -static bool replace_oldest_value_reg (rtx *, enum reg_class, rtx, - struct value_data *); -static bool replace_oldest_value_addr (rtx *, enum reg_class, - enum machine_mode, rtx, - struct value_data *); -static bool replace_oldest_value_mem (rtx, rtx, struct value_data *); -static bool copyprop_hardreg_forward_1 (basic_block, struct value_data *); -extern void debug_value_data (struct value_data *); -#ifdef ENABLE_CHECKING -static void validate_value_data (struct value_data *); -#endif - -/* Kill register REGNO. This involves removing it from any value - lists, and resetting the value mode to VOIDmode. This is only a - helper function; it does not handle any hard registers overlapping - with REGNO. */ - -static void -kill_value_one_regno (unsigned int regno, struct value_data *vd) -{ - unsigned int i, next; - - if (vd->e[regno].oldest_regno != regno) - { - for (i = vd->e[regno].oldest_regno; - vd->e[i].next_regno != regno; - i = vd->e[i].next_regno) - continue; - vd->e[i].next_regno = vd->e[regno].next_regno; - } - else if ((next = vd->e[regno].next_regno) != INVALID_REGNUM) - { - for (i = next; i != INVALID_REGNUM; i = vd->e[i].next_regno) - vd->e[i].oldest_regno = next; - } - - vd->e[regno].mode = VOIDmode; - vd->e[regno].oldest_regno = regno; - vd->e[regno].next_regno = INVALID_REGNUM; - -#ifdef ENABLE_CHECKING - validate_value_data (vd); -#endif -} - -/* Kill the value in register REGNO for NREGS, and any other registers - whose values overlap. */ - -static void -kill_value_regno (unsigned int regno, unsigned int nregs, - struct value_data *vd) -{ - unsigned int j; - - /* Kill the value we're told to kill. */ - for (j = 0; j < nregs; ++j) - kill_value_one_regno (regno + j, vd); - - /* Kill everything that overlapped what we're told to kill. */ - if (regno < vd->max_value_regs) - j = 0; - else - j = regno - vd->max_value_regs; - for (; j < regno; ++j) - { - unsigned int i, n; - if (vd->e[j].mode == VOIDmode) - continue; - n = hard_regno_nregs[j][vd->e[j].mode]; - if (j + n > regno) - for (i = 0; i < n; ++i) - kill_value_one_regno (j + i, vd); - } -} - -/* Kill X. This is a convenience function wrapping kill_value_regno - so that we mind the mode the register is in. */ - -static void -kill_value (rtx x, struct value_data *vd) -{ - rtx orig_rtx = x; - - if (GET_CODE (x) == SUBREG) - { - x = simplify_subreg (GET_MODE (x), SUBREG_REG (x), - GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x)); - if (x == NULL_RTX) - x = SUBREG_REG (orig_rtx); - } - if (REG_P (x)) - { - unsigned int regno = REGNO (x); - unsigned int n = hard_regno_nregs[regno][GET_MODE (x)]; - - kill_value_regno (regno, n, vd); - } -} - -/* Remember that REGNO is valid in MODE. */ - -static void -set_value_regno (unsigned int regno, enum machine_mode mode, - struct value_data *vd) -{ - unsigned int nregs; - - vd->e[regno].mode = mode; - - nregs = hard_regno_nregs[regno][mode]; - if (nregs > vd->max_value_regs) - vd->max_value_regs = nregs; -} - -/* Initialize VD such that there are no known relationships between regs. */ - -static void -init_value_data (struct value_data *vd) -{ - int i; - for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) - { - vd->e[i].mode = VOIDmode; - vd->e[i].oldest_regno = i; - vd->e[i].next_regno = INVALID_REGNUM; - } - vd->max_value_regs = 0; -} - -/* Called through note_stores. If X is clobbered, kill its value. */ - -static void -kill_clobbered_value (rtx x, rtx set, void *data) -{ - struct value_data *vd = data; - if (GET_CODE (set) == CLOBBER) - kill_value (x, vd); -} - -/* Called through note_stores. If X is set, not clobbered, kill its - current value and install it as the root of its own value list. */ - -static void -kill_set_value (rtx x, rtx set, void *data) -{ - struct value_data *vd = data; - if (GET_CODE (set) != CLOBBER) - { - kill_value (x, vd); - if (REG_P (x)) - set_value_regno (REGNO (x), GET_MODE (x), vd); - } -} - -/* Called through for_each_rtx. Kill any register used as the base of an - auto-increment expression, and install that register as the root of its - own value list. */ - -static int -kill_autoinc_value (rtx *px, void *data) -{ - rtx x = *px; - struct value_data *vd = data; - - if (GET_RTX_CLASS (GET_CODE (x)) == RTX_AUTOINC) - { - x = XEXP (x, 0); - kill_value (x, vd); - set_value_regno (REGNO (x), Pmode, vd); - return -1; + if (insn == BB_END (bb)) + break; } - return 0; -} - -/* Assert that SRC has been copied to DEST. Adjust the data structures - to reflect that SRC contains an older copy of the shared value. */ - -static void -copy_value (rtx dest, rtx src, struct value_data *vd) -{ - unsigned int dr = REGNO (dest); - unsigned int sr = REGNO (src); - unsigned int dn, sn; - unsigned int i; - - /* ??? At present, it's possible to see noop sets. It'd be nice if - this were cleaned up beforehand... */ - if (sr == dr) - return; - - /* Do not propagate copies to the stack pointer, as that can leave - memory accesses with no scheduling dependency on the stack update. */ - if (dr == STACK_POINTER_REGNUM) - return; - - /* Likewise with the frame pointer, if we're using one. */ - if (frame_pointer_needed && dr == HARD_FRAME_POINTER_REGNUM) - return; - - /* Do not propagate copies to fixed or global registers, patterns - can be relying to see particular fixed register or users can - expect the chosen global register in asm. */ - if (fixed_regs[dr] || global_regs[dr]) - return; - - /* If SRC and DEST overlap, don't record anything. */ - dn = hard_regno_nregs[dr][GET_MODE (dest)]; - sn = hard_regno_nregs[sr][GET_MODE (dest)]; - if ((dr > sr && dr < sr + sn) - || (sr > dr && sr < dr + dn)) - return; - - /* If SRC had no assigned mode (i.e. we didn't know it was live) - assign it now and assume the value came from an input argument - or somesuch. */ - if (vd->e[sr].mode == VOIDmode) - set_value_regno (sr, vd->e[dr].mode, vd); - - /* If we are narrowing the input to a smaller number of hard regs, - and it is in big endian, we are really extracting a high part. - Since we generally associate a low part of a value with the value itself, - we must not do the same for the high part. - Note we can still get low parts for the same mode combination through - a two-step copy involving differently sized hard regs. - Assume hard regs fr* are 32 bits bits each, while r* are 64 bits each: - (set (reg:DI r0) (reg:DI fr0)) - (set (reg:SI fr2) (reg:SI r0)) - loads the low part of (reg:DI fr0) - i.e. fr1 - into fr2, while: - (set (reg:SI fr2) (reg:SI fr0)) - loads the high part of (reg:DI fr0) into fr2. - - We can't properly represent the latter case in our tables, so don't - record anything then. */ - else if (sn < (unsigned int) hard_regno_nregs[sr][vd->e[sr].mode] - && (GET_MODE_SIZE (vd->e[sr].mode) > UNITS_PER_WORD - ? WORDS_BIG_ENDIAN : BYTES_BIG_ENDIAN)) - return; - - /* If SRC had been assigned a mode narrower than the copy, we can't - link DEST into the chain, because not all of the pieces of the - copy came from oldest_regno. */ - else if (sn > (unsigned int) hard_regno_nregs[sr][vd->e[sr].mode]) - return; - - /* Link DR at the end of the value chain used by SR. */ - - vd->e[dr].oldest_regno = vd->e[sr].oldest_regno; - - for (i = sr; vd->e[i].next_regno != INVALID_REGNUM; i = vd->e[i].next_regno) - continue; - vd->e[i].next_regno = dr; - -#ifdef ENABLE_CHECKING - validate_value_data (vd); -#endif -} - -/* Return true if a mode change from ORIG to NEW is allowed for REGNO. */ - -static bool -mode_change_ok (enum machine_mode orig_mode, enum machine_mode new_mode, - unsigned int regno ATTRIBUTE_UNUSED) -{ - if (GET_MODE_SIZE (orig_mode) < GET_MODE_SIZE (new_mode)) + if (fail_current_block) return false; -#ifdef CANNOT_CHANGE_MODE_CLASS - return !REG_CANNOT_CHANGE_MODE_P (regno, orig_mode, new_mode); -#endif - return true; } - -/* Register REGNO was originally set in ORIG_MODE. It - or a copy of it - - was copied in COPY_MODE to COPY_REGNO, and then COPY_REGNO was accessed - in NEW_MODE. - Return a NEW_MODE rtx for REGNO if that's OK, otherwise return NULL_RTX. */ - -static rtx -maybe_mode_change (enum machine_mode orig_mode, enum machine_mode copy_mode, - enum machine_mode new_mode, unsigned int regno, - unsigned int copy_regno ATTRIBUTE_UNUSED) -{ - if (orig_mode == new_mode) - return gen_rtx_raw_REG (new_mode, regno); - else if (mode_change_ok (orig_mode, new_mode, regno)) - { - int copy_nregs = hard_regno_nregs[copy_regno][copy_mode]; - int use_nregs = hard_regno_nregs[copy_regno][new_mode]; - int copy_offset - = GET_MODE_SIZE (copy_mode) / copy_nregs * (copy_nregs - use_nregs); - int offset - = GET_MODE_SIZE (orig_mode) - GET_MODE_SIZE (new_mode) - copy_offset; - int byteoffset = offset % UNITS_PER_WORD; - int wordoffset = offset - byteoffset; - - offset = ((WORDS_BIG_ENDIAN ? wordoffset : 0) - + (BYTES_BIG_ENDIAN ? byteoffset : 0)); - return gen_rtx_raw_REG (new_mode, - regno + subreg_regno_offset (regno, orig_mode, - offset, - new_mode)); - } - return NULL_RTX; -} - -/* Find the oldest copy of the value contained in REGNO that is in - register class CL and has mode MODE. If found, return an rtx - of that oldest register, otherwise return NULL. */ - -static rtx -find_oldest_value_reg (enum reg_class cl, rtx reg, struct value_data *vd) -{ - unsigned int regno = REGNO (reg); - enum machine_mode mode = GET_MODE (reg); - unsigned int i; - - /* If we are accessing REG in some mode other that what we set it in, - make sure that the replacement is valid. In particular, consider - (set (reg:DI r11) (...)) - (set (reg:SI r9) (reg:SI r11)) - (set (reg:SI r10) (...)) - (set (...) (reg:DI r9)) - Replacing r9 with r11 is invalid. */ - if (mode != vd->e[regno].mode) - { - if (hard_regno_nregs[regno][mode] - > hard_regno_nregs[regno][vd->e[regno].mode]) - return NULL_RTX; - } - - for (i = vd->e[regno].oldest_regno; i != regno; i = vd->e[i].next_regno) - { - enum machine_mode oldmode = vd->e[i].mode; - rtx new; - unsigned int last; - - for (last = i; last < i + hard_regno_nregs[i][mode]; last++) - if (!TEST_HARD_REG_BIT (reg_class_contents[cl], last)) - return NULL_RTX; - - new = maybe_mode_change (oldmode, vd->e[regno].mode, mode, i, regno); - if (new) - { - ORIGINAL_REGNO (new) = ORIGINAL_REGNO (reg); - REG_ATTRS (new) = REG_ATTRS (reg); - return new; - } - } - - return NULL_RTX; -} - -/* If possible, replace the register at *LOC with the oldest register - in register class CL. Return true if successfully replaced. */ - -static bool -replace_oldest_value_reg (rtx *loc, enum reg_class cl, rtx insn, - struct value_data *vd) -{ - rtx new = find_oldest_value_reg (cl, *loc, vd); - if (new) - { - if (dump_file) - fprintf (dump_file, "insn %u: replaced reg %u with %u\n", - INSN_UID (insn), REGNO (*loc), REGNO (new)); - - validate_change (insn, loc, new, 1); - return true; - } - return false; -} - -/* Similar to replace_oldest_value_reg, but *LOC contains an address. - Adapted from find_reloads_address_1. CL is INDEX_REG_CLASS or - BASE_REG_CLASS depending on how the register is being considered. */ - -static bool -replace_oldest_value_addr (rtx *loc, enum reg_class cl, - enum machine_mode mode, rtx insn, - struct value_data *vd) -{ - rtx x = *loc; - RTX_CODE code = GET_CODE (x); - const char *fmt; - int i, j; - bool changed = false; - - switch (code) - { - case PLUS: - { - rtx orig_op0 = XEXP (x, 0); - rtx orig_op1 = XEXP (x, 1); - RTX_CODE code0 = GET_CODE (orig_op0); - RTX_CODE code1 = GET_CODE (orig_op1); - rtx op0 = orig_op0; - rtx op1 = orig_op1; - rtx *locI = NULL; - rtx *locB = NULL; - rtx *locB_reg = NULL; - - if (GET_CODE (op0) == SUBREG) - { - op0 = SUBREG_REG (op0); - code0 = GET_CODE (op0); - } - - if (GET_CODE (op1) == SUBREG) - { - op1 = SUBREG_REG (op1); - code1 = GET_CODE (op1); - } - - if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE - || code0 == ZERO_EXTEND || code1 == MEM) - { - locI = &XEXP (x, 0); - locB = &XEXP (x, 1); - } - else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE - || code1 == ZERO_EXTEND || code0 == MEM) - { - locI = &XEXP (x, 1); - locB = &XEXP (x, 0); - } - else if (code0 == CONST_INT || code0 == CONST - || code0 == SYMBOL_REF || code0 == LABEL_REF) - locB = &XEXP (x, 1); - else if (code1 == CONST_INT || code1 == CONST - || code1 == SYMBOL_REF || code1 == LABEL_REF) - locB = &XEXP (x, 0); - else if (code0 == REG && code1 == REG) - { - int index_op; - - if (REG_OK_FOR_INDEX_P (op0) - && REG_MODE_OK_FOR_REG_BASE_P (op1, mode)) - index_op = 0; - else if (REG_OK_FOR_INDEX_P (op1) - && REG_MODE_OK_FOR_REG_BASE_P (op0, mode)) - index_op = 1; - else if (REG_MODE_OK_FOR_REG_BASE_P (op1, mode)) - index_op = 0; - else if (REG_MODE_OK_FOR_REG_BASE_P (op0, mode)) - index_op = 1; - else if (REG_OK_FOR_INDEX_P (op1)) - index_op = 1; - else - index_op = 0; - - locI = &XEXP (x, index_op); - locB_reg = &XEXP (x, !index_op); - } - else if (code0 == REG) - { - locI = &XEXP (x, 0); - locB = &XEXP (x, 1); - } - else if (code1 == REG) - { - locI = &XEXP (x, 1); - locB = &XEXP (x, 0); - } - - if (locI) - changed |= replace_oldest_value_addr (locI, INDEX_REG_CLASS, mode, - insn, vd); - if (locB) - changed |= replace_oldest_value_addr (locB, - MODE_BASE_REG_CLASS (mode), - mode, insn, vd); - if (locB_reg) - changed |= replace_oldest_value_addr (locB_reg, - MODE_BASE_REG_REG_CLASS (mode), - mode, insn, vd); - return changed; - } - - case POST_INC: - case POST_DEC: - case POST_MODIFY: - case PRE_INC: - case PRE_DEC: - case PRE_MODIFY: - return false; - - case MEM: - return replace_oldest_value_mem (x, insn, vd); - - case REG: - return replace_oldest_value_reg (loc, cl, insn, vd); - - default: - break; - } - - fmt = GET_RTX_FORMAT (code); - for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) - { - if (fmt[i] == 'e') - changed |= replace_oldest_value_addr (&XEXP (x, i), cl, mode, - insn, vd); - else if (fmt[i] == 'E') - for (j = XVECLEN (x, i) - 1; j >= 0; j--) - changed |= replace_oldest_value_addr (&XVECEXP (x, i, j), cl, - mode, insn, vd); - } - - return changed; -} - -/* Similar to replace_oldest_value_reg, but X contains a memory. */ - -static bool -replace_oldest_value_mem (rtx x, rtx insn, struct value_data *vd) -{ - return replace_oldest_value_addr (&XEXP (x, 0), - MODE_BASE_REG_CLASS (GET_MODE (x)), - GET_MODE (x), insn, vd); -} - -/* Perform the forward copy propagation on basic block BB. */ - -static bool -copyprop_hardreg_forward_1 (basic_block bb, struct value_data *vd) -{ - bool changed = false; - rtx insn; - - for (insn = BB_HEAD (bb); ; insn = NEXT_INSN (insn)) - { - int n_ops, i, alt, predicated; - bool is_asm, any_replacements; - rtx set; - bool replaced[MAX_RECOG_OPERANDS]; - - if (! INSN_P (insn)) - { - if (insn == BB_END (bb)) - break; - else - continue; - } - - set = single_set (insn); - extract_insn (insn); - if (! constrain_operands (1)) - fatal_insn_not_found (insn); - preprocess_constraints (); - alt = which_alternative; - n_ops = recog_data.n_operands; - is_asm = asm_noperands (PATTERN (insn)) >= 0; - - /* Simplify the code below by rewriting things to reflect - matching constraints. Also promote OP_OUT to OP_INOUT - in predicated instructions. */ - - predicated = GET_CODE (PATTERN (insn)) == COND_EXEC; - for (i = 0; i < n_ops; ++i) - { - int matches = recog_op_alt[i][alt].matches; - if (matches >= 0) - recog_op_alt[i][alt].cl = recog_op_alt[matches][alt].cl; - if (matches >= 0 || recog_op_alt[i][alt].matched >= 0 - || (predicated && recog_data.operand_type[i] == OP_OUT)) - recog_data.operand_type[i] = OP_INOUT; - } - - /* For each earlyclobber operand, zap the value data. */ - for (i = 0; i < n_ops; i++) - if (recog_op_alt[i][alt].earlyclobber) - kill_value (recog_data.operand[i], vd); - - /* Within asms, a clobber cannot overlap inputs or outputs. - I wouldn't think this were true for regular insns, but - scan_rtx treats them like that... */ - note_stores (PATTERN (insn), kill_clobbered_value, vd); - - /* Kill all auto-incremented values. */ - /* ??? REG_INC is useless, since stack pushes aren't done that way. */ - for_each_rtx (&PATTERN (insn), kill_autoinc_value, vd); - - /* Kill all early-clobbered operands. */ - for (i = 0; i < n_ops; i++) - if (recog_op_alt[i][alt].earlyclobber) - kill_value (recog_data.operand[i], vd); - - /* Special-case plain move instructions, since we may well - be able to do the move from a different register class. */ - if (set && REG_P (SET_SRC (set))) - { - rtx src = SET_SRC (set); - unsigned int regno = REGNO (src); - enum machine_mode mode = GET_MODE (src); - unsigned int i; - rtx new; - - /* If we are accessing SRC in some mode other that what we - set it in, make sure that the replacement is valid. */ - if (mode != vd->e[regno].mode) - { - if (hard_regno_nregs[regno][mode] - > hard_regno_nregs[regno][vd->e[regno].mode]) - goto no_move_special_case; - } - - /* If the destination is also a register, try to find a source - register in the same class. */ - if (REG_P (SET_DEST (set))) - { - new = find_oldest_value_reg (REGNO_REG_CLASS (regno), src, vd); - if (new && validate_change (insn, &SET_SRC (set), new, 0)) - { - if (dump_file) - fprintf (dump_file, - "insn %u: replaced reg %u with %u\n", - INSN_UID (insn), regno, REGNO (new)); - changed = true; - goto did_replacement; - } - } - - /* Otherwise, try all valid registers and see if its valid. */ - for (i = vd->e[regno].oldest_regno; i != regno; - i = vd->e[i].next_regno) - { - new = maybe_mode_change (vd->e[i].mode, vd->e[regno].mode, - mode, i, regno); - if (new != NULL_RTX) - { - if (validate_change (insn, &SET_SRC (set), new, 0)) - { - ORIGINAL_REGNO (new) = ORIGINAL_REGNO (src); - REG_ATTRS (new) = REG_ATTRS (src); - if (dump_file) - fprintf (dump_file, - "insn %u: replaced reg %u with %u\n", - INSN_UID (insn), regno, REGNO (new)); - changed = true; - goto did_replacement; - } - } - } - } - no_move_special_case: - - any_replacements = false; - - /* For each input operand, replace a hard register with the - eldest live copy that's in an appropriate register class. */ - for (i = 0; i < n_ops; i++) - { - replaced[i] = false; - - /* Don't scan match_operand here, since we've no reg class - information to pass down. Any operands that we could - substitute in will be represented elsewhere. */ - if (recog_data.constraints[i][0] == '\0') - continue; - - /* Don't replace in asms intentionally referencing hard regs. */ - if (is_asm && REG_P (recog_data.operand[i]) - && (REGNO (recog_data.operand[i]) - == ORIGINAL_REGNO (recog_data.operand[i]))) - continue; - - if (recog_data.operand_type[i] == OP_IN) - { - if (recog_op_alt[i][alt].is_address) - replaced[i] - = replace_oldest_value_addr (recog_data.operand_loc[i], - recog_op_alt[i][alt].cl, - VOIDmode, insn, vd); - else if (REG_P (recog_data.operand[i])) - replaced[i] - = replace_oldest_value_reg (recog_data.operand_loc[i], - recog_op_alt[i][alt].cl, - insn, vd); - else if (MEM_P (recog_data.operand[i])) - replaced[i] = replace_oldest_value_mem (recog_data.operand[i], - insn, vd); - } - else if (MEM_P (recog_data.operand[i])) - replaced[i] = replace_oldest_value_mem (recog_data.operand[i], - insn, vd); - - /* If we performed any replacement, update match_dups. */ - if (replaced[i]) - { - int j; - rtx new; - - new = *recog_data.operand_loc[i]; - recog_data.operand[i] = new; - for (j = 0; j < recog_data.n_dups; j++) - if (recog_data.dup_num[j] == i) - validate_change (insn, recog_data.dup_loc[j], new, 1); - - any_replacements = true; - } - } - - if (any_replacements) - { - if (! apply_change_group ()) - { - for (i = 0; i < n_ops; i++) - if (replaced[i]) - { - rtx old = *recog_data.operand_loc[i]; - recog_data.operand[i] = old; - } - - if (dump_file) - fprintf (dump_file, - "insn %u: reg replacements not verified\n", - INSN_UID (insn)); - } - else - changed = true; - } - - did_replacement: - /* Clobber call-clobbered registers. */ - if (CALL_P (insn)) - for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) - if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) - kill_value_regno (i, 1, vd); - - /* Notice stores. */ - note_stores (PATTERN (insn), kill_set_value, vd); - - /* Notice copies. */ - if (set && REG_P (SET_DEST (set)) && REG_P (SET_SRC (set))) - copy_value (SET_DEST (set), SET_SRC (set), vd); - - if (insn == BB_END (bb)) - break; - } - - return changed; -} - -/* Main entry point for the forward copy propagation optimization. */ - -static void -copyprop_hardreg_forward (void) + +/* Initialize the register renamer. If INSN_INFO is true, ensure that + insn_rr is nonnull. */ +void +regrename_init (bool insn_info) { - struct value_data *all_vd; - bool need_refresh; - basic_block bb; - sbitmap visited; - - need_refresh = false; - - all_vd = xmalloc (sizeof (struct value_data) * last_basic_block); - - visited = sbitmap_alloc (last_basic_block); - sbitmap_zero (visited); - - FOR_EACH_BB (bb) - { - SET_BIT (visited, bb->index); - - /* If a block has a single predecessor, that we've already - processed, begin with the value data that was live at - the end of the predecessor block. */ - /* ??? Ought to use more intelligent queuing of blocks. */ - if (single_pred_p (bb) - && TEST_BIT (visited, single_pred (bb)->index) - && ! (single_pred_edge (bb)->flags & (EDGE_ABNORMAL_CALL | EDGE_EH))) - all_vd[bb->index] = all_vd[single_pred (bb)->index]; - else - init_value_data (all_vd + bb->index); - - if (copyprop_hardreg_forward_1 (bb, all_vd + bb->index)) - need_refresh = true; - } - - sbitmap_free (visited); - - if (need_refresh) - { - if (dump_file) - fputs ("\n\n", dump_file); - - /* ??? Irritatingly, delete_noop_moves does not take a set of blocks - to scan, so we have to do a life update with no initial set of - blocks Just In Case. */ - delete_noop_moves (); - update_life_info (NULL, UPDATE_LIFE_GLOBAL_RM_NOTES, - PROP_DEATH_NOTES - | PROP_SCAN_DEAD_CODE - | PROP_KILL_DEAD_CODE); - } - - free (all_vd); + gcc_obstack_init (&rename_obstack); + insn_rr = NULL; + if (insn_info) + VEC_safe_grow_cleared (insn_rr_info, heap, insn_rr, get_max_uid ()); } -/* Dump the value chain data to stderr. */ - +/* Free all global data used by the register renamer. */ void -debug_value_data (struct value_data *vd) +regrename_finish (void) { - HARD_REG_SET set; - unsigned int i, j; - - CLEAR_HARD_REG_SET (set); - - for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) - if (vd->e[i].oldest_regno == i) - { - if (vd->e[i].mode == VOIDmode) - { - if (vd->e[i].next_regno != INVALID_REGNUM) - fprintf (stderr, "[%u] Bad next_regno for empty chain (%u)\n", - i, vd->e[i].next_regno); - continue; - } - - SET_HARD_REG_BIT (set, i); - fprintf (stderr, "[%u %s] ", i, GET_MODE_NAME (vd->e[i].mode)); - - for (j = vd->e[i].next_regno; - j != INVALID_REGNUM; - j = vd->e[j].next_regno) - { - if (TEST_HARD_REG_BIT (set, j)) - { - fprintf (stderr, "[%u] Loop in regno chain\n", j); - return; - } - - if (vd->e[j].oldest_regno != i) - { - fprintf (stderr, "[%u] Bad oldest_regno (%u)\n", - j, vd->e[j].oldest_regno); - return; - } - SET_HARD_REG_BIT (set, j); - fprintf (stderr, "[%u %s] ", j, GET_MODE_NAME (vd->e[j].mode)); - } - fputc ('\n', stderr); - } - - for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) - if (! TEST_HARD_REG_BIT (set, i) - && (vd->e[i].mode != VOIDmode - || vd->e[i].oldest_regno != i - || vd->e[i].next_regno != INVALID_REGNUM)) - fprintf (stderr, "[%u] Non-empty reg in chain (%s %u %i)\n", - i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno, - vd->e[i].next_regno); + VEC_free (insn_rr_info, heap, insn_rr); + free_chain_data (); + obstack_free (&rename_obstack, NULL); } -#ifdef ENABLE_CHECKING -static void -validate_value_data (struct value_data *vd) +/* Perform register renaming on the current function. */ + +static unsigned int +regrename_optimize (void) { - HARD_REG_SET set; - unsigned int i, j; + df_set_flags (DF_LR_RUN_DCE); + df_note_add_problem (); + df_analyze (); + df_set_flags (DF_DEFER_INSN_RESCAN); - CLEAR_HARD_REG_SET (set); + regrename_init (false); - for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) - if (vd->e[i].oldest_regno == i) - { - if (vd->e[i].mode == VOIDmode) - { - if (vd->e[i].next_regno != INVALID_REGNUM) - internal_error ("validate_value_data: [%u] Bad next_regno for empty chain (%u)", - i, vd->e[i].next_regno); - continue; - } + regrename_analyze (NULL); - SET_HARD_REG_BIT (set, i); + rename_chains (); - for (j = vd->e[i].next_regno; - j != INVALID_REGNUM; - j = vd->e[j].next_regno) - { - if (TEST_HARD_REG_BIT (set, j)) - internal_error ("validate_value_data: Loop in regno chain (%u)", - j); - if (vd->e[j].oldest_regno != i) - internal_error ("validate_value_data: [%u] Bad oldest_regno (%u)", - j, vd->e[j].oldest_regno); - - SET_HARD_REG_BIT (set, j); - } - } + regrename_finish (); - for (i = 0; i < FIRST_PSEUDO_REGISTER; ++i) - if (! TEST_HARD_REG_BIT (set, i) - && (vd->e[i].mode != VOIDmode - || vd->e[i].oldest_regno != i - || vd->e[i].next_regno != INVALID_REGNUM)) - internal_error ("validate_value_data: [%u] Non-empty reg in chain (%s %u %i)", - i, GET_MODE_NAME (vd->e[i].mode), vd->e[i].oldest_regno, - vd->e[i].next_regno); + return 0; } -#endif static bool gate_handle_regrename (void) { - return (optimize > 0 && (flag_rename_registers || flag_cprop_registers)); + return (optimize > 0 && (flag_rename_registers)); } - -/* Run the regrename and cprop passes. */ -static void -rest_of_handle_regrename (void) -{ - if (flag_rename_registers) - regrename_optimize (); - if (flag_cprop_registers) - copyprop_hardreg_forward (); -} - -struct tree_opt_pass pass_regrename = +struct rtl_opt_pass pass_regrename = { + { + RTL_PASS, "rnreg", /* name */ gate_handle_regrename, /* gate */ - rest_of_handle_regrename, /* execute */ + regrename_optimize, /* execute */ NULL, /* sub */ NULL, /* next */ 0, /* static_pass_number */ @@ -1975,7 +1851,7 @@ struct tree_opt_pass pass_regrename = 0, /* properties_provided */ 0, /* properties_destroyed */ 0, /* todo_flags_start */ - TODO_dump_func, /* todo_flags_finish */ - 'n' /* letter */ + TODO_df_finish | TODO_verify_rtl_sharing | + 0 /* todo_flags_finish */ + } }; -