X-Git-Url: http://git.sourceforge.jp/view?a=blobdiff_plain;f=gcc%2Fira-lives.c;h=b1896981c29c017c46b6b9fceb879a13f5974233;hb=ce5b51891987dbc2b35a1ee3e2acddb876a22f33;hp=0d1e402d82b38a895e9b330d095e569241f886ca;hpb=cab5546950f138fc48bbbb468af82f0842321568;p=pf3gnuchains%2Fgcc-fork.git diff --git a/gcc/ira-lives.c b/gcc/ira-lives.c index 0d1e402d82b..b1896981c29 100644 --- a/gcc/ira-lives.c +++ b/gcc/ira-lives.c @@ -1,5 +1,5 @@ /* IRA processing allocno lives to build allocno live ranges. - Copyright (C) 2006, 2007, 2008 + Copyright (C) 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc. Contributed by Vladimir Makarov . @@ -33,9 +33,11 @@ along with GCC; see the file COPYING3. If not see #include "basic-block.h" #include "insn-config.h" #include "recog.h" +#include "diagnostic-core.h" #include "toplev.h" #include "params.h" #include "df.h" +#include "sbitmap.h" #include "sparseset.h" #include "ira-int.h" @@ -54,7 +56,7 @@ int ira_max_point; /* Arrays of size IRA_MAX_POINT mapping a program point to the allocno live ranges with given start/finish point. */ -allocno_live_range_t *ira_start_point_ranges, *ira_finish_point_ranges; +live_range_t *ira_start_point_ranges, *ira_finish_point_ranges; /* Number of the current program point. */ static int curr_point; @@ -67,8 +69,12 @@ static int curr_point; classes. */ static int high_pressure_start_point[N_REG_CLASSES]; -/* Allocnos live at current point in the scan. */ -static sparseset allocnos_live; +/* Objects live at current point in the scan. */ +static sparseset objects_live; + +/* A temporary bitmap used in functions that wish to avoid visiting an allocno + multiple times. */ +static sparseset allocnos_processed; /* Set of hard regs (except eliminable ones) currently live. */ static HARD_REG_SET hard_regs_live; @@ -81,46 +87,56 @@ static int last_call_num; /* The number of last call at which given allocno was saved. */ static int *allocno_saved_at_call; -/* The function processing birth of register REGNO. It updates living - hard regs and conflict hard regs for living allocnos or starts a - new live range for the allocno corresponding to REGNO if it is - necessary. */ +/* Record the birth of hard register REGNO, updating hard_regs_live and + hard reg conflict information for living allocnos. */ static void -make_regno_born (int regno) +make_hard_regno_born (int regno) { unsigned int i; - ira_allocno_t a; - allocno_live_range_t p; - if (regno < FIRST_PSEUDO_REGISTER) + SET_HARD_REG_BIT (hard_regs_live, regno); + EXECUTE_IF_SET_IN_SPARSESET (objects_live, i) { - SET_HARD_REG_BIT (hard_regs_live, regno); - EXECUTE_IF_SET_IN_SPARSESET (allocnos_live, i) - { - SET_HARD_REG_BIT (ALLOCNO_CONFLICT_HARD_REGS (ira_allocnos[i]), - regno); - SET_HARD_REG_BIT (ALLOCNO_TOTAL_CONFLICT_HARD_REGS (ira_allocnos[i]), - regno); - } - return; + ira_object_t obj = ira_object_id_map[i]; + SET_HARD_REG_BIT (OBJECT_CONFLICT_HARD_REGS (obj), regno); + SET_HARD_REG_BIT (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), regno); } - a = ira_curr_regno_allocno_map[regno]; - if (a == NULL) - return; - if ((p = ALLOCNO_LIVE_RANGES (a)) == NULL - || (p->finish != curr_point && p->finish + 1 != curr_point)) - ALLOCNO_LIVE_RANGES (a) - = ira_create_allocno_live_range (a, curr_point, -1, - ALLOCNO_LIVE_RANGES (a)); } -/* Update ALLOCNO_EXCESS_PRESSURE_POINTS_NUM for allocno A. */ +/* Process the death of hard register REGNO. This updates + hard_regs_live. */ +static void +make_hard_regno_dead (int regno) +{ + CLEAR_HARD_REG_BIT (hard_regs_live, regno); +} + +/* Record the birth of object OBJ. Set a bit for it in objects_live, + start a new live range for it if necessary and update hard register + conflicts. */ static void -update_allocno_pressure_excess_length (ira_allocno_t a) +make_object_born (ira_object_t obj) { + live_range_t lr = OBJECT_LIVE_RANGES (obj); + + sparseset_set_bit (objects_live, OBJECT_CONFLICT_ID (obj)); + IOR_HARD_REG_SET (OBJECT_CONFLICT_HARD_REGS (obj), hard_regs_live); + IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), hard_regs_live); + + if (lr == NULL + || (lr->finish != curr_point && lr->finish + 1 != curr_point)) + ira_add_live_range_to_object (obj, curr_point, -1); +} + +/* Update ALLOCNO_EXCESS_PRESSURE_POINTS_NUM for the allocno + associated with object OBJ. */ +static void +update_allocno_pressure_excess_length (ira_object_t obj) +{ + ira_allocno_t a = OBJECT_ALLOCNO (obj); int start, i; enum reg_class cover_class, cl; - allocno_live_range_t p; + live_range_t p; cover_class = ALLOCNO_COVER_CLASS (a); for (i = 0; @@ -129,7 +145,7 @@ update_allocno_pressure_excess_length (ira_allocno_t a) { if (high_pressure_start_point[cl] < 0) continue; - p = ALLOCNO_LIVE_RANGES (a); + p = OBJECT_LIVE_RANGES (obj); ira_assert (p != NULL); start = (high_pressure_start_point[cl] > p->start ? high_pressure_start_point[cl] : p->start); @@ -137,56 +153,39 @@ update_allocno_pressure_excess_length (ira_allocno_t a) } } -/* Process the death of register REGNO. This updates hard_regs_live - or finishes the current live range for the allocno corresponding to - REGNO. */ +/* Process the death of object OBJ, which is associated with allocno + A. This finishes the current live range for it. */ static void -make_regno_dead (int regno) +make_object_dead (ira_object_t obj) { - ira_allocno_t a; - allocno_live_range_t p; + live_range_t lr; - if (regno < FIRST_PSEUDO_REGISTER) - { - CLEAR_HARD_REG_BIT (hard_regs_live, regno); - return; - } - a = ira_curr_regno_allocno_map[regno]; - if (a == NULL) - return; - p = ALLOCNO_LIVE_RANGES (a); - ira_assert (p != NULL); - p->finish = curr_point; - update_allocno_pressure_excess_length (a); + sparseset_clear_bit (objects_live, OBJECT_CONFLICT_ID (obj)); + lr = OBJECT_LIVE_RANGES (obj); + ira_assert (lr != NULL); + lr->finish = curr_point; + update_allocno_pressure_excess_length (obj); } /* The current register pressures for each cover class for the current basic block. */ static int curr_reg_pressure[N_REG_CLASSES]; -/* Mark allocno A as currently living and update current register - pressure, maximal register pressure for the current BB, start point - of the register pressure excess, and conflicting hard registers of - A. */ +/* Record that register pressure for COVER_CLASS increased by N + registers. Update the current register pressure, maximal register + pressure for the current BB and the start point of the register + pressure excess. */ static void -set_allocno_live (ira_allocno_t a) +inc_register_pressure (enum reg_class cover_class, int n) { int i; - enum reg_class cover_class, cl; + enum reg_class cl; - /* Invalidate because it is referenced. */ - allocno_saved_at_call[ALLOCNO_NUM (a)] = 0; - if (sparseset_bit_p (allocnos_live, ALLOCNO_NUM (a))) - return; - sparseset_set_bit (allocnos_live, ALLOCNO_NUM (a)); - IOR_HARD_REG_SET (ALLOCNO_CONFLICT_HARD_REGS (a), hard_regs_live); - IOR_HARD_REG_SET (ALLOCNO_TOTAL_CONFLICT_HARD_REGS (a), hard_regs_live); - cover_class = ALLOCNO_COVER_CLASS (a); for (i = 0; (cl = ira_reg_class_super_classes[cover_class][i]) != LIM_REG_CLASSES; i++) { - curr_reg_pressure[cl] += ira_reg_class_nregs[cl][ALLOCNO_MODE (a)]; + curr_reg_pressure[cl] += n; if (high_pressure_start_point[cl] < 0 && (curr_reg_pressure[cl] > ira_available_class_regs[cl])) high_pressure_start_point[cl] = curr_point; @@ -195,110 +194,135 @@ set_allocno_live (ira_allocno_t a) } } -/* Mark allocno A as currently not living and update current register - pressure, start point of the register pressure excess, and register - pressure excess length for living allocnos. */ +/* Record that register pressure for COVER_CLASS has decreased by + NREGS registers; update current register pressure, start point of + the register pressure excess, and register pressure excess length + for living allocnos. */ + static void -clear_allocno_live (ira_allocno_t a) +dec_register_pressure (enum reg_class cover_class, int nregs) { int i; unsigned int j; - enum reg_class cover_class, cl; - bool set_p; + enum reg_class cl; + bool set_p = false; - /* Invalidate because it is referenced. */ - allocno_saved_at_call[ALLOCNO_NUM (a)] = 0; - if (sparseset_bit_p (allocnos_live, ALLOCNO_NUM (a))) + for (i = 0; + (cl = ira_reg_class_super_classes[cover_class][i]) != LIM_REG_CLASSES; + i++) + { + curr_reg_pressure[cl] -= nregs; + ira_assert (curr_reg_pressure[cl] >= 0); + if (high_pressure_start_point[cl] >= 0 + && curr_reg_pressure[cl] <= ira_available_class_regs[cl]) + set_p = true; + } + if (set_p) { - cover_class = ALLOCNO_COVER_CLASS (a); - set_p = false; + EXECUTE_IF_SET_IN_SPARSESET (objects_live, j) + update_allocno_pressure_excess_length (ira_object_id_map[j]); for (i = 0; (cl = ira_reg_class_super_classes[cover_class][i]) != LIM_REG_CLASSES; i++) - { - curr_reg_pressure[cl] -= ira_reg_class_nregs[cl][ALLOCNO_MODE (a)]; - ira_assert (curr_reg_pressure[cl] >= 0); - if (high_pressure_start_point[cl] >= 0 - && curr_reg_pressure[cl] <= ira_available_class_regs[cl]) - set_p = true; - } - if (set_p) - { - EXECUTE_IF_SET_IN_SPARSESET (allocnos_live, j) - update_allocno_pressure_excess_length (ira_allocnos[j]); - for (i = 0; - (cl = ira_reg_class_super_classes[cover_class][i]) - != LIM_REG_CLASSES; - i++) - if (high_pressure_start_point[cl] >= 0 - && curr_reg_pressure[cl] <= ira_available_class_regs[cl]) - high_pressure_start_point[cl] = -1; - - } + if (high_pressure_start_point[cl] >= 0 + && curr_reg_pressure[cl] <= ira_available_class_regs[cl]) + high_pressure_start_point[cl] = -1; } - sparseset_clear_bit (allocnos_live, ALLOCNO_NUM (a)); } -/* Mark the register REG as live. Store a 1 in hard_regs_live or - allocnos_live for this register or the corresponding allocno, - record how many consecutive hardware registers it actually - needs. */ +/* Mark the pseudo register REGNO as live. Update all information about + live ranges and register pressure. */ static void -mark_reg_live (rtx reg) +mark_pseudo_regno_live (int regno) { - int i, regno; + ira_allocno_t a = ira_curr_regno_allocno_map[regno]; + int i, n, nregs; + enum reg_class cl; + + if (a == NULL) + return; - gcc_assert (REG_P (reg)); - regno = REGNO (reg); + /* Invalidate because it is referenced. */ + allocno_saved_at_call[ALLOCNO_NUM (a)] = 0; - if (regno >= FIRST_PSEUDO_REGISTER) + n = ALLOCNO_NUM_OBJECTS (a); + cl = ALLOCNO_COVER_CLASS (a); + nregs = ira_reg_class_nregs[cl][ALLOCNO_MODE (a)]; + if (n > 1) { - ira_allocno_t a = ira_curr_regno_allocno_map[regno]; + /* We track every subobject separately. */ + gcc_assert (nregs == n); + nregs = 1; + } - if (a != NULL) - { - if (sparseset_bit_p (allocnos_live, ALLOCNO_NUM (a))) - { - /* Invalidate because it is referenced. */ - allocno_saved_at_call[ALLOCNO_NUM (a)] = 0; - return; - } - set_allocno_live (a); - } - make_regno_born (regno); + for (i = 0; i < n; i++) + { + ira_object_t obj = ALLOCNO_OBJECT (a, i); + if (sparseset_bit_p (objects_live, OBJECT_CONFLICT_ID (obj))) + continue; + + inc_register_pressure (cl, nregs); + make_object_born (obj); } - else if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno)) +} + +/* Like mark_pseudo_regno_live, but try to only mark one subword of + the pseudo as live. SUBWORD indicates which; a value of 0 + indicates the low part. */ +static void +mark_pseudo_regno_subword_live (int regno, int subword) +{ + ira_allocno_t a = ira_curr_regno_allocno_map[regno]; + int n, nregs; + enum reg_class cl; + ira_object_t obj; + + if (a == NULL) + return; + + /* Invalidate because it is referenced. */ + allocno_saved_at_call[ALLOCNO_NUM (a)] = 0; + + n = ALLOCNO_NUM_OBJECTS (a); + if (n == 1) + { + mark_pseudo_regno_live (regno); + return; + } + + cl = ALLOCNO_COVER_CLASS (a); + nregs = ira_reg_class_nregs[cl][ALLOCNO_MODE (a)]; + gcc_assert (nregs == n); + obj = ALLOCNO_OBJECT (a, subword); + + if (sparseset_bit_p (objects_live, OBJECT_CONFLICT_ID (obj))) + return; + + inc_register_pressure (cl, nregs); + make_object_born (obj); +} + +/* Mark the register REG as live. Store a 1 in hard_regs_live for + this register, record how many consecutive hardware registers it + actually needs. */ +static void +mark_hard_reg_live (rtx reg) +{ + int regno = REGNO (reg); + + if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno)) { int last = regno + hard_regno_nregs[regno][GET_MODE (reg)]; - enum reg_class cover_class, cl; while (regno < last) { if (! TEST_HARD_REG_BIT (hard_regs_live, regno) && ! TEST_HARD_REG_BIT (eliminable_regset, regno)) { - cover_class = ira_hard_regno_cover_class[regno]; - for (i = 0; - (cl = ira_reg_class_super_classes[cover_class][i]) - != LIM_REG_CLASSES; - i++) - { - curr_reg_pressure[cl]++; - if (high_pressure_start_point[cl] < 0 - && (curr_reg_pressure[cl] - > ira_available_class_regs[cl])) - high_pressure_start_point[cl] = curr_point; - } - make_regno_born (regno); - for (i = 0; - (cl = ira_reg_class_super_classes[cover_class][i]) - != LIM_REG_CLASSES; - i++) - { - if (curr_bb_node->reg_pressure[cl] < curr_reg_pressure[cl]) - curr_bb_node->reg_pressure[cl] = curr_reg_pressure[cl]; - } + enum reg_class cover_class = ira_hard_regno_cover_class[regno]; + inc_register_pressure (cover_class, 1); + make_hard_regno_born (regno); } regno++; } @@ -309,79 +333,112 @@ mark_reg_live (rtx reg) static void mark_ref_live (df_ref ref) { - rtx reg; + rtx reg = DF_REF_REG (ref); + rtx orig_reg = reg; - reg = DF_REF_REG (ref); if (GET_CODE (reg) == SUBREG) reg = SUBREG_REG (reg); - mark_reg_live (reg); + + if (REGNO (reg) >= FIRST_PSEUDO_REGISTER) + { + if (df_read_modify_subreg_p (orig_reg)) + { + mark_pseudo_regno_subword_live (REGNO (reg), + subreg_lowpart_p (orig_reg) ? 0 : 1); + } + else + mark_pseudo_regno_live (REGNO (reg)); + } + else + mark_hard_reg_live (reg); } -/* Mark the register REG as dead. Store a 0 in hard_regs_live or - allocnos_live for the register. */ +/* Mark the pseudo register REGNO as dead. Update all information about + live ranges and register pressure. */ static void -mark_reg_dead (rtx reg) +mark_pseudo_regno_dead (int regno) { - int regno; + ira_allocno_t a = ira_curr_regno_allocno_map[regno]; + int n, i, nregs; + enum reg_class cl; - gcc_assert (REG_P (reg)); - regno = REGNO (reg); + if (a == NULL) + return; - if (regno >= FIRST_PSEUDO_REGISTER) + /* Invalidate because it is referenced. */ + allocno_saved_at_call[ALLOCNO_NUM (a)] = 0; + + n = ALLOCNO_NUM_OBJECTS (a); + cl = ALLOCNO_COVER_CLASS (a); + nregs = ira_reg_class_nregs[cl][ALLOCNO_MODE (a)]; + if (n > 1) + { + /* We track every subobject separately. */ + gcc_assert (nregs == n); + nregs = 1; + } + for (i = 0; i < n; i++) { - ira_allocno_t a = ira_curr_regno_allocno_map[regno]; + ira_object_t obj = ALLOCNO_OBJECT (a, i); + if (!sparseset_bit_p (objects_live, OBJECT_CONFLICT_ID (obj))) + continue; - if (a != NULL) - { - if (! sparseset_bit_p (allocnos_live, ALLOCNO_NUM (a))) - { - /* Invalidate because it is referenced. */ - allocno_saved_at_call[ALLOCNO_NUM (a)] = 0; - return; - } - clear_allocno_live (a); - } - make_regno_dead (regno); + dec_register_pressure (cl, nregs); + make_object_dead (obj); } - else if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno)) +} + +/* Like mark_pseudo_regno_dead, but called when we know that only part of the + register dies. SUBWORD indicates which; a value of 0 indicates the low part. */ +static void +mark_pseudo_regno_subword_dead (int regno, int subword) +{ + ira_allocno_t a = ira_curr_regno_allocno_map[regno]; + int n, nregs; + enum reg_class cl; + ira_object_t obj; + + if (a == NULL) + return; + + /* Invalidate because it is referenced. */ + allocno_saved_at_call[ALLOCNO_NUM (a)] = 0; + + n = ALLOCNO_NUM_OBJECTS (a); + if (n == 1) + /* The allocno as a whole doesn't die in this case. */ + return; + + cl = ALLOCNO_COVER_CLASS (a); + nregs = ira_reg_class_nregs[cl][ALLOCNO_MODE (a)]; + gcc_assert (nregs == n); + + obj = ALLOCNO_OBJECT (a, subword); + if (!sparseset_bit_p (objects_live, OBJECT_CONFLICT_ID (obj))) + return; + + dec_register_pressure (cl, 1); + make_object_dead (obj); +} + +/* Mark the hard register REG as dead. Store a 0 in hard_regs_live for the + register. */ +static void +mark_hard_reg_dead (rtx reg) +{ + int regno = REGNO (reg); + + if (! TEST_HARD_REG_BIT (ira_no_alloc_regs, regno)) { - int i; - unsigned int j; int last = regno + hard_regno_nregs[regno][GET_MODE (reg)]; - enum reg_class cover_class, cl; - bool set_p; while (regno < last) { if (TEST_HARD_REG_BIT (hard_regs_live, regno)) { - set_p = false; - cover_class = ira_hard_regno_cover_class[regno]; - for (i = 0; - (cl = ira_reg_class_super_classes[cover_class][i]) - != LIM_REG_CLASSES; - i++) - { - curr_reg_pressure[cl]--; - if (high_pressure_start_point[cl] >= 0 - && curr_reg_pressure[cl] <= ira_available_class_regs[cl]) - set_p = true; - ira_assert (curr_reg_pressure[cl] >= 0); - } - if (set_p) - { - EXECUTE_IF_SET_IN_SPARSESET (allocnos_live, j) - update_allocno_pressure_excess_length (ira_allocnos[j]); - for (i = 0; - (cl = ira_reg_class_super_classes[cover_class][i]) - != LIM_REG_CLASSES; - i++) - if (high_pressure_start_point[cl] >= 0 - && (curr_reg_pressure[cl] - <= ira_available_class_regs[cl])) - high_pressure_start_point[cl] = -1; - } - make_regno_dead (regno); + enum reg_class cover_class = ira_hard_regno_cover_class[regno]; + dec_register_pressure (cover_class, 1); + make_hard_regno_dead (regno); } regno++; } @@ -393,16 +450,33 @@ mark_reg_dead (rtx reg) static void mark_ref_dead (df_ref def) { - rtx reg; + rtx reg = DF_REF_REG (def); + rtx orig_reg = reg; - if (DF_REF_FLAGS_IS_SET (def, DF_REF_PARTIAL) - || DF_REF_FLAGS_IS_SET (def, DF_REF_CONDITIONAL)) + if (DF_REF_FLAGS_IS_SET (def, DF_REF_CONDITIONAL)) return; - reg = DF_REF_REG (def); if (GET_CODE (reg) == SUBREG) reg = SUBREG_REG (reg); - mark_reg_dead (reg); + + if (DF_REF_FLAGS_IS_SET (def, DF_REF_PARTIAL) + && (GET_CODE (orig_reg) != SUBREG + || REGNO (reg) < FIRST_PSEUDO_REGISTER + || !df_read_modify_subreg_p (orig_reg))) + return; + + if (REGNO (reg) >= FIRST_PSEUDO_REGISTER) + { + if (df_read_modify_subreg_p (orig_reg)) + { + mark_pseudo_regno_subword_dead (REGNO (reg), + subreg_lowpart_p (orig_reg) ? 0 : 1); + } + else + mark_pseudo_regno_dead (REGNO (reg)); + } + else + mark_hard_reg_dead (reg); } /* Make pseudo REG conflicting with pseudo DREG, if the 1st pseudo @@ -416,10 +490,10 @@ make_pseudo_conflict (rtx reg, enum reg_class cl, rtx dreg, bool advance_p) if (GET_CODE (reg) == SUBREG) reg = SUBREG_REG (reg); - + if (! REG_P (reg) || REGNO (reg) < FIRST_PSEUDO_REGISTER) return advance_p; - + a = ira_curr_regno_allocno_map[REGNO (reg)]; if (! reg_classes_intersect_p (cl, ALLOCNO_COVER_CLASS (a))) return advance_p; @@ -427,10 +501,10 @@ make_pseudo_conflict (rtx reg, enum reg_class cl, rtx dreg, bool advance_p) if (advance_p) curr_point++; - mark_reg_live (reg); - mark_reg_live (dreg); - mark_reg_dead (reg); - mark_reg_dead (dreg); + mark_pseudo_regno_live (REGNO (reg)); + mark_pseudo_regno_live (REGNO (dreg)); + mark_pseudo_regno_dead (REGNO (reg)); + mark_pseudo_regno_dead (REGNO (dreg)); return false; } @@ -447,7 +521,7 @@ check_and_make_def_use_conflict (rtx dreg, enum reg_class def_cl, { if (! reg_classes_intersect_p (def_cl, use_cl)) return advance_p; - + advance_p = make_pseudo_conflict (recog_data.operand[use], use_cl, dreg, advance_p); /* Reload may end up swapping commutative operands, so you @@ -456,7 +530,7 @@ check_and_make_def_use_conflict (rtx dreg, enum reg_class def_cl, different. (Indeed, if the constraints for the two operands are the same for all alternatives, there's no point marking them as commutative.) */ - if (use < recog_data.n_operands + 1 + if (use < recog_data.n_operands - 1 && recog_data.constraints[use][0] == '%') advance_p = make_pseudo_conflict (recog_data.operand[use + 1], @@ -480,41 +554,59 @@ check_and_make_def_conflict (int alt, int def, enum reg_class def_cl) enum reg_class use_cl, acl; bool advance_p; rtx dreg = recog_data.operand[def]; - + if (def_cl == NO_REGS) return; - + if (GET_CODE (dreg) == SUBREG) dreg = SUBREG_REG (dreg); - + if (! REG_P (dreg) || REGNO (dreg) < FIRST_PSEUDO_REGISTER) return; - + a = ira_curr_regno_allocno_map[REGNO (dreg)]; acl = ALLOCNO_COVER_CLASS (a); if (! reg_classes_intersect_p (acl, def_cl)) return; - + advance_p = true; - + for (use = 0; use < recog_data.n_operands; use++) { + int alt1; + if (use == def || recog_data.operand_type[use] == OP_OUT) - return; - + continue; + if (recog_op_alt[use][alt].anything_ok) use_cl = ALL_REGS; else use_cl = recog_op_alt[use][alt].cl; - + + /* If there's any alternative that allows USE to match DEF, do not + record a conflict. If that causes us to create an invalid + instruction due to the earlyclobber, reload must fix it up. */ + for (alt1 = 0; alt1 < recog_data.n_alternatives; alt1++) + if (recog_op_alt[use][alt1].matches == def + || (use < recog_data.n_operands - 1 + && recog_data.constraints[use][0] == '%' + && recog_op_alt[use + 1][alt1].matches == def) + || (use >= 1 + && recog_data.constraints[use - 1][0] == '%' + && recog_op_alt[use - 1][alt1].matches == def)) + break; + + if (alt1 < recog_data.n_alternatives) + continue; + advance_p = check_and_make_def_use_conflict (dreg, def_cl, use, use_cl, advance_p); - + if ((use_match = recog_op_alt[use][alt].matches) >= 0) { if (use_match == def) - return; - + continue; + if (recog_op_alt[use_match][alt].anything_ok) use_cl = ALL_REGS; else @@ -573,7 +665,7 @@ mark_hard_reg_early_clobbers (rtx insn, bool live_p) if (DF_REF_FLAGS_IS_SET (*def_rec, DF_REF_MUST_CLOBBER)) { rtx dreg = DF_REF_REG (*def_rec); - + if (GET_CODE (dreg) == SUBREG) dreg = SUBREG_REG (dreg); if (! REG_P (dreg) || REGNO (dreg) >= FIRST_PSEUDO_REGISTER) @@ -581,7 +673,7 @@ mark_hard_reg_early_clobbers (rtx insn, bool live_p) /* Hard register clobbers are believed to be early clobber because there is no way to say that non-operand hard - register clobbers are not early ones. */ + register clobbers are not early ones. */ if (live_p) mark_ref_live (*def_rec); else @@ -630,26 +722,26 @@ single_reg_class (const char *constraints, rtx op, rtx equiv_const) break; case 'n': - if (GET_CODE (op) == CONST_INT + if (CONST_INT_P (op) || (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == VOIDmode) || (equiv_const != NULL_RTX - && (GET_CODE (equiv_const) == CONST_INT + && (CONST_INT_P (equiv_const) || (GET_CODE (equiv_const) == CONST_DOUBLE && GET_MODE (equiv_const) == VOIDmode)))) return NO_REGS; break; - + case 's': - if ((CONSTANT_P (op) && GET_CODE (op) != CONST_INT + if ((CONSTANT_P (op) && !CONST_INT_P (op) && (GET_CODE (op) != CONST_DOUBLE || GET_MODE (op) != VOIDmode)) || (equiv_const != NULL_RTX && CONSTANT_P (equiv_const) - && GET_CODE (equiv_const) != CONST_INT + && !CONST_INT_P (equiv_const) && (GET_CODE (equiv_const) != CONST_DOUBLE || GET_MODE (equiv_const) != VOIDmode))) return NO_REGS; break; - + case 'I': case 'J': case 'K': @@ -658,15 +750,15 @@ single_reg_class (const char *constraints, rtx op, rtx equiv_const) case 'N': case 'O': case 'P': - if ((GET_CODE (op) == CONST_INT + if ((CONST_INT_P (op) && CONST_OK_FOR_CONSTRAINT_P (INTVAL (op), c, constraints)) || (equiv_const != NULL_RTX - && GET_CODE (equiv_const) == CONST_INT + && CONST_INT_P (equiv_const) && CONST_OK_FOR_CONSTRAINT_P (INTVAL (equiv_const), c, constraints))) return NO_REGS; break; - + case 'E': case 'F': if (GET_CODE (op) == CONST_DOUBLE @@ -679,7 +771,7 @@ single_reg_class (const char *constraints, rtx op, rtx equiv_const) == MODE_VECTOR_FLOAT))))) return NO_REGS; break; - + case 'G': case 'H': if ((GET_CODE (op) == CONST_DOUBLE @@ -702,22 +794,25 @@ single_reg_class (const char *constraints, rtx op, rtx equiv_const) ? GENERAL_REGS : REG_CLASS_FROM_CONSTRAINT (c, constraints)); if ((cl != NO_REGS && next_cl != cl) - || ira_available_class_regs[next_cl] > 1) + || (ira_available_class_regs[next_cl] + > ira_reg_class_nregs[next_cl][GET_MODE (op)])) return NO_REGS; cl = next_cl; break; - + case '0': case '1': case '2': case '3': case '4': case '5': case '6': case '7': case '8': case '9': next_cl = single_reg_class (recog_data.constraints[c - '0'], recog_data.operand[c - '0'], NULL_RTX); - if ((cl != NO_REGS && next_cl != cl) || next_cl == NO_REGS - || ira_available_class_regs[next_cl] > 1) + if ((cl != NO_REGS && next_cl != cl) + || next_cl == NO_REGS + || (ira_available_class_regs[next_cl] + > ira_reg_class_nregs[next_cl][GET_MODE (op)])) return NO_REGS; cl = next_cl; break; - + default: return NO_REGS; } @@ -736,6 +831,65 @@ single_reg_operand_class (int op_num) recog_data.operand[op_num], NULL_RTX); } +/* The function sets up hard register set *SET to hard registers which + might be used by insn reloads because the constraints are too + strict. */ +void +ira_implicitly_set_insn_hard_regs (HARD_REG_SET *set) +{ + int i, c, regno = 0; + bool ignore_p; + enum reg_class cl; + rtx op; + enum machine_mode mode; + + CLEAR_HARD_REG_SET (*set); + for (i = 0; i < recog_data.n_operands; i++) + { + op = recog_data.operand[i]; + + if (GET_CODE (op) == SUBREG) + op = SUBREG_REG (op); + + if (GET_CODE (op) == SCRATCH + || (REG_P (op) && (regno = REGNO (op)) >= FIRST_PSEUDO_REGISTER)) + { + const char *p = recog_data.constraints[i]; + + mode = (GET_CODE (op) == SCRATCH + ? GET_MODE (op) : PSEUDO_REGNO_MODE (regno)); + cl = NO_REGS; + for (ignore_p = false; (c = *p); p += CONSTRAINT_LEN (c, p)) + if (c == '#') + ignore_p = true; + else if (c == ',') + ignore_p = false; + else if (! ignore_p) + switch (c) + { + case 'r': + case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': + case 'h': case 'j': case 'k': case 'l': + case 'q': case 't': case 'u': + case 'v': case 'w': case 'x': case 'y': case 'z': + case 'A': case 'B': case 'C': case 'D': + case 'Q': case 'R': case 'S': case 'T': case 'U': + case 'W': case 'Y': case 'Z': + cl = (c == 'r' + ? GENERAL_REGS + : REG_CLASS_FROM_CONSTRAINT (c, p)); + if (cl != NO_REGS + /* There is no register pressure problem if all of the + regs in this class are fixed. */ + && ira_available_class_regs[cl] != 0 + && (ira_available_class_regs[cl] + <= ira_reg_class_nregs[cl][mode])) + IOR_HARD_REG_SET (*set, reg_class_contents[cl]); + break; + } + } + } +} /* Processes input operands, if IN_P, or output operands otherwise of the current insn with FREQ to find allocno which can use only one hard register and makes other currently living allocnos conflicting @@ -743,9 +897,9 @@ single_reg_operand_class (int op_num) static void process_single_reg_class_operands (bool in_p, int freq) { - int i, regno, cost; + int i, regno; unsigned int px; - enum reg_class cl, cover_class; + enum reg_class cl; rtx operand; ira_allocno_t operand_a, a; @@ -766,53 +920,87 @@ process_single_reg_class_operands (bool in_p, int freq) if (GET_CODE (operand) == SUBREG) operand = SUBREG_REG (operand); - + if (REG_P (operand) && (regno = REGNO (operand)) >= FIRST_PSEUDO_REGISTER) { - enum machine_mode mode; enum reg_class cover_class; operand_a = ira_curr_regno_allocno_map[regno]; - mode = ALLOCNO_MODE (operand_a); cover_class = ALLOCNO_COVER_CLASS (operand_a); if (ira_class_subset_p[cl][cover_class] - && ira_class_hard_regs_num[cl] != 0 - && (ira_class_hard_reg_index[cover_class] - [ira_class_hard_regs[cl][0]]) >= 0 - && reg_class_size[cl] <= (unsigned) CLASS_MAX_NREGS (cl, mode)) + && ira_class_hard_regs_num[cl] != 0) { - /* ??? FREQ */ - cost = freq * (in_p - ? ira_register_move_cost[mode][cover_class][cl] - : ira_register_move_cost[mode][cl][cover_class]); - ira_allocate_and_set_costs - (&ALLOCNO_CONFLICT_HARD_REG_COSTS (operand_a), cover_class, 0); - ALLOCNO_CONFLICT_HARD_REG_COSTS (operand_a) - [ira_class_hard_reg_index - [cover_class][ira_class_hard_regs[cl][0]]] - -= cost; + /* View the desired allocation of OPERAND as: + + (REG:YMODE YREGNO), + + a simplification of: + + (subreg:YMODE (reg:XMODE XREGNO) OFFSET). */ + enum machine_mode ymode, xmode; + int xregno, yregno; + HOST_WIDE_INT offset; + + xmode = recog_data.operand_mode[i]; + xregno = ira_class_hard_regs[cl][0]; + ymode = ALLOCNO_MODE (operand_a); + offset = subreg_lowpart_offset (ymode, xmode); + yregno = simplify_subreg_regno (xregno, xmode, offset, ymode); + if (yregno >= 0 + && ira_class_hard_reg_index[cover_class][yregno] >= 0) + { + int cost; + + ira_allocate_and_set_costs + (&ALLOCNO_CONFLICT_HARD_REG_COSTS (operand_a), + cover_class, 0); + cost + = (freq + * (in_p + ? ira_get_register_move_cost (xmode, cover_class, cl) + : ira_get_register_move_cost (xmode, cl, + cover_class))); + ALLOCNO_CONFLICT_HARD_REG_COSTS (operand_a) + [ira_class_hard_reg_index[cover_class][yregno]] -= cost; + } } } - EXECUTE_IF_SET_IN_SPARSESET (allocnos_live, px) + EXECUTE_IF_SET_IN_SPARSESET (objects_live, px) { - a = ira_allocnos[px]; - cover_class = ALLOCNO_COVER_CLASS (a); + ira_object_t obj = ira_object_id_map[px]; + a = OBJECT_ALLOCNO (obj); if (a != operand_a) { /* We could increase costs of A instead of making it conflicting with the hard register. But it works worse because it will be spilled in reload in anyway. */ - IOR_HARD_REG_SET (ALLOCNO_CONFLICT_HARD_REGS (a), + IOR_HARD_REG_SET (OBJECT_CONFLICT_HARD_REGS (obj), reg_class_contents[cl]); - IOR_HARD_REG_SET (ALLOCNO_TOTAL_CONFLICT_HARD_REGS (a), + IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), reg_class_contents[cl]); } } } } +/* Return true when one of the predecessor edges of BB is marked with + EDGE_ABNORMAL_CALL or EDGE_EH. */ +static bool +bb_has_abnormal_call_pred (basic_block bb) +{ + edge e; + edge_iterator ei; + + FOR_EACH_EDGE (e, ei, bb->preds) + { + if (e->flags & (EDGE_ABNORMAL_CALL | EDGE_EH)) + return true; + } + return false; +} + /* Process insns of the basic block given by its LOOP_TREE_NODE to update allocno live ranges, allocno hard register conflicts, intersected calls, and register pressure info for allocnos for the @@ -839,7 +1027,7 @@ process_bb_node_lives (ira_loop_tree_node_t loop_tree_node) } curr_bb_node = loop_tree_node; reg_live_out = DF_LR_OUT (bb); - sparseset_clear (allocnos_live); + sparseset_clear (objects_live); REG_SET_TO_HARD_REG_SET (hard_regs_live, reg_live_out); AND_COMPL_HARD_REG_SET (hard_regs_live, eliminable_regset); AND_COMPL_HARD_REG_SET (hard_regs_live, ira_no_alloc_regs); @@ -847,7 +1035,7 @@ process_bb_node_lives (ira_loop_tree_node_t loop_tree_node) if (TEST_HARD_REG_BIT (hard_regs_live, i)) { enum reg_class cover_class, cl; - + cover_class = ira_class_translate[REGNO_REG_CLASS (i)]; for (j = 0; (cl = ira_reg_class_super_classes[cover_class][j]) @@ -862,16 +1050,8 @@ process_bb_node_lives (ira_loop_tree_node_t loop_tree_node) } } EXECUTE_IF_SET_IN_BITMAP (reg_live_out, FIRST_PSEUDO_REGISTER, j, bi) - { - ira_allocno_t a = ira_curr_regno_allocno_map[j]; - - if (a == NULL) - continue; - ira_assert (! sparseset_bit_p (allocnos_live, ALLOCNO_NUM (a))); - set_allocno_live (a); - make_regno_born (j); - } - + mark_pseudo_regno_live (j); + freq = REG_FREQ_FROM_BB (bb); if (freq == 0) freq = 1; @@ -892,10 +1072,10 @@ process_bb_node_lives (ira_loop_tree_node_t loop_tree_node) { df_ref *def_rec, *use_rec; bool call_p; - - if (! INSN_P (insn)) + + if (!NONDEBUG_INSN_P (insn)) continue; - + if (internal_flag_ira_verbose > 2 && ira_dump_file != NULL) fprintf (ira_dump_file, " Insn %u(l%d): point = %d\n", INSN_UID (insn), loop_tree_node->parent->loop->num, @@ -948,11 +1128,11 @@ process_bb_node_lives (ira_loop_tree_node_t loop_tree_node) } } } - + extract_insn (insn); preprocess_constraints (); process_single_reg_class_operands (false, freq); - + /* See which defined values die here. */ for (def_rec = DF_INSN_DEFS (insn); *def_rec; def_rec++) if (!call_p || !DF_REF_FLAGS_IS_SET (*def_rec, DF_REF_MAY_CLOBBER)) @@ -961,21 +1141,14 @@ process_bb_node_lives (ira_loop_tree_node_t loop_tree_node) if (call_p) { last_call_num++; + sparseset_clear (allocnos_processed); /* The current set of live allocnos are live across the call. */ - EXECUTE_IF_SET_IN_SPARSESET (allocnos_live, i) + EXECUTE_IF_SET_IN_SPARSESET (objects_live, i) { - ira_allocno_t a = ira_allocnos[i]; - - if (allocno_saved_at_call[i] != last_call_num) - /* Here we are mimicking caller-save.c behaviour - which does not save hard register at a call if - it was saved on previous call in the same basic - block and the hard register was not mentioned - between the two calls. */ - ALLOCNO_CALL_FREQ (a) += freq; - /* Mark it as saved at the next call. */ - allocno_saved_at_call[i] = last_call_num + 1; - ALLOCNO_CALLS_CROSSED_NUM (a)++; + ira_object_t obj = ira_object_id_map[i]; + ira_allocno_t a = OBJECT_ALLOCNO (obj); + int num = ALLOCNO_NUM (a); + /* Don't allocate allocnos that cross setjmps or any call, if this function receives a nonlocal goto. */ @@ -983,19 +1156,34 @@ process_bb_node_lives (ira_loop_tree_node_t loop_tree_node) || find_reg_note (insn, REG_SETJMP, NULL_RTX) != NULL_RTX) { - SET_HARD_REG_SET (ALLOCNO_CONFLICT_HARD_REGS (a)); - SET_HARD_REG_SET (ALLOCNO_TOTAL_CONFLICT_HARD_REGS (a)); + SET_HARD_REG_SET (OBJECT_CONFLICT_HARD_REGS (obj)); + SET_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj)); } if (can_throw_internal (insn)) { - IOR_HARD_REG_SET (ALLOCNO_TOTAL_CONFLICT_HARD_REGS (a), + IOR_HARD_REG_SET (OBJECT_CONFLICT_HARD_REGS (obj), call_used_reg_set); - IOR_HARD_REG_SET (ALLOCNO_CONFLICT_HARD_REGS (a), + IOR_HARD_REG_SET (OBJECT_TOTAL_CONFLICT_HARD_REGS (obj), call_used_reg_set); } + + if (sparseset_bit_p (allocnos_processed, num)) + continue; + sparseset_set_bit (allocnos_processed, num); + + if (allocno_saved_at_call[num] != last_call_num) + /* Here we are mimicking caller-save.c behaviour + which does not save hard register at a call if + it was saved on previous call in the same basic + block and the hard register was not mentioned + between the two calls. */ + ALLOCNO_CALL_FREQ (a) += freq; + /* Mark it as saved at the next call. */ + allocno_saved_at_call[num] = last_call_num + 1; + ALLOCNO_CALLS_CROSSED_NUM (a)++; } } - + make_early_clobber_and_input_conflicts (); curr_point++; @@ -1005,7 +1193,7 @@ process_bb_node_lives (ira_loop_tree_node_t loop_tree_node) mark_ref_live (*use_rec); process_single_reg_class_operands (true, freq); - + set_p = mark_hard_reg_early_clobbers (insn, true); if (set_p) @@ -1018,12 +1206,12 @@ process_bb_node_lives (ira_loop_tree_node_t loop_tree_node) for (use_rec = DF_INSN_USES (insn); *use_rec; use_rec++) { rtx ureg = DF_REF_REG (*use_rec); - + if (GET_CODE (ureg) == SUBREG) ureg = SUBREG_REG (ureg); if (! REG_P (ureg) || REGNO (ureg) >= FIRST_PSEUDO_REGISTER) continue; - + mark_ref_live (*use_rec); } } @@ -1038,7 +1226,7 @@ process_bb_node_lives (ira_loop_tree_node_t loop_tree_node) unsigned int regno = EH_RETURN_DATA_REGNO (j); if (regno == INVALID_REGNUM) break; - make_regno_born (regno); + make_hard_regno_born (regno); } #endif @@ -1050,27 +1238,26 @@ process_bb_node_lives (ira_loop_tree_node_t loop_tree_node) if (bb_has_abnormal_pred (bb)) { #ifdef STACK_REGS - EXECUTE_IF_SET_IN_SPARSESET (allocnos_live, px) + EXECUTE_IF_SET_IN_SPARSESET (objects_live, px) { - ALLOCNO_NO_STACK_REG_P (ira_allocnos[px]) = true; - ALLOCNO_TOTAL_NO_STACK_REG_P (ira_allocnos[px]) = true; + ira_allocno_t a = OBJECT_ALLOCNO (ira_object_id_map[px]); + ALLOCNO_NO_STACK_REG_P (a) = true; + ALLOCNO_TOTAL_NO_STACK_REG_P (a) = true; } for (px = FIRST_STACK_REG; px <= LAST_STACK_REG; px++) - make_regno_born (px); + make_hard_regno_born (px); #endif /* No need to record conflicts for call clobbered regs if we have nonlocal labels around, as we don't ever try to allocate such regs in this case. */ - if (!cfun->has_nonlocal_label) + if (!cfun->has_nonlocal_label && bb_has_abnormal_call_pred (bb)) for (px = 0; px < FIRST_PSEUDO_REGISTER; px++) if (call_used_regs[px]) - make_regno_born (px); + make_hard_regno_born (px); } - EXECUTE_IF_SET_IN_SPARSESET (allocnos_live, i) - { - make_regno_dead (ALLOCNO_REGNO (ira_allocnos[i])); - } + EXECUTE_IF_SET_IN_SPARSESET (objects_live, i) + make_object_dead (ira_object_id_map[i]); curr_point++; @@ -1094,30 +1281,24 @@ process_bb_node_lives (ira_loop_tree_node_t loop_tree_node) static void create_start_finish_chains (void) { - ira_allocno_t a; - ira_allocno_iterator ai; - allocno_live_range_t r; + ira_object_t obj; + ira_object_iterator oi; + live_range_t r; ira_start_point_ranges - = (allocno_live_range_t *) ira_allocate (ira_max_point - * sizeof (allocno_live_range_t)); - memset (ira_start_point_ranges, 0, - ira_max_point * sizeof (allocno_live_range_t)); + = (live_range_t *) ira_allocate (ira_max_point * sizeof (live_range_t)); + memset (ira_start_point_ranges, 0, ira_max_point * sizeof (live_range_t)); ira_finish_point_ranges - = (allocno_live_range_t *) ira_allocate (ira_max_point - * sizeof (allocno_live_range_t)); - memset (ira_finish_point_ranges, 0, - ira_max_point * sizeof (allocno_live_range_t)); - FOR_EACH_ALLOCNO (a, ai) - { - for (r = ALLOCNO_LIVE_RANGES (a); r != NULL; r = r->next) - { - r->start_next = ira_start_point_ranges[r->start]; - ira_start_point_ranges[r->start] = r; - r->finish_next = ira_finish_point_ranges[r->finish]; + = (live_range_t *) ira_allocate (ira_max_point * sizeof (live_range_t)); + memset (ira_finish_point_ranges, 0, ira_max_point * sizeof (live_range_t)); + FOR_EACH_OBJECT (obj, oi) + for (r = OBJECT_LIVE_RANGES (obj); r != NULL; r = r->next) + { + r->start_next = ira_start_point_ranges[r->start]; + ira_start_point_ranges[r->start] = r; + r->finish_next = ira_finish_point_ranges[r->finish]; ira_finish_point_ranges[r->finish] = r; - } - } + } } /* Rebuild IRA_START_POINT_RANGES and IRA_FINISH_POINT_RANGES after @@ -1139,47 +1320,64 @@ remove_some_program_points_and_update_live_ranges (void) unsigned i; int n; int *map; - ira_allocno_t a; - ira_allocno_iterator ai; - allocno_live_range_t r; - bitmap born_or_died; - bitmap_iterator bi; + ira_object_t obj; + ira_object_iterator oi; + live_range_t r; + sbitmap born_or_dead, born, dead; + sbitmap_iterator sbi; + bool born_p, dead_p, prev_born_p, prev_dead_p; - born_or_died = ira_allocate_bitmap (); - FOR_EACH_ALLOCNO (a, ai) - { - for (r = ALLOCNO_LIVE_RANGES (a); r != NULL; r = r->next) - { - ira_assert (r->start <= r->finish); - bitmap_set_bit (born_or_died, r->start); - bitmap_set_bit (born_or_died, r->finish); - } - } + born = sbitmap_alloc (ira_max_point); + dead = sbitmap_alloc (ira_max_point); + sbitmap_zero (born); + sbitmap_zero (dead); + FOR_EACH_OBJECT (obj, oi) + for (r = OBJECT_LIVE_RANGES (obj); r != NULL; r = r->next) + { + ira_assert (r->start <= r->finish); + SET_BIT (born, r->start); + SET_BIT (dead, r->finish); + } + + born_or_dead = sbitmap_alloc (ira_max_point); + sbitmap_a_or_b (born_or_dead, born, dead); map = (int *) ira_allocate (sizeof (int) * ira_max_point); - n = 0; - EXECUTE_IF_SET_IN_BITMAP(born_or_died, 0, i, bi) + n = -1; + prev_born_p = prev_dead_p = false; + EXECUTE_IF_SET_IN_SBITMAP (born_or_dead, 0, i, sbi) { - map[i] = n++; + born_p = TEST_BIT (born, i); + dead_p = TEST_BIT (dead, i); + if ((prev_born_p && ! prev_dead_p && born_p && ! dead_p) + || (prev_dead_p && ! prev_born_p && dead_p && ! born_p)) + map[i] = n; + else + map[i] = ++n; + prev_born_p = born_p; + prev_dead_p = dead_p; } - ira_free_bitmap (born_or_died); + sbitmap_free (born_or_dead); + sbitmap_free (born); + sbitmap_free (dead); + n++; if (internal_flag_ira_verbose > 1 && ira_dump_file != NULL) fprintf (ira_dump_file, "Compressing live ranges: from %d to %d - %d%%\n", ira_max_point, n, 100 * n / ira_max_point); ira_max_point = n; - FOR_EACH_ALLOCNO (a, ai) - { - for (r = ALLOCNO_LIVE_RANGES (a); r != NULL; r = r->next) - { - r->start = map[r->start]; - r->finish = map[r->finish]; - } - } + + FOR_EACH_OBJECT (obj, oi) + for (r = OBJECT_LIVE_RANGES (obj); r != NULL; r = r->next) + { + r->start = map[r->start]; + r->finish = map[r->finish]; + } + ira_free (map); } /* Print live ranges R to file F. */ void -ira_print_live_range_list (FILE *f, allocno_live_range_t r) +ira_print_live_range_list (FILE *f, live_range_t r) { for (; r != NULL; r = r->next) fprintf (f, " [%d..%d]", r->start, r->finish); @@ -1188,17 +1386,32 @@ ira_print_live_range_list (FILE *f, allocno_live_range_t r) /* Print live ranges R to stderr. */ void -ira_debug_live_range_list (allocno_live_range_t r) +ira_debug_live_range_list (live_range_t r) { ira_print_live_range_list (stderr, r); } +/* Print live ranges of object OBJ to file F. */ +static void +print_object_live_ranges (FILE *f, ira_object_t obj) +{ + ira_print_live_range_list (f, OBJECT_LIVE_RANGES (obj)); +} + /* Print live ranges of allocno A to file F. */ static void print_allocno_live_ranges (FILE *f, ira_allocno_t a) { - fprintf (f, " a%d(r%d):", ALLOCNO_NUM (a), ALLOCNO_REGNO (a)); - ira_print_live_range_list (f, ALLOCNO_LIVE_RANGES (a)); + int n = ALLOCNO_NUM_OBJECTS (a); + int i; + for (i = 0; i < n; i++) + { + fprintf (f, " a%d(r%d", ALLOCNO_NUM (a), ALLOCNO_REGNO (a)); + if (n > 1) + fprintf (f, " [%d]", i); + fprintf (f, "):"); + print_object_live_ranges (f, ALLOCNO_OBJECT (a, i)); + } } /* Print live ranges of allocno A to stderr. */ @@ -1227,12 +1440,13 @@ ira_debug_live_ranges (void) } /* The main entry function creates live ranges, set up - CONFLICT_HARD_REGS and TOTAL_CONFLICT_HARD_REGS for allocnos, and + CONFLICT_HARD_REGS and TOTAL_CONFLICT_HARD_REGS for objects, and calculate register pressure info. */ void ira_create_allocno_live_ranges (void) { - allocnos_live = sparseset_alloc (ira_allocnos_num); + objects_live = sparseset_alloc (ira_objects_num); + allocnos_processed = sparseset_alloc (ira_allocnos_num); curr_point = 0; last_call_num = 0; allocno_saved_at_call @@ -1246,7 +1460,8 @@ ira_create_allocno_live_ranges (void) print_live_ranges (ira_dump_file); /* Clean up. */ ira_free (allocno_saved_at_call); - sparseset_free (allocnos_live); + sparseset_free (objects_live); + sparseset_free (allocnos_processed); } /* Compress allocno live ranges. */