X-Git-Url: http://git.sourceforge.jp/view?a=blobdiff_plain;f=gcc%2Fconfig%2Fi386%2Fi386.h;h=ee1fbbc27651be8547e25f562b7a953de1a86939;hb=e174638ff04a9c48151382a725c55994a8a8d558;hp=003ecf58d476809aeaf0b5750c5f1665833181a5;hpb=e44348b5a67cb32a21fd5dd2250eee8ed4f997c5;p=pf3gnuchains%2Fgcc-fork.git

diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 003ecf58d47..ee1fbbc2765 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -46,21 +46,9 @@ Boston, MA 02110-1301, USA.  */
 #define TARGET_SSE3	OPTION_ISA_SSE3
 #define TARGET_SSSE3	OPTION_ISA_SSSE3
 #define TARGET_SSE4_1	OPTION_ISA_SSE4_1
+#define TARGET_SSE4_2	OPTION_ISA_SSE4_2
 #define TARGET_SSE4A	OPTION_ISA_SSE4A
 
-/* ??? Remove following defines.  */
-
-#define MASK_64BIT	OPTION_MASK_ISA_64BIT
-#define MASK_MMX	OPTION_MASK_ISA_MMX
-#define MASK_3DNOW	OPTION_MASK_ISA_3DNOW
-#define MASK_3DNOW_A	OPTION_MASK_ISA_3DNOW_A
-#define MASK_SSE	OPTION_MASK_ISA_SSE
-#define MASK_SSE2	OPTION_MASK_ISA_SSE2
-#define MASK_SSE3	OPTION_MASK_ISA_SSE3
-#define MASK_SSSE3	OPTION_MASK_ISA_SSSE3
-#define MASK_SSE4_1	OPTION_MASK_ISA_SSE4_1
-#define MASK_SSE4A	OPTION_MASK_ISA_SSE4A
-
 #include "config/vxworks-dummy.h"
 
 /* Algorithm to expand string function with.  */
@@ -377,6 +365,7 @@ extern int x86_prefetch_sse;
 #define TARGET_POPCNT		x86_popcnt
 #define TARGET_PREFETCH_SSE	x86_prefetch_sse
 #define TARGET_SAHF		x86_sahf
+#define TARGET_RECIP		x86_recip
 
 #define ASSEMBLER_DIALECT	(ix86_asm_dialect)
 
@@ -398,6 +387,11 @@ extern int ix86_isa_flags;
 #define TARGET_TLS_DIRECT_SEG_REFS_DEFAULT 0
 #endif
 
+/* Fence to use after loop using storent.  */
+
+extern tree x86_mfence;
+#define FENCE_FOLLOWING_MOVNT x86_mfence
+
 /* Once GDB has been enhanced to deal with functions without frame
    pointers, we can change this to allow for elimination of
    the frame pointer in leaf functions.  */
@@ -581,6 +575,8 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
 	builtin_define ("__SSSE3__");				\
       if (TARGET_SSE4_1)					\
 	builtin_define ("__SSE4_1__");				\
+      if (TARGET_SSE4_2)					\
+	builtin_define ("__SSE4_2__");				\
       if (TARGET_SSE4A)						\
  	builtin_define ("__SSE4A__");		                \
       if (TARGET_SSE_MATH && TARGET_SSE)			\
@@ -1278,6 +1274,7 @@ enum reg_class
   GENERAL_REGS,			/* %eax %ebx %ecx %edx %esi %edi %ebp %esp %r8 - %r15*/
   FP_TOP_REG, FP_SECOND_REG,	/* %st(0) %st(1) */
   FLOAT_REGS,
+  SSE_FIRST_REG,
   SSE_REGS,
   MMX_REGS,
   FP_TOP_SSE_REGS,
@@ -1296,7 +1293,7 @@ enum reg_class
 #define FLOAT_CLASS_P(CLASS) \
   reg_class_subset_p ((CLASS), FLOAT_REGS)
 #define SSE_CLASS_P(CLASS) \
-  ((CLASS) == SSE_REGS)
+  reg_class_subset_p ((CLASS), SSE_REGS)
 #define MMX_CLASS_P(CLASS) \
   ((CLASS) == MMX_REGS)
 #define MAYBE_INTEGER_CLASS_P(CLASS) \
@@ -1324,6 +1321,7 @@ enum reg_class
    "GENERAL_REGS",			\
    "FP_TOP_REG", "FP_SECOND_REG",	\
    "FLOAT_REGS",			\
+   "SSE_FIRST_REG",			\
    "SSE_REGS",				\
    "MMX_REGS",				\
    "FP_TOP_SSE_REGS",			\
@@ -1351,6 +1349,7 @@ enum reg_class
   { 0x1100ff,  0x1fe0 },		/* GENERAL_REGS */		\
      { 0x100,     0x0 }, { 0x0200, 0x0 },/* FP_TOP_REG, FP_SECOND_REG */\
     { 0xff00,     0x0 },		/* FLOAT_REGS */		\
+  { 0x200000,     0x0 },		/* SSE_FIRST_REG */		\
 { 0x1fe00000,0x1fe000 },		/* SSE_REGS */			\
 { 0xe0000000,    0x1f },		/* MMX_REGS */			\
 { 0x1fe00100,0x1fe000 },		/* FP_TOP_SSE_REG */		\
@@ -2433,7 +2432,7 @@ struct machine_function GTY(())
    verify whether there's any such instruction live by testing that
    REG_SP is live.  */
 #define ix86_current_function_calls_tls_descriptor \
-  (ix86_tls_descriptor_calls_expanded_in_cfun && regs_ever_live[SP_REG])
+  (ix86_tls_descriptor_calls_expanded_in_cfun && df_regs_ever_live_p (SP_REG))
 
 /* Control behavior of x86_file_start.  */
 #define X86_FILE_START_VERSION_DIRECTIVE false